andrew e2a65d5cfa Add support for the uart classes to set their default register shift value. ... This is needed with the pl011 driver. Before this change it would default to a shift of 0, however the hardware places the registers at 4-byte addresses meaning the value should be 2. This patch fixes this for the pl011 when configured using the fdt. The other drivers have a default value of 0 to keep this a no-op. MFC after: 1 week		2015-04-11 17:16:23 +00:00
..
apb.c	ACK interrupts on the new SoCs.	2015-01-05 02:00:41 +00:00
apbvar.h
ar71xx_bus_space_reversed.c
ar71xx_bus_space_reversed.h
ar71xx_chip.c
ar71xx_chip.h
ar71xx_cpudef.h	Add a GPIO output mux configuration method.	2015-01-03 06:55:58 +00:00
ar71xx_ehci.c	[QCA955x] make the USB EHCI interrupts shareable.	2015-03-02 02:08:43 +00:00
ar71xx_fixup.c
ar71xx_fixup.h
ar71xx_gpio.c	Add GPIO function mux configuration for AR934x SoCs.	2015-03-21 06:08:35 +00:00
ar71xx_gpiovar.h	Implement GPIO_GET_BUS() method for all GPIO drivers.	2015-01-31 19:32:14 +00:00
ar71xx_macaddr.c	Begin moving support for board MAC addresses over to being explicitly defined.	2015-03-28 23:40:29 +00:00
ar71xx_macaddr.h	Begin moving support for board MAC addresses over to being explicitly defined.	2015-03-28 23:40:29 +00:00
ar71xx_machdep.c	Begin moving support for board MAC addresses over to being explicitly defined.	2015-03-28 23:40:29 +00:00
ar71xx_ohci.c	Add 64-bit DMA support in the XHCI controller driver.	2015-01-05 20:22:18 +00:00
ar71xx_pci_bus_space.c
ar71xx_pci_bus_space.h
ar71xx_pci.c
ar71xx_setup.c	Add initial Qualcomm Atheros QCA955x SoC support.	2015-01-05 02:06:26 +00:00
ar71xx_setup.h	add QCA955x SoC types.	2015-01-05 01:59:44 +00:00
ar71xx_spi.c
ar71xx_wdog.c
ar71xxreg.h	Add a MII mode for SGMII.	2015-03-02 01:23:59 +00:00
ar91xx_chip.c
ar91xx_chip.h
ar91xxreg.h
ar724x_chip.c
ar724x_chip.h
ar724x_pci.c	Fix the AR724x PCIe glue to correctly probe the BAR on AR7240 devices.	2014-09-28 07:27:58 +00:00
ar724xreg.h	Note that the AR724x PCIe registers are actually from the PCI_CTRL	2015-03-21 05:59:45 +00:00
ar933x_chip.c
ar933x_chip.h
ar933x_uart.h
ar933xreg.h
ar934x_chip.c	Add a GPIO output mux configuration method.	2015-01-03 06:55:58 +00:00
ar934x_chip.h
ar934x_nfcreg.h
ar934xreg.h	Add AR934x specific GPIO functions and output MUX configuration.	2015-01-03 06:35:53 +00:00
files.ar71xx	Start fleshing out some MAC address helper functions.	2015-03-15 21:56:12 +00:00
if_arge.c	Begin moving support for board MAC addresses over to being explicitly defined.	2015-03-28 23:40:29 +00:00
if_argevar.h	The linux driver code for the MDIO bus does a read-after-write	2015-02-02 17:33:00 +00:00
pcf2123_rtc.c
pcf2123reg.h
qca955x_chip.c	Add ethernet MAC DDR flush hookups for QCA955x.	2015-03-04 03:52:50 +00:00
qca955x_chip.h	Add initial Qualcomm Atheros QCA955x SoC support.	2015-01-05 02:06:26 +00:00
qca955xreg.h	add QCA955x PCIe configuration registers.	2015-03-21 06:00:46 +00:00
std.ar71xx
uart_bus_ar71xx.c
uart_bus_ar933x.c
uart_cpu_ar71xx.c
uart_cpu_ar933x.c
uart_dev_ar933x.c	Add support for the uart classes to set their default register shift value.	2015-04-11 17:16:23 +00:00
uart_dev_ar933x.h