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version: 21.08-rc0 Start a new release cycle with empty release notes. Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-21 16:45:21 +00:00
.. SPDX-License-Identifier: BSD-3-Clause
Copyright 2021 The DPDK contributors
.. include:: <isonum.txt>
DPDK Release 21.08
==================
New Features
------------
bus/auxiliary: introduce auxiliary bus Auxiliary bus [1] provides a way to split function into child-devices representing sub-domains of functionality. Each auxiliary device represents a part of its parent functionality. Auxiliary device is identified by unique device name, sysfs path: /sys/bus/auxiliary/devices/<name> Devargs legacy syntax of auxiliary device: -a auxiliary:<name>[,args...] Devargs generic syntax of auxiliary device: -a bus=auxiliary,name=<name>/class=<class>/driver=<driver>[,args...] [1] kernel auxiliary bus document: https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-07-05 06:45:12 +00:00
* **Added auxiliary bus support.**
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
An auxiliary bus provides a way to split a function into child-devices
bus/auxiliary: introduce auxiliary bus Auxiliary bus [1] provides a way to split function into child-devices representing sub-domains of functionality. Each auxiliary device represents a part of its parent functionality. Auxiliary device is identified by unique device name, sysfs path: /sys/bus/auxiliary/devices/<name> Devargs legacy syntax of auxiliary device: -a auxiliary:<name>[,args...] Devargs generic syntax of auxiliary device: -a bus=auxiliary,name=<name>/class=<class>/driver=<driver>[,args...] [1] kernel auxiliary bus document: https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-07-05 06:45:12 +00:00
representing sub-domains of functionality. Each auxiliary device
represents a part of its parent functionality.
eal: handle compressed firmware Introduce an internal firmware loading helper to remove code duplication in our drivers and handle xz compressed firmware by calling libarchive. This helper tries to look for .xz suffixes so that drivers are not aware the firmware has been compressed. libarchive is set as an optional dependency: without libarchive, a runtime warning is emitted so that users know there is a compressed firmware. Windows implementation is left as an empty stub. Signed-off-by: David Marchand <david.marchand@redhat.com> Reviewed-by: Igor Russkikh <irusskikh@marvell.com> Acked-by: Aaron Conole <aconole@redhat.com> Tested-by: Haiyue Wang <haiyue.wang@intel.com>
2021-07-07 12:08:18 +00:00
* **Added XZ compressed firmware support.**
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
Using ``rte_firmware_read`` a driver can now handle XZ compressed firmware
in a transparent way, with EAL uncompressing using libarchive, if this library
eal: handle compressed firmware Introduce an internal firmware loading helper to remove code duplication in our drivers and handle xz compressed firmware by calling libarchive. This helper tries to look for .xz suffixes so that drivers are not aware the firmware has been compressed. libarchive is set as an optional dependency: without libarchive, a runtime warning is emitted so that users know there is a compressed firmware. Windows implementation is left as an empty stub. Signed-off-by: David Marchand <david.marchand@redhat.com> Reviewed-by: Igor Russkikh <irusskikh@marvell.com> Acked-by: Aaron Conole <aconole@redhat.com> Tested-by: Haiyue Wang <haiyue.wang@intel.com>
2021-07-07 12:08:18 +00:00
is available when building DPDK.
net/ena: support Rx interrupt In order to support asynchronous Rx in the applications, the driver has to configure the event file descriptors and configure the HW. This patch configures appropriate data structures for the rte_ethdev layer, adds .rx_queue_intr_enable and .rx_queue_intr_disable API handlers, and configures IO queues to work in the interrupt mode, if it was requested by the application. Signed-off-by: Michal Krawczyk <mk@semihalf.com> Reviewed-by: Artur Rojek <ar@semihalf.com> Reviewed-by: Igor Chauskin <igorch@amazon.com> Reviewed-by: Shai Brandes <shaibran@amazon.com> Reviewed-by: Shay Agroskin <shayagr@amazon.com>
2021-07-23 10:24:52 +00:00
* **Updated Amazon ENA PMD.**
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
Updated the Amazon ENA PMD. The new driver version (v2.4.0) introduced
bug fixes and improvements, including:
net/ena: support Rx interrupt In order to support asynchronous Rx in the applications, the driver has to configure the event file descriptors and configure the HW. This patch configures appropriate data structures for the rte_ethdev layer, adds .rx_queue_intr_enable and .rx_queue_intr_disable API handlers, and configures IO queues to work in the interrupt mode, if it was requested by the application. Signed-off-by: Michal Krawczyk <mk@semihalf.com> Reviewed-by: Artur Rojek <ar@semihalf.com> Reviewed-by: Igor Chauskin <igorch@amazon.com> Reviewed-by: Shai Brandes <shaibran@amazon.com> Reviewed-by: Shay Agroskin <shayagr@amazon.com>
2021-07-23 10:24:52 +00:00
* Added Rx interrupt support.
net/ena: rework RSS configuration Allow user to specify his own hash key and hash ctrl if the device is supporting that. HW interprets the key in reverse byte order, so the PMD reorders the key before passing it to the ena_com layer. Default key is being set in random matter each time the device is being initialized. Moreover, make minor adjustments for reta size setting in terms of returning error values. RSS code was moved to ena_rss.c file to improve readability. Signed-off-by: Michal Krawczyk <mk@semihalf.com> Reviewed-by: Shai Brandes <shaibran@amazon.com> Reviewed-by: Shay Agroskin <shayagr@amazon.com> Reviewed-by: Amit Bernstein <amitbern@amazon.com>
2021-07-23 10:24:53 +00:00
* RSS hash function key reconfiguration support.
net/ena: support Rx interrupt In order to support asynchronous Rx in the applications, the driver has to configure the event file descriptors and configure the HW. This patch configures appropriate data structures for the rte_ethdev layer, adds .rx_queue_intr_enable and .rx_queue_intr_disable API handlers, and configures IO queues to work in the interrupt mode, if it was requested by the application. Signed-off-by: Michal Krawczyk <mk@semihalf.com> Reviewed-by: Artur Rojek <ar@semihalf.com> Reviewed-by: Igor Chauskin <igorch@amazon.com> Reviewed-by: Shai Brandes <shaibran@amazon.com> Reviewed-by: Shay Agroskin <shayagr@amazon.com>
2021-07-23 10:24:52 +00:00
net/iavf: query QoS capabilities and set queue TC mapping This patch added the support for VF to config the ETS-based Tx QoS, including querying current QoS configuration from PF and config queue TC mapping. PF QoS is configured in advance and the queried info is provided to the user for future usage. VF queues are mapped to different TCs in PF through virtchnl. Signed-off-by: Qiming Yang <qiming.yang@intel.com> Signed-off-by: Ting Xu <ting.xu@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-01 11:41:22 +00:00
* **Updated Intel iavf driver.**
* Added Tx QoS VF queue TC mapping.
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
* Added FDIR and RSS for GTPoGRE, and support for filters based on GTPU TEID/QFI,
outermost L3 or innermost L3/L4.
net/iavf: query QoS capabilities and set queue TC mapping This patch added the support for VF to config the ETS-based Tx QoS, including querying current QoS configuration from PF and config queue TC mapping. PF QoS is configured in advance and the queried info is provided to the user for future usage. VF queues are mapped to different TCs in PF through virtchnl. Signed-off-by: Qiming Yang <qiming.yang@intel.com> Signed-off-by: Ting Xu <ting.xu@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-01 11:41:22 +00:00
net/ice: add AVX2 offload Rx Add a specific path for RX AVX2. In this path, support the HW offload features, like, checksum, VLAN stripping, RSS hash. This path is chosen automatically according to the configuration. 'inline' is used, then the duplicate code is generated by the compiler. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Leyi Rong <leyi.rong@intel.com>
2021-06-29 02:29:21 +00:00
* **Updated Intel ice driver.**
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
* Added new RX and TX paths in the AVX2 code to use HW offload
net/ice: add AVX2 offload Rx Add a specific path for RX AVX2. In this path, support the HW offload features, like, checksum, VLAN stripping, RSS hash. This path is chosen automatically according to the configuration. 'inline' is used, then the duplicate code is generated by the compiler. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Leyi Rong <leyi.rong@intel.com>
2021-06-29 02:29:21 +00:00
features. When the HW offload features are configured to be used, the
offload paths are chosen automatically. In parallel the support for HW
offload features was removed from the legacy AVX2 paths.
net/ice: support QoS config VF bandwidth in DCF This patch supports the ETS-based QoS configuration. It enables the DCF to configure bandwidth limits for each VF VSI of different TCs. A hierarchy scheduler tree is built with port, TC and VSI nodes. Signed-off-by: Qiming Yang <qiming.yang@intel.com> Signed-off-by: Ting Xu <ting.xu@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-01 11:41:21 +00:00
* Added Tx QoS TC bandwidth configuration in DCF.
net/ice: add AVX2 offload Rx Add a specific path for RX AVX2. In this path, support the HW offload features, like, checksum, VLAN stripping, RSS hash. This path is chosen automatically according to the configuration. 'inline' is used, then the duplicate code is generated by the compiler. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Leyi Rong <leyi.rong@intel.com>
2021-06-29 02:29:21 +00:00
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
* **Added support for Marvell CN10K SoC Ethernet device.**
net/cnxk: add build infra and common probing Add build infrastructure and common probe and remove for cnxk driver which is used by both CN10K and CN9K SoC. Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-23 04:46:09 +00:00
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
* Added net/cnxk driver which provides the support for the integrated Ethernet
net/cnxk: add build infra and common probing Add build infrastructure and common probe and remove for cnxk driver which is used by both CN10K and CN9K SoC. Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-23 04:46:09 +00:00
device.
net/mlx5: validate meter action in policy This adds the validation when creating a policy with meter action. Currently meter action is only allowed for green color in policy, and 8 meters are supported at maximum in one meter hierarchy. Signed-off-by: Shun Hao <shunh@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-06 13:14:50 +00:00
* **Updated Mellanox mlx5 driver.**
net/mlx5: support Sub-Function Introduce SF support. Similar to VF, SF on auxiliary bus is a portion of hardware PF, no representor or bonding parameters for SF. Devargs to support SF: -a auxiliary:mlx5_core.sf.8,dv_flow_en=1 New global syntax to support SF: -a bus=auxiliary,name=mlx5_core.sf.8/class=eth/driver=mlx5,dv_flow_en=1 Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-21 14:37:35 +00:00
* Added Sub-Function support based on auxiliary bus.
net/mlx5: validate meter action in policy This adds the validation when creating a policy with meter action. Currently meter action is only allowed for green color in policy, and 8 meters are supported at maximum in one meter hierarchy. Signed-off-by: Shun Hao <shunh@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-06 13:14:50 +00:00
* Added support for meter hierarchy.
net/mlx5: support yellow in meter policy validation In the previous implementation, the policy for yellow color was not supported. The action validation for yellow was skipped. Since the yellow color policy needs to be supported, the validation should also be done for the yellow color. In the meanwhile, due to the fact that color policies of one meter should be used for the same flow(s), the domains supported of both colors should be the same. If both of the colors have RSS as the termination actions, except the queues, all other parameters of RSS should be the same. Signed-off-by: Bing Zhao <bingz@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-21 08:54:19 +00:00
* Added support for metering policy actions of yellow color.
net/mlx5: support meter for trTCM profiles The support of RFC2698 and RFC4115 are added in mlx5 PMD. Only the ASO metering supports these two profiles. Signed-off-by: Bing Zhao <bingz@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-21 08:54:21 +00:00
* Added support for metering trTCM RFC2698 and RFC4115.
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
* Added devargs option ``allow_duplicate_pattern``.
net/mlx5: support flow matchng on IPv4 IHL Query MLX5 port hardware if it is capable to offload IPv4 IHL field. Provide flow rules capability to match on IPv4 IHL field. Minimal HCA firmware version required to offload IPv4 IHL is xx_30_2000. Signed-off-by: Gregory Etelson <getelson@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-05 11:40:35 +00:00
* Added matching on IPv4 Internet Header Length (IHL).
net/mlx5: support matching on VXLAN reserved field This adds matching on the reserved field of VXLAN header (the last 8-bits). The capability from rdma-core is detected by creating a dummy matcher using misc5 when the device is probed. For non-zero groups and FDB domain, the capability is detected from rdma-core, meanwhile for NIC domain group zero it's relying on the HCA_CAP from FW. Signed-off-by: Rongwei Liu <rongweil@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> Acked-by: Raslan Darawsheh <rasland@nvidia.com>
2021-07-13 12:09:19 +00:00
* Added support for matching on VXLAN header last 8-bits reserved field.
doc: add multi-thread flow rate optimizations for mlx5 This commit adds the multiple-thread flow insertion optimization description. Signed-off-by: Suanming Mou <suanmingm@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-13 08:45:00 +00:00
* Optimized multi-thread flow rule insertion rate.
net/mlx5: validate meter action in policy This adds the validation when creating a policy with meter action. Currently meter action is only allowed for green color in policy, and 8 meters are supported at maximum in one meter hierarchy. Signed-off-by: Shun Hao <shunh@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-06 13:14:50 +00:00
net/sfc: support flow action count in transfer rules For now, a rule may have only one dedicated counter, shared counters are not supported. HW delivers (or "streams") counter readings using special packets. The driver creates a dedicated Rx queue to receive such packets and requests that HW start "streaming" the readings to it. The counter queue is polled periodically, and the first available service core is used for that. Hence, the user has to specify at least one service core for counters to work. Such a core is shared by all MAE-capable devices managed by sfc driver. Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru> Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Reviewed-by: Andy Moreton <amoreton@xilinx.com> Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-02 08:39:47 +00:00
* **Updated Solarflare network PMD.**
Updated the Solarflare ``sfc_efx`` driver with changes including:
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
* Added COUNT action support for SN1000 NICs.
* **Added Wangxun ngbe PMD.**
fix PMD wording Removing the use of driver following PMD as its unnecessary. Cc: stable@dpdk.org Signed-off-by: Sean Morrissey <sean.morrissey@intel.com> Signed-off-by: Conor Fogarty <conor.fogarty@intel.com> Acked-by: John McNamara <john.mcnamara@intel.com> Reviewed-by: Conor Walsh <conor.walsh@intel.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-11-22 10:50:44 +00:00
Added a new PMD for Wangxun 1Gb Ethernet NICs.
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
See the :doc:`../nics/ngbe` for more details.
net/sfc: support flow action count in transfer rules For now, a rule may have only one dedicated counter, shared counters are not supported. HW delivers (or "streams") counter readings using special packets. The driver creates a dedicated Rx queue to receive such packets and requests that HW start "streaming" the readings to it. The counter queue is polled periodically, and the first available service core is used for that. Hence, the user has to specify at least one service core for counters to work. Such a core is shared by all MAE-capable devices managed by sfc driver. Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru> Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Reviewed-by: Andy Moreton <amoreton@xilinx.com> Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-02 08:39:47 +00:00
vhost: add unsafe async API to clear packets Applications need to stop DMA transfers and finish all the inflight packets when in VM memory hot-plug case and async vhost is used. This patch is to provide an unsafe API to clear inflight packets which are submitted to DMA engine in vhost async data path. Update the program guide and release notes for virtqueue inflight packets clear API in vhost lib. Signed-off-by: Cheng Jiang <cheng1.jiang@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-07-23 08:09:35 +00:00
* **Added inflight packets clear API in vhost library.**
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
Added an API which can clear the inflight packets submitted to
the DMA engine in the vhost async data path.
vhost: add unsafe async API to clear packets Applications need to stop DMA transfers and finish all the inflight packets when in VM memory hot-plug case and async vhost is used. This patch is to provide an unsafe API to clear inflight packets which are submitted to DMA engine in vhost async data path. Update the program guide and release notes for virtqueue inflight packets clear API in vhost lib. Signed-off-by: Cheng Jiang <cheng1.jiang@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-07-23 08:09:35 +00:00
common/qat: support GEN4 devices This commit adds support for fourth generation (GEN4) of Intel QuickAssist (QAT) Technology devices. Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-28 16:34:20 +00:00
* **Updated Intel QuickAssist crypto PMD.**
Added fourth generation of QuickAssist Technology(QAT) devices support.
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
Only symmetric crypto has been currently enabled. Compression and asymmetric
common/qat: support GEN4 devices This commit adds support for fourth generation (GEN4) of Intel QuickAssist (QAT) Technology devices. Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-28 16:34:20 +00:00
crypto PMD will fail to create.
crypto/cnxk: add symmetric capabilities Add symmetric crypto capabilities for cn9k & cn10k. Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com> Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Archana Muniganti <marchana@marvell.com> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-25 05:56:30 +00:00
* **Added support for Marvell CNXK crypto driver.**
* Added cnxk crypto PMD which provides support for an integrated
crypto driver for CN9K and CN10K series of SOCs. Support for
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
symmetric crypto algorithms was added to both the PMDs.
crypto/cnxk: add security capabilities Add security capabilities supported by crypto cn10k PMD. Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Srujana Challa <schalla@marvell.com> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-29 07:34:32 +00:00
* Added support for lookaside protocol (IPsec) offload in cn10k PMD.
test/crypto: add cnxk for asymmetric cases Registered cn9k and cn10k for asymmetric crypto autotest. Documentation and release notes are also updated. Signed-off-by: Kiran Kumar K <kirankumark@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-29 07:34:36 +00:00
* Added support for asymmetric crypto operations in cn9k and cn10k PMD.
crypto/cnxk: add symmetric capabilities Add symmetric crypto capabilities for cn9k & cn10k. Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com> Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Archana Muniganti <marchana@marvell.com> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-25 05:56:30 +00:00
crypto/octeontx: add crypto adapter data path Added support for crypto adapter OP_FORWARD mode. As OcteonTx CPT crypto completions could be out of order, each crypto op is enqueued to CPT, dequeued from CPT and enqueued to SSO one-by-one. Signed-off-by: Shijith Thotton <sthotton@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-23 20:53:50 +00:00
* **Updated Marvell OCTEON TX crypto PMD.**
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
Added support for crypto adapter ``OP_FORWARD`` mode.
crypto/octeontx: add crypto adapter data path Added support for crypto adapter OP_FORWARD mode. As OcteonTx CPT crypto completions could be out of order, each crypto op is enqueued to CPT, dequeued from CPT and enqueued to SSO one-by-one. Signed-off-by: Shijith Thotton <sthotton@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-23 20:53:50 +00:00
crypto/mlx5: support statistics operations This commit adds mlx5 crypto statistic get and reset operations. Signed-off-by: Suanming Mou <suanmingm@nvidia.com> Signed-off-by: Matan Azrad <matan@nvidia.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 13:09:41 +00:00
* **Added support for Nvidia crypto device driver.**
Added mlx5 crypto driver to support AES-XTS cipher operations.
The first device to support it is ConnectX-6.
compress/isal: support Arm platform Isal compress PMD has build failures on Arm platform. As dependent library ISA-L is supported on Arm platform, support of the PMD is expanded to Arm architecture. Fixed build failure caused by architecture specific code, and made the PMD multi architecture compatible. Bugzilla ID: 755 Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-07-15 08:05:02 +00:00
* **Updated ISAL compress device PMD.**
The ISAL compress device PMD now supports Arm platforms.
raw/cnxk_bphy: add BPHY CGX/RPM skeleton driver Add baseband PHY CGX/RPM skeleton driver which merely probes a matching device. CGX/RPM are Ethernet MACs hardwired to baseband subsystem. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-06-21 15:04:26 +00:00
* **Added Baseband PHY CNXK PMD.**
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
Added Baseband PHY PMD which allows configuration of the BPHY hardware block
raw/cnxk_bphy: add BPHY CGX/RPM skeleton driver Add baseband PHY CGX/RPM skeleton driver which merely probes a matching device. CGX/RPM are Ethernet MACs hardwired to baseband subsystem. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-06-21 15:04:26 +00:00
comprising accelerators and DSPs specifically tailored for 5G/LTE inline
doc: fix spelling Spell checked and corrected documentation. If there are any errors, or I have changed something that wasn't an error please reach out to me so I can update the dictionary. Cc: stable@dpdk.org Signed-off-by: Henry Nadeau <hnadeau@iol.unh.edu>
2021-07-29 16:48:05 +00:00
use cases. Configuration happens via standard rawdev enq/deq operations. See
raw/cnxk_bphy: add BPHY CGX/RPM skeleton driver Add baseband PHY CGX/RPM skeleton driver which merely probes a matching device. CGX/RPM are Ethernet MACs hardwired to baseband subsystem. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-06-21 15:04:26 +00:00
the :doc:`../rawdevs/cnxk_bphy` rawdev guide for more details on this driver.
event/cnxk: support Tx adapter Add support for event eth Tx adapter. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-07-14 09:02:03 +00:00
* **Added support for Marvell CN10K, CN9K, event Rx/Tx adapter.**
event/cnxk: support Rx adapter Add support for event eth Rx adapter. Resize cn10k workslot fastpath structure to fit in 64B cacheline size. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-14 09:02:01 +00:00
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
* Added Rx/Tx adapter support for event/cnxk when the Ethernet device requested
event/cnxk: support Rx adapter Add support for event eth Rx adapter. Resize cn10k workslot fastpath structure to fit in 64B cacheline size. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-14 09:02:01 +00:00
is net/cnxk.
event/cnxk: support vectorized Tx event fast path Add Tx event vector fastpath, integrate event vector Tx routine into Tx burst. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-14 09:02:07 +00:00
* Added support for event vectorization for Rx/Tx adapter.
event/cnxk: support Rx adapter Add support for event eth Rx adapter. Resize cn10k workslot fastpath structure to fit in 64B cacheline size. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-14 09:02:01 +00:00
power: support cppc_cpufreq driver Currently in DPDK only acpi_cpufreq and pstate_cpufreq drivers are supported, which are both not available on arm64 platforms. Add support for cppc_cpufreq driver which works on most arm64 platforms. Signed-off-by: Richael Zhuang <richael.zhuang@arm.com> Acked-by: David Hunt <david.hunt@intel.com>
2021-07-09 10:55:47 +00:00
* **Added cppc_cpufreq support to Power Management library.**
Added support for cppc_cpufreq driver which works on most arm64 platforms.
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
* **Added multi-queue support to Ethernet PMD Power Management.**
power: support callbacks for multiple Rx queues Currently, there is a hard limitation on the PMD power management support that only allows it to support a single queue per lcore. This is not ideal as most DPDK use cases will poll multiple queues per core. The PMD power management mechanism relies on ethdev Rx callbacks, so it is very difficult to implement such support because callbacks are effectively stateless and have no visibility into what the other ethdev devices are doing. This places limitations on what we can do within the framework of Rx callbacks, but the basics of this implementation are as follows: - Replace per-queue structures with per-lcore ones, so that any device polled from the same lcore can share data - Any queue that is going to be polled from a specific lcore has to be added to the list of queues to poll, so that the callback is aware of other queues being polled by the same lcore - Both the empty poll counter and the actual power saving mechanism is shared between all queues polled on a particular lcore, and is only activated when all queues in the list were polled and were determined to have no traffic. - The limitation on UMWAIT-based polling is not removed because UMWAIT is incapable of monitoring more than one address. Also, while we're at it, update and improve the docs. Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Tested-by: David Hunt <david.hunt@intel.com>
2021-07-09 16:08:15 +00:00
The experimental PMD power management API now supports managing
multiple Ethernet Rx queues per lcore.
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
* **Updated testpmd to output log errors to stderr.**
app/testpmd: send failure logs to stderr Running with stdout suppressed or redirected for further processing is very confusing in the case of errors. Fix it by logging errors and warnings to stderr. Since lines with log messages are touched anyway concatenate split format strings to make it easier to search using grep. Fix indent of format string arguments. Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
2021-06-17 14:20:25 +00:00
doc: update release notes for 21.08 Fix grammar, spelling and formatting of DPDK 21.08 release notes. Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-05 21:57:13 +00:00
Updated testpmd application to output log errors and warnings to stderr
instead of stdout.
version: 21.08-rc0 Start a new release cycle with empty release notes. Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-21 16:45:21 +00:00
API Changes
-----------
eal: save error in string copy The string copy api rte_strscpy() did not set rte_errno during failures, instead it just returned negative error number. Set rte_errrno if the destination buffer is too small. Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Xueming Li <xuemingl@nvidia.com> Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-06-13 08:24:21 +00:00
* eal: ``rte_strscpy`` sets ``rte_errno`` to ``E2BIG`` in case of string
truncation.
eal: fix argument in 32-bit safe BSF function The first argument to rte_bsf32_safe was incorrectly declared as a 64 bit value. The code only works on 32 bit values and the underlying function rte_bsf32 only accepts 32 bit values. This was a mistake introduced when the safe version was added and probably cause by copy/paste from the 64 bit version. The bug passed silently under the radar until some other code was built with -Wall and -Wextra in C++ and C++ complains about the missing cast. Yes, this is a API signature change, but the original code was wrong. It is an inline so not an ABI change. Fixes: 4e261f551986 ("eal: add 64-bit bsf and 32-bit safe bsf functions") Cc: stable@dpdk.org Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2021-07-23 15:45:46 +00:00
* eal: ``rte_bsf32_safe`` now takes a 32-bit value for its first argument.
This fixes warnings about loss of precision
when used with some compilers settings.
eal: use callbacks for power monitoring comparison Previously, the semantics of power monitor were such that we were checking current value against the expected value, and if they matched, then the sleep was aborted. This is somewhat inflexible, because it only allowed us to check for a specific value in a specific way. This commit replaces the comparison with a user callback mechanism, so that any PMD (or other code) using `rte_power_monitor()` can define their own comparison semantics and decision making on how to detect the need to abort the entering of power optimized state. Existing implementations are adjusted to follow the new semantics. Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Tested-by: David Hunt <david.hunt@intel.com> Acked-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-07-09 16:08:10 +00:00
* eal: ``rte_power_monitor`` and the ``rte_power_monitor_cond`` struct changed
to use a callback mechanism.
power: make ethdev power management thread unsafe Currently, we expect that only one callback can be active at any given moment, for a particular queue configuration, which is relatively easy to implement in a thread-safe way. However, we're about to add support for multiple queues per lcore, which will greatly increase the possibility of various race conditions. We could have used something like an RCU for this use case, but absent of a pressing need for thread safety we'll go the easy way and just mandate that the API's are to be called when all affected ports are stopped, and document this limitation. This greatly simplifies the `rte_power_monitor`-related code. Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Tested-by: David Hunt <david.hunt@intel.com>
2021-07-09 16:08:14 +00:00
* rte_power: The experimental PMD power management API is no longer considered
to be thread safe; all Rx queues affected by the API will now need to be
stopped before making any changes to the power management scheme.
version: 21.08-rc0 Start a new release cycle with empty release notes. Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-21 16:45:21 +00:00
ABI Changes
-----------
* No ABI change that would break compatibility with 20.11.
Known Issues
------------
doc: add known issue with mbuf segment A bug with segmented packets has been discovered but the agreement to apply the fix is not concluded at the time of DPDK 21.08 release. This bug seems to be in DPDK for many years and should be fixed in 21.11. Suggested-by: Olivier Matz <olivier.matz@6wind.com> Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Acked-by: Morten Brørup <mb@smartsharesystems.com>
2021-08-04 13:29:52 +00:00
* **Last mbuf segment not implicitly reset.**
It is expected that free mbufs have their field ``nb_seg`` set to 1,
so that when it is allocated, the user does not need to set its value.
The mbuf free functions are responsible of resetting this field to 1
before returning the mbuf to the pool.
When a multi-segment mbuf is freed, the field ``nb_seg`` is not reset
to 1 for the last segment of the chain. On next allocation of this segment,
if the field is not explicitly reset by the user,
an invalid mbuf can be created, and can cause an undefined behavior.
This issue has a root cause in DPDK 17.05, meaning it is 4 years old.
A fix is available and discussed but not merged in DPDK 21.08:
https://patches.dpdk.org/patch/86458/
version: 21.08-rc0 Start a new release cycle with empty release notes. Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-21 16:45:21 +00:00
Tested Platforms
----------------
doc: add tested Intel platforms with Intel NICs Add tested Intel platforms with Intel NICs to v21.08 release note. Signed-off-by: Yan Xia <yanx.xia@intel.com>
2021-08-04 14:20:24 +00:00
* Intel\ |reg| platforms with Intel\ |reg| NICs combinations
* CPU
* Intel\ |reg| Atom\ |trade| CPU C3958 @ 2.00GHz
* Intel\ |reg| Atom\ |trade| CPU C3758 @ 2.20GHz
* Intel\ |reg| Xeon\ |reg| CPU D-1541 @ 2.10GHz
* Intel\ |reg| Xeon\ |reg| CPU D-1553N @ 2.30GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2680 v2 @ 2.80GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2699 v3 @ 2.30GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2699 v4 @ 2.20GHz
* Intel\ |reg| Xeon\ |reg| Gold 6140M CPU @ 2.30GHz
* Intel\ |reg| Xeon\ |reg| Gold 6139 CPU @ 2.30GHz
* Intel\ |reg| Xeon\ |reg| Gold 6252N CPU @ 2.30GHz
* Intel\ |reg| Xeon\ |reg| Platinum 8180 CPU @ 2.50GHz
* Intel\ |reg| Xeon\ |reg| Platinum 8180M CPU @ 2.50GHz
* Intel\ |reg| Xeon\ |reg| Platinum 8280M CPU @ 2.70GHz
* OS:
* Fedora 34
* OpenWRT 19.07.4
* FreeBSD 12.1
* Red Hat Enterprise Linux Server release 8.3
* Suse 15 SP2
* Ubuntu 20.04
* Ubuntu 21.04
* NICs:
* Intel\ |reg| Ethernet Controller E810-C for SFP (4x25G)
* Firmware version: 3.10
* Device id (pf/vf): 8086:1593 / 8086:1889
* Driver version: 1.7.0 (ice)
* OS Default DDP: 1.3.27.0
* COMMS DDP: 1.3.31.0
* Wireless Edge DDP: 1.3.7.0
* Intel\ |reg| Ethernet Controller E810-C for QSFP (2x100G)
* Firmware version: 3.10
* Device id (pf/vf): 8086:1592 / 8086:1889
* Driver version: 1.7.0 (ice)
* OS Default DDP: 1.3.27.0
* COMMS DDP: 1.3.31.0
* Wireless Edge DDP: 1.3.7.0
* Intel\ |reg| 82599ES 10 Gigabit Ethernet Controller
* Firmware version: 0x61bf0001
* Device id (pf/vf): 8086:10fb / 8086:10ed
* Driver version: 5.1.0-k (ixgbe)
* Intel\ |reg| Corporation Ethernet Connection X552/X557-AT 10GBASE-T
* Firmware version: 0x800003e7
* Device id (pf/vf): 8086:15ad / 8086:15a8
* Driver version: 5.1.0-k (ixgbe)
* Intel\ |reg| Corporation Ethernet Controller 10G X550T
* Firmware version: 0x8000113b
* Device id (pf): 8086:1563
* Driver version: 5.11.3 (ixgbe)
* Intel\ |reg| Ethernet Controller 10-Gigabit X540-AT2
* Firmware version: 0x800005f9
* Device id (pf): 8086:1528
* Driver version: 4.18.0-305.7.1.el8_4.x86_64 (ixgbe)
* Intel\ |reg| Ethernet Converged Network Adapter X710-DA4 (4x10G)
* Firmware version: 8.30 0x8000a49d 1.2926.0
* Device id (pf/vf): 8086:1572 / 8086:154c
* Driver version: 2.15.9 (i40e)
* Intel\ |reg| Corporation Ethernet Connection X722 for 10GbE SFP+ (4x10G)
* Firmware version: 5.30 0x80002a29 1.2926.0
* Device id (pf/vf): 8086:37d0 / 8086:37cd
* Driver version: 2.15.9 (i40e)
* Intel\ |reg| Corporation Ethernet Connection X722 for 10GBASE-T (2x10G)
* Firmware version: 4.10 0x80001a7a 1.2154.0
* Device id (pf/vf): 8086:37d2 / 8086:37cd
* Driver version: 2.15.9 (i40e)
* Intel\ |reg| Ethernet Converged Network Adapter XXV710-DA2 (2x25G)
* Firmware version: 8.30 0x8000a485 1.2926.0
* Device id (pf/vf): 8086:158b / 8086:154c
* Driver version: 2.15.9 (i40e)
* Intel\ |reg| Ethernet Converged Network Adapter XL710-QDA2 (2X40G)
* Firmware version: 8.30 0x8000a4ae 1.2926.0
* Device id (pf/vf): 8086:1583 / 8086:154c
* Driver version: 2.15.9 (i40e)
* Intel\ |reg| Ethernet Converged Network Adapter X710-T2L
* Firmware version: 8.30 0x8000a489 1.2926.0
* Device id (pf): 8086:15ff
* Driver version: 2.15.9 (i40e)
doc: add tested platforms with Mellanox NICs Add tested platforms with Mellanox NICs to the 21.08 release notes. Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
2021-08-04 12:54:47 +00:00
* Intel\ |reg| platforms with Mellanox\ |reg| NICs combinations
* CPU:
* Intel\ |reg| Xeon\ |reg| Gold 6154 CPU @ 3.00GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2697A v4 @ 2.60GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2697 v3 @ 2.60GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2680 v2 @ 2.80GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2670 0 @ 2.60GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2650 v4 @ 2.20GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2650 v3 @ 2.30GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2640 @ 2.50GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2650 0 @ 2.00GHz
* Intel\ |reg| Xeon\ |reg| CPU E5-2620 v4 @ 2.10GHz
* OS:
* Red Hat Enterprise Linux release 8.2 (Ootpa)
* Red Hat Enterprise Linux Server release 7.8 (Maipo)
* Red Hat Enterprise Linux Server release 7.6 (Maipo)
* Red Hat Enterprise Linux Server release 7.5 (Maipo)
* Red Hat Enterprise Linux Server release 7.4 (Maipo)
* Red Hat Enterprise Linux Server release 7.3 (Maipo)
* Red Hat Enterprise Linux Server release 7.2 (Maipo)
* Ubuntu 20.04
* Ubuntu 18.04
* Ubuntu 16.04
* SUSE Enterprise Linux 15 SP2
* SUSE Enterprise Linux 12 SP4
* OFED:
* MLNX_OFED 5.4-1.0.3.0 and above
* MLNX_OFED 5.3-1.0.0.1
* upstream kernel:
* Linux 5.14.0-rc3 and above
* rdma-core:
* rdma-core-36.0 and above
* NICs:
* Mellanox\ |reg| ConnectX\ |reg|-3 Pro 40G MCX354A-FCC_Ax (2x40G)
* Host interface: PCI Express 3.0 x8
* Device ID: 15b3:1007
* Firmware version: 2.42.5000
* Mellanox\ |reg| ConnectX\ |reg|-3 Pro 40G MCX354A-FCCT (2x40G)
* Host interface: PCI Express 3.0 x8
* Device ID: 15b3:1007
* Firmware version: 2.42.5000
* Mellanox\ |reg| ConnectX\ |reg|-4 Lx 25G MCX4121A-ACAT (2x25G)
* Host interface: PCI Express 3.0 x8
* Device ID: 15b3:1015
* Firmware version: 14.31.1014 and above
* Mellanox\ |reg| ConnectX\ |reg|-4 Lx 50G MCX4131A-GCAT (1x50G)
* Host interface: PCI Express 3.0 x8
* Device ID: 15b3:1015
* Firmware version: 14.31.1014 and above
* Mellanox\ |reg| ConnectX\ |reg|-5 100G MCX516A-CCAT (2x100G)
* Host interface: PCI Express 3.0 x16
* Device ID: 15b3:1017
* Firmware version: 16.31.1014 and above
* Mellanox\ |reg| ConnectX\ |reg|-5 100G MCX556A-ECAT (2x100G)
* Host interface: PCI Express 3.0 x16
* Device ID: 15b3:1017
* Firmware version: 16.31.1014 and above
* Mellanox\ |reg| ConnectX\ |reg|-5 100G MCX556A-EDAT (2x100G)
* Host interface: PCI Express 3.0 x16
* Device ID: 15b3:1017
* Firmware version: 16.31.1014 and above
* Mellanox\ |reg| ConnectX\ |reg|-5 Ex EN 100G MCX516A-CDAT (2x100G)
* Host interface: PCI Express 4.0 x16
* Device ID: 15b3:1019
* Firmware version: 16.31.1014 and above
* Mellanox\ |reg| ConnectX\ |reg|-6 Dx EN 100G MCX623106AN-CDAT (2x100G)
* Host interface: PCI Express 4.0 x16
* Device ID: 15b3:101d
* Firmware version: 22.31.1014 and above
* Mellanox\ |reg| ConnectX\ |reg|-6 Lx EN 25G MCX631102AN-ADAT (2x25G)
* Host interface: PCI Express 4.0 x8
* Device ID: 15b3:101f
* Firmware version: 26.31.1014 and above
* Mellanox\ |reg| BlueField\ |reg| SmartNIC
* Mellanox\ |reg| BlueField\ |reg| 2 SmartNIC MT41686 - MBF2H332A-AEEOT_A1 (2x25G)
* Host interface: PCI Express 3.0 x16
* Device ID: 15b3:a2d6
* Firmware version: 24.31.1014 and above
* Embedded software:
* CentOS Linux release 7.6.1810 (AltArch)
* MLNX_OFED 5.4-1.0.3.0 and above
* DPDK application running on Arm cores
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