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doc: programmers guide

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The 1.7 DPDK_Prog_Guide document in MSWord has been converted to rst format for
use with Sphinx. There is an rst file for each chapter and an index.rst file
which contains the table of contents.
The top level index file has been modified to include this guide.

This document contains some png image files. If any of these png files are modified
they should be replaced with an svg file.

This is the sixth document from a set of 6 documents.

Signed-off-by:  Bernard Iremonger <bernard.iremonger@intel.com>
This commit is contained in:
Bernard Iremonger 2014-11-14 11:53:41 +00:00 committed by Thomas Monjalon
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commit fc1f2750a3
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linux_gsg/index
freebsd_gsg/index
prog_guide/index
sample_app_ug/index
testpmd_app_ug/index
rel_notes/index

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.. _Building_Your_Own_Application:
Building Your Own Application
=============================
Compiling a Sample Application in the Development Kit Directory
---------------------------------------------------------------
When compiling a sample application (for example, hello world), the following variables must be exported:
RTE_SDK and RTE_TARGET.
.. code-block:: console
~/DPDK$ cd examples/helloworld/
~/DPDK/examples/helloworld$ export RTE_SDK=/home/user/DPDK
~/DPDK/examples/helloworld$ export RTE_TARGET=x86_64-native-linuxapp-gcc
~/DPDK/examples/helloworld$ make
CC main.o
LD helloworld
INSTALL-APP helloworld
INSTALL-MAP helloworld.map
The binary is generated in the build directory by default:
.. code-block:: console
~/DPDK/examples/helloworld$ ls build/app
helloworld helloworld.map
Build Your Own Application Outside the Development Kit
------------------------------------------------------
The sample application (Hello World) can be duplicated in a new directory as a starting point for your development:
.. code-block:: console
~$ cp -r DPDK/examples/helloworld my_rte_app
~$ cd my_rte_app/
~/my_rte_app$ export RTE_SDK=/home/user/DPDK
~/my_rte_app$ export RTE_TARGET=x86_64-native-linuxapp-gcc
~/my_rte_app$ make
CC main.o
LD helloworld
INSTALL-APP helloworld
INSTALL-MAP helloworld.map
Customizing Makefiles
---------------------
Application Makefile
~~~~~~~~~~~~~~~~~~~~
The default makefile provided with the Hello World sample application is a good starting point. It includes:
* $(RTE_SDK)/mk/DPDK.vars.mk at the beginning
* $(RTE_SDK)/mk/DPDK.extapp.mk at the end
The user must define several variables:
* APP: Contains the name of the application.
* SRCS-y: List of source files (\*.c, \*.S).
Library Makefile
~~~~~~~~~~~~~~~~
It is also possible to build a library in the same way:
* Include $(RTE_SDK)/mk/DPDK.vars.mk at the beginning.
* Include $(RTE_SDK)/mk/DPDK.extlib.mk at the end.
The only difference is that APP should be replaced by LIB, which contains the name of the library. For example, libfoo.a.
Customize Makefile Actions
~~~~~~~~~~~~~~~~~~~~~~~~~~
Some variables can be defined to customize Makefile actions. The most common are listed below. Refer to
:ref:`Makefile Description <Makefile_Description>` section in
:ref:`Development Kit Build System <Development_Kit_Build_System>`
chapter for details.
* VPATH: The path list where the build system will search for sources. By default,
RTE_SRCDIR will be included in VPATH.
* CFLAGS_my_file.o: The specific flags to add for C compilation of my_file.c.
* CFLAGS: The flags to use for C compilation.
* LDFLAGS: The flags to use for linking.
* CPPFLAGS: The flags to use to provide flags to the C preprocessor (only useful when assembling .S files)
* LDLIBS: A list of libraries to link with (for example, -L /path/to/libfoo - lfoo)
* NO_AUTOLIBS: If set, the libraries provided by the framework will not be included in the LDLIBS variable automatically.

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.. _Development_Kit_Build_System:
Development Kit Build System
============================
The Intel® DPDK requires a build system for compilation activities and so on.
This section describes the constraints and the mechanisms used in the Intel® DPDK framework.
There are two use-cases for the framework:
* Compilation of the Intel® DPDK libraries and sample applications;
the framework generates specific binary libraries,
include files and sample applications
* Compilation of an external application or library, using an installed binary Intel® DPDK
Building the Development Kit Binary
-----------------------------------
The following provides details on how to build the Intel® DPDK binary.
Build Directory Concept
~~~~~~~~~~~~~~~~~~~~~~~
After installation, a build directory structure is created.
Each build directory contains include files, libraries, and applications:
.. code-block:: console
~/DPDK$ ls
app MAINTAINERS
config Makefile
COPYRIGHT mk
doc scripts
examples lib
tools x86_64-native-linuxapp-gcc
x86_64-native-linuxapp-icc i686-native-linuxapp-gcc
i686-native-linuxapp-icc
...
~/DEV/DPDK$ ls i686-native-linuxapp-gcc
app build hostapp include kmod lib Makefile
~/DEV/DPDK$ ls i686-native-linuxapp-gcc/app/
cmdline_test dump_cfg test testpmd
cmdline_test.map dump_cfg.map test.map
testpmd.map
~/DEV/DPDK$ ls i686-native-linuxapp-gcc/lib/
libethdev.a librte_hash.a librte_mbuf.a librte_pmd_ixgbe.a
librte_cmdline.a librte_lpm.a librte_mempool.a librte_ring.a
librte_eal.a librte_malloc.a librte_pmd_e1000.a librte_timer.a
~/DEV/DPDK$ ls i686-native-linuxapp-gcc/include/
arch rte_cpuflags.h rte_memcpy.h
cmdline_cirbuf.h rte_cycles.h rte_memory.h
cmdline.h rte_debug.h rte_mempool.h
cmdline_parse_etheraddr.h rte_eal.h rte_memzone.h
cmdline_parse.h rte_errno.h rte_pci_dev_ids.h
cmdline_parse_ipaddr.h rte_ethdev.h rte_pci.h
cmdline_parse_num.h rte_ether.h rte_per_lcore.h
cmdline_parse_portlist.h rte_fbk_hash.h rte_prefetch.h
cmdline_parse_string.h rte_hash_crc.h rte_random.h
cmdline_rdline.h rte_hash.h rte_ring.h
cmdline_socket.h rte_interrupts.h rte_rwlock.h
cmdline_vt100.h rte_ip.h rte_sctp.h
exec-env rte_jhash.h rte_spinlock.h
rte_alarm.h rte_launch.h rte_string_fns.h
rte_atomic.h rte_lcore.h rte_tailq.h
rte_branch_prediction.h rte_log.h rte_tcp.h
rte_byteorder.h rte_lpm.h rte_timer.h
rte_common.h rte_malloc.h rte_udp.h
rte_config.h rte_mbuf.h
A build directory is specific to a configuration that includes architecture + execution environment + toolchain.
It is possible to have several build directories sharing the same sources with different configurations.
For instance, to create a new build directory called my_sdk_build_dir using the default configuration template config/defconfig_x86_64-linuxapp,
we use:
.. code-block:: console
cd ${RTE_SDK}
make config T=x86_64-native-linuxapp-gcc O=my_sdk_build_dir
This creates a new my_sdk_build_dir directory. After that, we can compile by doing:
.. code-block:: console
cd my_sdk_build_dir
make
which is equivalent to:
.. code-block:: console
make O=my_sdk_build_dir
The content of the my_sdk_build_dir is then:
::
-- .config # used configuration
-- Makefile # wrapper that calls head Makefile
# with $PWD as build directory
-- build #All temporary files used during build
+--app # process, including . o, .d, and .cmd files.
| +-- test # For libraries, we have the .a file.
| +-- test.o # For applications, we have the elf file.
| `-- ...
+-- lib
+-- librte_eal
| `-- ...
+-- librte_mempool
| +-- mempool-file1.o
| +-- .mempool-file1.o.cmd
| +-- .mempool-file1.o.d
| +-- mempool-file2.o
| +-- .mempool-file2.o.cmd
| +-- .mempool-file2.o.d
| `-- mempool.a
`-- ...
-- include # All include files installed by libraries
+-- librte_mempool.h # and applications are located in this
+-- rte_eal.h # directory. The installed files can depend
+-- rte_spinlock.h # on configuration if needed (environment,
+-- rte_atomic.h # architecture, ..)
`-- \*.h ...
-- lib # all compiled libraries are copied in this
+-- librte_eal.a # directory
+-- librte_mempool.a
`-- \*.a ...
-- app # All compiled applications are installed
+ --test # here. It includes the binary in elf format
Refer to
:ref:`Development Kit Root Makefile Help <Development_Kit_Root_Makefile_Help>`
for details about make commands that can be used from the root of Intel® DPDK.
Building External Applications
------------------------------
Since Intel® DPDK is in essence a development kit, the first objective of end users will be to create an application using this SDK.
To compile an application, the user must set the RTE_SDK and RTE_TARGET environment variables.
.. code-block:: console
export RTE_SDK=/opt/DPDK
export RTE_TARGET=x86_64-native-linuxapp-gcc
cd /path/to/my_app
For a new application, the user must create their own Makefile that includes some .mk files, such as
${RTE_SDK}/mk/DPDK.vars.mk, and ${RTE_SDK}/mk/ DPDK.app.mk.
This is described in
:ref:`Building Your Own Application <Building_Your_Own_Application>`.
Depending on the chosen target (architecture, machine, executive environment, toolchain) defined in the Makefile or as an environment variable,
the applications and libraries will compile using the appropriate .h files and will link with the appropriate .a files.
These files are located in ${RTE_SDK}/arch-machine-execenv-toolchain, which is referenced internally by ${RTE_BIN_SDK}.
To compile their application, the user just has to call make.
The compilation result will be located in /path/to/my_app/build directory.
Sample applications are provided in the examples directory.
.. _Makefile_Description:
Makefile Description
--------------------
General Rules For Intel® DPDK Makefiles
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In the Intel® DPDK, Makefiles always follow the same scheme:
#. Include $(RTE_SDK)/mk/DPDK.vars.mk at the beginning.
#. Define specific variables for RTE build system.
#. Include a specific $(RTE_SDK)/mk/DPDK.XYZ.mk, where XYZ can be app, lib, extapp, extlib, obj, gnuconfigure,
and so on, depending on what kind of object you want to build.
:ref:`See Makefile Types <Makefile_Types>` below.
#. Include user-defined rules and variables.
The following is a very simple example of an external application Makefile:
.. code-block:: make
include $(RTE_SDK)/mk/DPDK.vars.mk
# binary name
APP = helloworld
# all source are stored in SRCS-y
SRCS-y := main.c
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
include $(RTE_SDK)/mk/DPDK.extapp.mk
.. _Makefile_Types:
Makefile Types
~~~~~~~~~~~~~~
Depending on the .mk file which is included at the end of the user Makefile, the Makefile will have a different role.
Note that it is not possible to build a library and an application in the same Makefile.
For that, the user must create two separate Makefiles, possibly in two different directories.
In any case, the rte.vars.mk file must be included in the user Makefile as soon as possible.
Application
^^^^^^^^^^^
These Makefiles generate a binary application.
* rte.app.mk: Application in the development kit framework
* rte.extapp.mk: External application
* rte.hostapp.mk: Host application in the development kit framework
Library
^^^^^^^
Generate a .a library.
* rte.lib.mk: Library in the development kit framework
* rte.extlib.mk: external library
* rte.hostlib.mk: host library in the development kit framework
Install
^^^^^^^
* rte.install.mk: Does not build anything, it is only used to create links or copy files to the installation directory.
This is useful for including files in the development kit framework.
Kernel Module
^^^^^^^^^^^^^
* rte.module.mk: Build a kernel module in the development kit framework.
Objects
^^^^^^^
* rte.obj.mk: Object aggregation (merge several .o in one) in the development kit framework.
* rte.extobj.mk: Object aggregation (merge several .o in one) outside the development kit framework.
Misc
^^^^
* rte.doc.mk: Documentation in the development kit framework
* rte.gnuconfigure.mk: Build an application that is configure-based (used to compile *newlib*).
* rte.subdir.mk: Build several directories in the development kit framework.
.. _Useful_Variables_Provided_by_the_Build_System:
Useful Variables Provided by the Build System
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* RTE_SDK: The absolute path to the Intel® DPDK sources.
When compiling the development kit, this variable is automatically set by the framework.
It has to be defined by the user as an environment variable if compiling an external application.
* RTE_SRCDIR: The path to the root of the sources. When compiling the development kit, RTE_SRCDIR = RTE_SDK.
When compiling an external application, the variable points to the root of external application sources.
* RTE_OUTPUT: The path to which output files are written.
Typically, it is $(RTE_SRCDIR)/build, but it can be overriden by the O= option in the make command line.
* RTE_TARGET: A string identifying the target for which we are building.
The format is arch-machine-execenv-toolchain.
When compiling the SDK, the target is deduced by the build system from the configuration (.config).
When building an external application, it must be specified by the user in the Makefile or as an environment variable.
* RTE_SDK_BIN: References $(RTE_SDK)/$(RTE_TARGET).
* RTE_ARCH: Defines the architecture (i686, x86_64).
It is the same value as CONFIG_RTE_ARCH but without the double-quotes around the string.
* RTE_MACHINE: Defines the machine.
It is the same value as CONFIG_RTE_MACHINE but without the double-quotes around the string.
* RTE_TOOLCHAIN: Defines the toolchain (gcc , icc).
It is the same value as CONFIG_RTE_TOOLCHAIN but without the double-quotes around the string.
* RTE_EXEC_ENV: Defines the executive environment (linuxapp).
It is the same value as CONFIG_RTE_EXEC_ENV but without the double-quotes around the string.
* RTE_KERNELDIR: This variable contains the absolute path to the kernel sources that will be used to compile the kernel modules.
The kernel headers must be the same as the ones that will be used on the target machine (the machine that will run the application).
By default, the variable is set to /lib/modules/$(shell uname -r)/build,
which is correct when the target machine is also the build machine.
Variables that Can be Set/Overridden in a Makefile Only
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* VPATH: The path list that the build system will search for sources. By default, RTE_SRCDIR will be included in VPATH.
* CFLAGS: Flags to use for C compilation. The user should use += to append data in this variable.
* LDFLAGS: Flags to use for linking. The user should use += to append data in this variable.
* ASFLAGS: Flags to use for assembly. The user should use += to append data in this variable.
* CPPFLAGS: Flags to use to give flags to C preprocessor (only useful when assembling .S files).
The user should use += to append data in this variable.
* LDLIBS: In an application, the list of libraries to link with (for example, -L /path/to/libfoo -lfoo ).
The user should use += to append data in this variable.
* SRC-y: A list of source files (.c, .S, or .o if the source is a binary) in case of application, library or object Makefiles.
The sources must be available from VPATH.
* INSTALL-y-$(INSTPATH): A list of files to be installed in $(INSTPATH).
The files must be available from VPATH and will be copied in $(RTE_OUTPUT)/$(INSTPATH). Can be used in almost any RTE Makefile.
* SYMLINK-y-$(INSTPATH): A list of files to be installed in $(INSTPATH).
The files must be available from VPATH and will be linked (symbolically) in $(RTE_OUTPUT)/$(INSTPATH).
This variable can be used in almost any Intel® DPDK Makefile.
* PREBUILD: A list of prerequisite actions to be taken before building. The user should use += to append data in this variable.
* POSTBUILD: A list of actions to be taken after the main build. The user should use += to append data in this variable.
* PREINSTALL: A list of prerequisite actions to be taken before installing. The user should use += to append data in this variable.
* POSTINSTALL: A list of actions to be taken after installing. The user should use += to append data in this variable.
* PRECLEAN: A list of prerequisite actions to be taken before cleaning. The user should use += to append data in this variable.
* POSTCLEAN: A list of actions to be taken after cleaning. The user should use += to append data in this variable.
* DEPDIR-y: Only used in the development kit framework to specify if the build of the current directory depends on build of another one.
This is needed to support parallel builds correctly.
Variables that can be Set/Overridden by the User on the Command Line Only
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Some variables can be used to configure the build system behavior. They are documented in
:ref:`Development Kit Root Makefile Help <Development_Kit_Root_Makefile_Help>` and
:ref:`External Application/Library Makefile Help <External_Application/Library_Makefile_Help>`
* WERROR_CFLAGS: By default, this is set to a specific value that depends on the compiler.
Users are encouraged to use this variable as follows:
CFLAGS += $(WERROR_CFLAGS)
This avoids the use of different cases depending on the compiler (icc or gcc).
Also, this variable can be overridden from the command line, which allows bypassing of the flags for testing purposes.
Variables that Can be Set/Overridden by the User in a Makefile or Command Line
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* CFLAGS_my_file.o: Specific flags to add for C compilation of my_file.c.
* LDFLAGS_my_app: Specific flags to add when linking my_app.
* NO_AUTOLIBS: If set, the libraries provided by the framework will not be included in the LDLIBS variable automatically.
* EXTRA_CFLAGS: The content of this variable is appended after CFLAGS when compiling.
* EXTRA_LDFLAGS: The content of this variable is appended after LDFLAGS when linking.
* EXTRA_ASFLAGS: The content of this variable is appended after ASFLAGS when assembling.
* EXTRA_CPPFLAGS: The content of this variable is appended after CPPFLAGS when using a C preprocessor on assembly files.

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.. _Development_Kit_Root_Makefile_Help:
Development Kit Root Makefile Help
==================================
The Intel® DPDK provides a root level Makefile with targets for configuration, building, cleaning, testing, installation and others.
These targets are explained in the following sections.
Configuration Targets
---------------------
The configuration target requires the name of the target, which is specified using T=mytarget and it is mandatory.
The list of available targets are in $(RTE_SDK)/config (remove the defconfig _ prefix).
Configuration targets also support the specification of the name of the output directory, using O=mybuilddir.
This is an optional parameter, the default output directory is build.
* Config
This will create a build directory, and generates a configuration from a template.
A Makefile is also created in the new build directory.
Example:
.. code-block:: console
make config O=mybuild T=x86_64-native-linuxapp-gcc
Build Targets
-------------
Build targets support the optional specification of the name of the output directory, using O=mybuilddir.
The default output directory is build.
* all, build or just make
Build the Intel® DPDK in the output directory previously created by a make config.
Example:
.. code-block:: console
make O=mybuild
* clean
Clean all objects created using make build.
Example:
.. code-block:: console
make clean O=mybuild
* %_sub
Build a subdirectory only, without managing dependencies on other directories.
Example:
.. code-block:: console
make lib/librte_eal_sub O=mybuild
* %_clean
Clean a subdirectory only.
Example:
.. code-block:: console
make lib/librte_eal_clean O=mybuild
Install Targets
---------------
* Install
Build the Intel® DPDK binary.
Actually, this builds each supported target in a separate directory.
The name of each directory is the name of the target.
The name of the targets to install can be optionally specified using T=mytarget.
The target name can contain wildcard \* characters.
The list of available targets are in $(RTE_SDK)/config (remove the defconfig\_ prefix).
Example:
.. code-block:: console
make install T=x86_64-*
* Uninstall
Remove installed target directories.
Test Targets
------------
* test
Launch automatic tests for a build directory specified using O=mybuilddir.
It is optional, the default output directory is build.
Example:
.. code-block:: console
make test O=mybuild
* testall
Launch automatic tests for all installed target directories (after a make install).
The name of the targets to test can be optionally specified using T=mytarget.
The target name can contain wildcard (\*) characters.
The list of available targets are in $(RTE_SDK)/config (remove the defconfig\_ prefix).
Examples:
.. code-block:: console
make testall, make testall T=x86_64-*
Documentation Targets
---------------------
* doxydoc
Generate the Doxygen documentation (pdf only).
Deps Targets
------------
* depdirs
This target is implicitly called by make config.
Typically, there is no need for a user to call it,
except if DEPDIRS-y variables have been updated in Makefiles.
It will generate the file $(RTE_OUTPUT)/.depdirs.
Example:
.. code-block:: console
make depdirs O=mybuild
* depgraph
This command generates a dot graph of dependencies.
It can be displayed to debug circular dependency issues, or just to understand the dependencies.
Example:
.. code-block:: console
make depgraph O=mybuild > /tmp/graph.dot && dotty /tmp/ graph.dot
Misc Targets
------------
* help
Show this help.
Other Useful Command-line Variables
-----------------------------------
The following variables can be specified on the command line:
* V=
Enable verbose build (show full compilation command line, and some intermediate commands).
* D=
Enable dependency debugging. This provides some useful information about why a target is built or not.
* EXTRA_CFLAGS=, EXTRA_LDFLAGS=, EXTRA_ASFLAGS=, EXTRA_CPPFLAGS=
Append specific compilation, link or asm flags.
* CROSS=
Specify a cross toolchain header that will prefix all gcc/binutils applications. This only works when using gcc.
Make in a Build Directory
-------------------------
All targets described above are called from the SDK root $(RTE_SDK).
It is possible to run the same Makefile targets inside the build directory.
For instance, the following command:
.. code-block:: console
cd $(RTE_SDK)
make config O=mybuild T=x86_64-native-linuxapp-gcc
make O=mybuild
is equivalent to:
.. code-block:: console
cd $(RTE_SDK)
make config O=mybuild T=x86_64-native-linuxapp-gcc
cd mybuild
# no need to specify O= now
make
Compiling for Debug
-------------------
To compile the Intel® DPDK and sample applications with debugging information included and the optimization level set to 0,
the EXTRA_CFLAGS environment variable should be set before compiling as follows:
.. code-block:: console
export EXTRA_CFLAGS='-O0 -g'
The Intel® DPDK and any user or sample applications can then be compiled in the usual way.
For example:
.. code-block:: console
make install T=x86_64-native-linuxapp-gcc make -C examples/<theapp>

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Driver for VM Emulated Devices
==============================
The Intel® DPDK EM poll mode driver supports the following emulated devices:
* qemu-kvm emulated Intel® 82540EM Gigabit Ethernet Controller (qemu e1000 device)
* VMware* emulated Intel® 82545EM Gigabit Ethernet Controller
* VMware emulated Intel® 8274L Gigabit Ethernet Controller.
Validated Hypervisors
---------------------
The validated hypervisors are:
* KVM (Kernel Virtual Machine) with Qemu, version 0.14.0
* KVM (Kernel Virtual Machine) with Qemu, version 0.15.1
* VMware ESXi 5.0, Update 1
Recommended Guest Operating System in Virtual Machine
-----------------------------------------------------
The recommended guest operating system in a virtualized environment is:
* Fedora* 18 (64-bit)
For supported kernel versions, refer to the *Intel® DPDK Release Notes*.
Setting Up a KVM Virtual Machine
--------------------------------
The following describes a target environment:
* Host Operating System: Fedora 14
* Hypervisor: KVM (Kernel Virtual Machine) with Qemu version, 0.14.0
* Guest Operating System: Fedora 14
* Linux Kernel Version: Refer to the Intel® DPDK Getting Started Guide
* Target Applications: testpmd
The setup procedure is as follows:
#. Download qemu-kvm-0.14.0 from
`http://sourceforge.net/projects/kvm/files/qemu-kvm/ <http://sourceforge.net/projects/kvm/files/qemu-kvm/>`_
and install it in the Host OS using the following steps:
When using a recent kernel (2.6.25+) with kvm modules included:
.. code-block:: console
tar xzf qemu-kvm-release.tar.gz cd qemu-kvm-release
./configure --prefix=/usr/local/kvm
make
sudo make install
sudo /sbin/modprobe kvm-intel
When using an older kernel or a kernel from a distribution without the kvm modules,
you must download (from the same link), compile and install the modules yourself:
.. code-block:: console
tar xjf kvm-kmod-release.tar.bz2
cd kvm-kmod-release
./configure
make
sudo make install
sudo /sbin/modprobe kvm-intel
Note that qemu-kvm installs in the /usr/local/bin directory.
For more details about KVM configuration and usage, please refer to:
`http://www.linux-kvm.org/page/HOWTO1 <http://www.linux-kvm.org/page/HOWTO1>`_.
#. Create a Virtual Machine and install Fedora 14 on the Virtual Machine.
This is referred to as the Guest Operating System (Guest OS).
#. Start the Virtual Machine with at least one emulated e1000 device.
.. note::
The Qemu provides several choices for the emulated network device backend.
Most commonly used is a TAP networking backend that uses a TAP networking device in the host.
For more information about Qemu supported networking backends and different options for configuring networking at Qemu,
please refer to:
— `http://www.linux-kvm.org/page/Networking <http://www.linux-kvm.org/page/Networking>`_
— `http://wiki.qemu.org/Documentation/Networking <http://wiki.qemu.org/Documentation/Networking>`_
— `http://qemu.weilnetz.de/qemu-doc.html <http://qemu.weilnetz.de/qemu-doc.html>`_
For example, to start a VM with two emulated e1000 devices, issue the following command:
.. code-block:: console
/usr/local/kvm/bin/qemu-system-x86_64 -cpu host -smp 4 -hda qemu1.raw -m 1024
-net nic,model=e1000,vlan=1,macaddr=DE:AD:1E:00:00:01
-net tap,vlan=1,ifname=tapvm01,script=no,downscript=no
-net nic,model=e1000,vlan=2,macaddr=DE:AD:1E:00:00:02
-net tap,vlan=2,ifname=tapvm02,script=no,downscript=no
where:
— -m = memory to assign
— -smp = number of smp cores
— -hda = virtual disk image
This command starts a new virtual machine with two emulated 82540EM devices,
backed up with two TAP networking host interfaces, tapvm01 and tapvm02.
.. code-block:: console
# ip tuntap show
tapvm01: tap
tapvm02: tap
#. Configure your TAP networking interfaces using ip/ifconfig tools.
#. Log in to the guest OS and check that the expected emulated devices exist:
.. code-block:: console
# lspci -d 8086:100e
00:04.0 Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller (rev 03)
00:05.0 Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller (rev 03)
#. Install the Intel® DPDK and run testpmd.
Known Limitations of Emulated Devices
-------------------------------------
The following are known limitations:
#. The Qemu e1000 RX path does not support multiple descriptors/buffers per packet.
Therefore, rte_mbuf should be big enough to hold the whole packet.
For example, to allow testpmd to receive jumbo frames, use the following:
testpmd [options] -- --mbuf-size=<your-max-packet-size>
#. Qemu e1000 does not validate the checksum of incoming packets.

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.. _Environment_Abstraction_Layer:
Environment Abstraction Layer
=============================
The Environment Abstraction Layer (EAL) is responsible for gaining access to low-level resources such as hardware and memory space.
It provides a generic interface that hides the environment specifics from the applications and libraries.
It is the responsibility of the initialization routine to decide how to allocate these resources
(that is, memory space, PCI devices, timers, consoles, and so on).
Typical services expected from the EAL are:
* Intel® DPDK Loading and Launching:
The Intel® DPDK and its application are linked as a single application and must be loaded by some means.
* Core Affinity/Assignment Procedures:
The EAL provides mechanisms for assigning execution units to specific cores as well as creating execution instances.
* System Memory Reservation:
The EAL facilitates the reservation of different memory zones, for example, physical memory areas for device interactions.
* PCI Address Abstraction: The EAL provides an interface to access PCI address space.
* Trace and Debug Functions: Logs, dump_stack, panic and so on.
* Utility Functions: Spinlocks and atomic counters that are not provided in libc.
* CPU Feature Identification: Determine at runtime if a particular feature, for example, Intel® AVX is supported.
Determine if the current CPU supports the feature set that the binary was compiled for.
* Interrupt Handling: Interfaces to register/unregister callbacks to specific interrupt sources.
* Alarm Functions: Interfaces to set/remove callbacks to be run at a specific time.
EAL in a Linux-userland Execution Environment
---------------------------------------------
In a Linux user space environment, the Intel® DPDK application runs as a user-space application using the pthread library.
PCI information about devices and address space is discovered through the /sys kernel interface and through a module called igb_uio.
Refer to the UIO: User-space drivers documentation in the Linux kernel. This memory is mmap'd in the application.
The EAL performs physical memory allocation using mmap() in hugetlbfs (using huge page sizes to increase performance).
This memory is exposed to Intel® DPDK service layers such as the :ref:`Mempool Library <Mempool_Library>`.
At this point, the Intel® DPDK services layer will be initialized, then through pthread setaffinity calls,
each execution unit will be assigned to a specific logical core to run as a user-level thread.
The time reference is provided by the CPU Time-Stamp Counter (TSC) or by the HPET kernel API through a mmap() call.
Initialization and Core Launching
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Part of the initialization is done by the start function of glibc.
A check is also performed at initialization time to ensure that the micro architecture type chosen in the config file is supported by the CPU.
Then, the main() function is called. The core initialization and launch is done in rte_eal_init() (see the API documentation).
It consist of calls to the pthread library (more specifically, pthread_self(), pthread_create(), and pthread_setaffinity_np()).
.. _pg_figure_2:
**Figure 2. EAL Initialization in a Linux Application Environment**
.. image3_png has been replaced
|linuxapp_launch|
.. note::
Initialization of objects, such as memory zones, rings, memory pools, lpm tables and hash tables,
should be done as part of the overall application initialization on the master lcore.
The creation and initialization functions for these objects are not multi-thread safe.
However, once initialized, the objects themselves can safely be used in multiple threads simultaneously.
Multi-process Support
~~~~~~~~~~~~~~~~~~~~~
The Linuxapp EAL allows a multi-process as well as a multi-threaded (pthread) deployment model.
See chapter 2.20
:ref:`Multi-process Support <Multi-process_Support>` for more details.
Memory Mapping Discovery and Memory Reservation
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The allocation of large contiguous physical memory is done using the hugetlbfs kernel filesystem.
The EAL provides an API to reserve named memory zones in this contiguous memory.
The physical address of the reserved memory for that memory zone is also returned to the user by the memory zone reservation API.
.. note::
Memory reservations done using the APIs provided by the rte_malloc library are also backed by pages from the hugetlbfs filesystem.
However, physical address information is not available for the blocks of memory allocated in this way.
Xen Dom0 support without hugetbls
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The existing memory management implementation is based on the Linux kernel hugepage mechanism.
However, Xen Dom0 does not support hugepages, so a new Linux kernel module rte_dom0_mm is added to workaround this limitation.
The EAL uses IOCTL interface to notify the Linux kernel module rte_dom0_mm to allocate memory of specified size,
and get all memory segments information from the module,
and the EAL uses MMAP interface to map the allocated memory.
For each memory segment, the physical addresses are contiguous within it but actual hardware addresses are contiguous within 2MB.
PCI Access
~~~~~~~~~~
The EAL uses the /sys/bus/pci utilities provided by the kernel to scan the content on the PCI bus.
To access PCI memory, a kernel module called igb_uio provides a /dev/uioX device file
that can be mmap'd to obtain access to PCI address space from the application.
It uses the uio kernel feature (userland driver).
Per-lcore and Shared Variables
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
.. note::
lcore refers to a logical execution unit of the processor, sometimes called a hardware *thread*.
Shared variables are the default behavior.
Per-lcore variables are implemented using *Thread Local Storage* (TLS) to provide per-thread local storage.
Logs
~~~~
A logging API is provided by EAL.
By default, in a Linux application, logs are sent to syslog and also to the console.
However, the log function can be overridden by the user to use a different logging mechanism.
Trace and Debug Functions
^^^^^^^^^^^^^^^^^^^^^^^^^
There are some debug functions to dump the stack in glibc.
The rte_panic() function can voluntarily provoke a SIG_ABORT,
which can trigger the generation of a core file, readable by gdb.
CPU Feature Identification
~~~~~~~~~~~~~~~~~~~~~~~~~~
The EAL can query the CPU at runtime (using the rte_cpu_get_feature() function) to determine which CPU features are available.
User Space Interrupt and Alarm Handling
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The EAL creates a host thread to poll the UIO device file descriptors to detect the interrupts.
Callbacks can be registered or unregistered by the EAL functions for a specific interrupt event
and are called in the host thread asynchronously.
The EAL also allows timed callbacks to be used in the same way as for NIC interrupts.
.. note::
The only interrupts supported by the Intel® PDK Poll-Mode Drivers are those for link status change,
i.e. link up and link down notification.
Blacklisting
~~~~~~~~~~~~
The EAL PCI device blacklist functionality can be used to mark certain NIC ports as blacklisted,
so they are ignored by the Intel® DPDK.
The ports to be blacklisted are identified using the PCIe* description (Domain:Bus:Device.Function).
Misc Functions
~~~~~~~~~~~~~~
Locks and atomic operations are per-architecture (i686 and x86_64).
Memory Segments and Memory Zones (memzone)
------------------------------------------
The mapping of physical memory is provided by this feature in the EAL.
As physical memory can have gaps, the memory is described in a table of descriptors,
and each descriptor (called rte_memseg ) describes a contiguous portion of memory.
On top of this, the memzone allocator's role is to reserve contiguous portions of physical memory.
These zones are identified by a unique name when the memory is reserved.
The rte_memzone descriptors are also located in the configuration structure.
This structure is accessed using rte_eal_get_configuration().
The lookup (by name) of a memory zone returns a descriptor containing the physical address of the memory zone.
Memory zones can be reserved with specific start address alignment by supplying the align parameter
(by default, they are aligned to cache line size).
The alignment value should be a power of two and not less than the cache line size (64 bytes).
Memory zones can also be reserved from either 2 MB or 1 GB hugepages, provided that both are available on the system.
.. |linuxapp_launch| image:: img/linuxapp_launch.svg

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.. _External_Application/Library_Makefile_help:
External Application/Library Makefile help
==========================================
External applications or libraries should include specific Makefiles from RTE_SDK, located in mk directory.
These Makefiles are:
* ${RTE_SDK}/mk/DPDK.extapp.mk: Build an application
* ${RTE_SDK}/mk/DPDK.extlib.mk: Build a static library
* ${RTE_SDK}/mk/DPDK.extobj.mk: Build objects (.o)
Prerequisites
-------------
The following variables must be defined:
* ${RTE_SDK}: Points to the root directory of the Intel® DPDK.
* ${RTE_TARGET}: Reference the target to be used for compilation (for example, x86_64-native-linuxapp-gcc).
Build Targets
-------------
Build targets support the specification of the name of the output directory, using O=mybuilddir.
This is optional; the default output directory is build.
* all, "nothing" (meaning just make)
Build the application or the library in the specified output directory.
Example:
.. code-block:: console
make O=mybuild
* clean
Clean all objects created using make build.
Example:
.. code-block:: console
make clean O=mybuild
Help Targets
------------
* help
Show this help.
Other Useful Command-line Variables
-----------------------------------
The following variables can be specified at the command line:
* S=
Specify the directory in which the sources are located. By default, it is the current directory.
* M=
Specify the Makefile to call once the output directory is created. By default, it uses $(S)/Makefile.
* V=
Enable verbose build (show full compilation command line and some intermediate commands).
* D=
Enable dependency debugging. This provides some useful information about why a target must be rebuilt or not.
* EXTRA_CFLAGS=, EXTRA_LDFLAGS=, EXTRA_ASFLAGS=, EXTRA_CPPFLAGS=
Append specific compilation, link or asm flags.
* CROSS=
Specify a cross-toolchain header that will prefix all gcc/binutils applications. This only works when using gcc.
Make from Another Directory
---------------------------
It is possible to run the Makefile from another directory, by specifying the output and the source dir. For example:
.. code-block:: console
export RTE_SDK=/path/to/DPDK
export RTE_TARGET=x86_64-native-linuxapp-icc
make -f /path/to/my_app/Makefile S=/path/to/my_app O=/path/to/build_dir

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Extending the Intel® DPDK
=========================
This chapter describes how a developer can extend the Intel® DPDK to provide a new library,
a new target, or support a new target.
Example: Adding a New Library libfoo
------------------------------------
To add a new library to the Intel® DPDK, proceed as follows:
#. Add a new configuration option:
.. code-block:: bash
for f in config/\*; do \
echo CONFIG_RTE_LIBFOO=y >> $f; done
#. Create a new directory with sources:
.. code-block:: console
mkdir ${RTE_SDK}/lib/libfoo
touch ${RTE_SDK}/lib/libfoo/foo.c
touch ${RTE_SDK}/lib/libfoo/foo.h
#. Add a foo() function in libfoo.
Definition is in foo.c:
.. code-block:: c
void foo(void)
{
}
Declaration is in foo.h:
.. code-block:: c
extern void foo(void);
#. Update lib/Makefile:
.. code-block:: console
vi ${RTE_SDK}/lib/Makefile
# add:
# DIRS-$(CONFIG_RTE_LIBFOO) += libfoo
#. Create a new Makefile for this library, for example, derived from mempool Makefile:
.. code-block:: console
cp ${RTE_SDK}/lib/librte_mempool/Makefile ${RTE_SDK}/lib/libfoo/
vi ${RTE_SDK}/lib/libfoo/Makefile
# replace:
# librte_mempool -> libfoo
# rte_mempool -> foo
#. Update mk/DPDK.app.mk, and add -lfoo in LDLIBS variable when the option is enabled.
This will automatically add this flag when linking an Intel® DPDK application.
#. Build the Intel® DPDK with the new library (we only show a specific target here):
.. code-block:: console
cd ${RTE_SDK}
make config T=x86_64-native-linuxapp-gcc
make
#. Check that the library is installed:
.. code-block:: console
ls build/lib
ls build/include
Example: Using libfoo in the Test Application
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The test application is used to validate all functionality of the Intel® DPDK.
Once you have added a library, a new test case should be added in the test application.
* A new test_foo.c file should be added, that includes foo.h and calls the foo() function from test_foo().
When the test passes, the test_foo() function should return 0.
* Makefile, test.h and commands.c must be updated also, to handle the new test case.
* Test report generation: autotest.py is a script that is used to generate the test report that is available in the
${RTE_SDK}/doc/rst/test_report/autotests directory. This script must be updated also.
If libfoo is in a new test family, the links in ${RTE_SDK}/doc/rst/test_report/test_report.rst must be updated.
* Build the Intel® DPDK with the updated test application (we only show a specific target here):
.. code-block:: console
cd ${RTE_SDK}
make config T=x86_64-native-linuxapp-gcc
make

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Glossary
========
=============== =========================================================================================================
Term Definition
=============== =========================================================================================================
ACL Access Control List
API Application Programming Interface
ASLR Linux* kernel Address-Space Layout Randomization
BSD Berkeley Software Distribution
Clr Clear
CIDR Classless Inter-Domain Routing
Control Plane The control plane is concerned with the routing of packets and with providing a start or end point.
Core A core may include several lcores or threads if the processor supports hyperthreading.
Core Components A set of libraries provided by the Intel® DPDK, including eal, ring, mempool, mbuf, timers, and so on.
CPU Central Processing Unit
CRC Cyclic Redundancy Check
ctrlmbuf An *mbuf* carrying control data.
Data Plane In contrast to the control plane,
the data plane in a network architecture are the layers involved when forwarding packets.
These layers must be highly optimized to achieve good performance.
DIMM Dual In-line Memory Module
Doxygen A documentation generator used in the Intel® DPDK to generate the API reference.
DPDK Data Plane Development Kit
DRAM Dynamic Random Access Memory
EAL The Environment Abstraction Layer (EAL) provides a generic interface that hides the environment specifics
from the applications and libraries.
The services expected from the EAL are:
development kit loading and launching, core affinity/ assignment procedures,
system memory allocation/description, PCI bus access, inter-partition communication.
FIFO First In First Out
FPGA Field Programmable Gate Array
GbE Gigabit Ethernet
HW Hardware
HPET High Precision Event Timer;
a hardware timer that provides a precise time reference on x86 platforms.
ID Identifier
IOCTL Input/Output Control
I/O Input/Output
IP Internet Protocol
IPv4 Internet Protocol version 4
IPv6 Internet Protocol version 6
lcore A logical execution unit of the processor, sometimes called a *hardware thread*.
KNI Kernel Network Interface
L1 Layer 1
L2 Layer 2
L3 Layer 3
L4 Layer 4
LAN Local Area Network
LPM Longest Prefix Match
master lcore The execution unit that executes the main() function and that launches other lcores.
mbuf An mbuf is a data structure used internally to carry messages (mainly network packets).
The name is derived from BSD stacks.
To understand the concepts of packet buffers or mbuf,
refer to *TCP/IP Illustrated, Volume 2: The Implementation*.
MESI Modified Exclusive Shared Invalid (CPU cache coherency protocol)
MTU Maximum Transfer Unit
NIC Network Interface Card
OOO Out Of Order (execution of instructions within the CPU pipeline)
NUMA Non-uniform Memory Access
PCI Peripheral Connect Interface
PHY An abbreviation for the physical layer of the OSI model.
pktmbuf An *mbuf* carrying a network packet.
PMD Poll Mode Driver
QoS Quality of Service
RCU Read-Copy-Update algorithm, an alternative to simple rwlocks.
Rd Read
RED Random Early Detection
RSS Receive Side Scaling
RTE Run Time Environment.
Provides a fast and simple framework for fast packet processing,
in a lightweight environment as a Linux* application and
using Poll Mode Drivers (PMDs) to increase speed.
Rx Reception
Slave lcore Any *lcore* that is not the *master lcore*.
Socket A physical CPU, that includes several *cores*.
SLA Service Level Agreement
srTCM Single Rate Three Color Marking
SRTD Scheduler Round Trip Delay
SW Software
Target In the Intel® DPDK, the target is a combination of architecture,
machine, executive environment and toolchain.
For example: i686-native-linuxapp-gcc.
TCP Transmission Control Protocol
TC Traffic Class
TLB Translation Lookaside Buffer
TLS Thread Local Storage
trTCM Two Rate Three Color Marking
TSC Time Stamp Counter
Tx Transmission
TUN/TAP TUN and TAP are virtual network kernel devices.
VLAN Virtual Local Area Network
Wr Write
WRED Weighted Random Early Detection
WRR Weighted Round Robin
=============== =========================================================================================================

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.. _Hash_Library:
Hash Library
============
The Intel® DPDK provides a Hash Library for creating hash table for fast lookup.
The hash table is a data structure optimized for searching through a set of entries that are each identified by a unique key.
For increased performance the Intel® DPDK Hash requires that all the keys have the same number of bytes which is set at the hash creation time.
Hash API Overview
-----------------
The main configuration parameters for the hash are:
* Total number of hash entries
* Size of the key in bytes
The hash also allows the configuration of some low-level implementation related parameters such as:
* Hash function to translate the key into a bucket index
* Number of entries per bucket
The main methods exported by the hash are:
* Add entry with key: The key is provided as input. If a new entry is successfully added to the hash for the specified key,
or there is already an entry in the hash for the specified key, then the position of the entry is returned.
If the operation was not successful, for example due to lack of free entries in the hash, then a negative value is returned;
* Delete entry with key: The key is provided as input. If an entry with the specified key is found in the hash,
then the entry is removed from the hash and the position where the entry was found in the hash is returned.
If no entry with the specified key exists in the hash, then a negative value is returned
* Lookup for entry with key: The key is provided as input. If an entry with the specified key is found in the hash (lookup hit),
then the position of the entry is returned, otherwise (lookup miss) a negative value is returned.
The current hash implementation handles the key management only.
The actual data associated with each key has to be managed by the user using a separate table that
mirrors the hash in terms of number of entries and position of each entry,
as shown in the Flow Classification use case describes in the following sections.
The example hash tables in the L2/L3 Forwarding sample applications defines which port to forward a packet to based on a packet flow identified by the five-tuple lookup.
However, this table could also be used for more sophisticated features and provide many other functions and actions that could be performed on the packets and flows.
Implementation Details
----------------------
The hash table is implemented as an array of entries which is further divided into buckets,
with the same number of consecutive array entries in each bucket.
For any input key, there is always a single bucket where that key can be stored in the hash,
therefore only the entries within that bucket need to be examined when the key is looked up.
The lookup speed is achieved by reducing the number of entries to be scanned from the total
number of hash entries down to the number of entries in a hash bucket,
as opposed to the basic method of linearly scanning all the entries in the array.
The hash uses a hash function (configurable) to translate the input key into a 4-byte key signature.
The bucket index is the key signature modulo the number of hash buckets.
Once the bucket is identified, the scope of the hash add,
delete and lookup operations is reduced to the entries in that bucket.
To speed up the search logic within the bucket, each hash entry stores the 4-byte key signature together with the full key for each hash entry.
For large key sizes, comparing the input key against a key from the bucket can take significantly more time than
comparing the 4-byte signature of the input key against the signature of a key from the bucket.
Therefore, the signature comparison is done first and the full key comparison done only when the signatures matches.
The full key comparison is still necessary, as two input keys from the same bucket can still potentially have the same 4-byte hash signature,
although this event is relatively rare for hash functions providing good uniform distributions for the set of input keys.
Use Case: Flow Classification
-----------------------------
Flow classification is used to map each input packet to the connection/flow it belongs to.
This operation is necessary as the processing of each input packet is usually done in the context of their connection,
so the same set of operations is applied to all the packets from the same flow.
Applications using flow classification typically have a flow table to manage, with each separate flow having an entry associated with it in this table.
The size of the flow table entry is application specific, with typical values of 4, 16, 32 or 64 bytes.
Each application using flow classification typically has a mechanism defined to uniquely identify a flow based on
a number of fields read from the input packet that make up the flow key.
One example is to use the DiffServ 5-tuple made up of the following fields of the IP and transport layer packet headers:
Source IP Address, Destination IP Address, Protocol, Source Port, Destination Port.
The Intel® DPDK hash provides a generic method to implement an application specific flow classification mechanism.
Given a flow table implemented as an array, the application should create a hash object with the same number of entries as the flow table and
with the hash key size set to the number of bytes in the selected flow key.
The flow table operations on the application side are described below:
* Add flow: Add the flow key to hash.
If the returned position is valid, use it to access the flow entry in the flow table for adding a new flow or
updating the information associated with an existing flow.
Otherwise, the flow addition failed, for example due to lack of free entries for storing new flows.
* Delete flow: Delete the flow key from the hash. If the returned position is valid,
use it to access the flow entry in the flow table to invalidate the information associated with the flow.
* Lookup flow: Lookup for the flow key in the hash.
If the returned position is valid (flow lookup hit), use the returned position to access the flow entry in the flow table.
Otherwise (flow lookup miss) there is no flow registered for the current packet.
References
----------
* Donald E. Knuth, The Art of Computer Programming, Volume 3: Sorting and Searching (2nd Edition), 1998, Addison-Wesley Professional

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
I40E/IXGBE/IGB Virtual Function Driver
======================================
Supported Intel® Ethernet Controllers (see the *Intel® DPDK Release Notes* for details)
support the following modes of operation in a virtualized environment:
* **SR-IOV mode**: Involves direct assignment of part of the port resources to different guest operating systems
using the PCI-SIG Single Root I/O Virtualization (SR IOV) standard,
also known as "native mode" or"pass-through" mode.
In this chapter, this mode is referred to as IOV mode.
* **VMDq mode**: Involves central management of the networking resources by an IO Virtual Machine (IOVM) or
a Virtual Machine Monitor (VMM), also known as software switch acceleration mode.
In this chapter, this mode is referred to as the Next Generation VMDq mode.
SR-IOV Mode Utilization in an Intel® DPDK Environment
-----------------------------------------------------
The Intel® DPDK uses the SR-IOV feature for hardware-based I/O sharing in IOV mode.
Therefore, it is possible to partition SR-IOV capability on Ethernet controller NIC resources logically and
expose them to a virtual machine as a separate PCI function called a "Virtual Function".
Refer to Figure 10.
Therefore, a NIC is logically distributed among multiple virtual machines (as shown in Figure 10),
while still having global data in common to share with the Physical Function and other Virtual Functions.
The Intel® DPDK i40evf, igbvf or ixgbevf as a Poll Mode Driver (PMD) serves for the Intel® 82576 Gigabit Ethernet Controller,
Intel® Ethernet Controller I350 family, Intel® 82599 10 Gigabit Ethernet Controller NIC,
or Intel® Fortville 10/40 Gigabit Ethernet Controller NIC's virtual PCI function.
Meanwhile the Intel® DPDK Poll Mode Driver (PMD) also supports "Physical Function" of such NIC's on the host.
The Intel® DPDK PF/VF Poll Mode Driver (PMD) supports the Layer 2 switch on Intel® 82576 Gigabit Ethernet Controller,
Intel® Ethernet Controller I350 family, Intel® 82599 10 Gigabit Ethernet Controller,
and Intel® Fortville 10/40 Gigabit Ethernet Controller NICs so that guest can choose it for inter virtual machine traffic in SR-IOV mode.
For more detail on SR-IOV, please refer to the following documents:
* `SR-IOV provides hardware based I/O sharing <http://www.intel.com/network/connectivity/solutions/vmdc.htm>`_
* `PCI-SIG-Single Root I/O Virtualization Support on IA
<http://www.intel.com/content/www/us/en/pci-express/pci-sig-single-root-io-virtualization-support-in-virtualization-technology-for-connectivity-paper.html>`_
* `Scalable I/O Virtualized Servers <http://www.intel.com/content/www/us/en/virtualization/server-virtualization/scalable-i-o-virtualized-servers-paper.html>`_
.. _pg_figure_10:
**Figure 10. Virtualization for a Single Port NIC in SR-IOV Mode**
.. image24_png has been renamed
|single_port_nic|
Physical and Virtual Function Infrastructure
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The following describes the Physical Function and Virtual Functions infrastructure for the supported Ethernet Controller NICs.
Virtual Functions operate under the respective Physical Function on the same NIC Port and therefore have no access
to the global NIC resources that are shared between other functions for the same NIC port.
A Virtual Function has basic access to the queue resources and control structures of the queues assigned to it.
For global resource access, a Virtual Function has to send a request to the Physical Function for that port,
and the Physical Function operates on the global resources on behalf of the Virtual Function.
For this out-of-band communication, an SR-IOV enabled NIC provides a memory buffer for each Virtual Function,
which is called a "Mailbox".
Intel® Fortville 10/40 Gigabit Ethernet Controller VF Infrastructure
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
In a virtualized environment, the programmer can enable a maximum of *128 Virtual Functions (VF)*
globally per Intel® Fortville 10/40 Gigabit Ethernet Controller NIC device.
Each VF can have a maximum of 16 queue pairs.
The Physical Function in host could be either configured by the Linux* i40e driver
(in the case of the Linux Kernel-based Virtual Machine [KVM]) or by DPDK PMD PF driver.
When using both DPDK PMD PF/VF drivers, the whole NIC will be taken over by DPDK based application.
For example,
* Using Linux* i40e driver:
.. code-block:: console
rmmod i40e (To remove the i40e module)
insmod i40e.ko max_vfs=2,2 (To enable two Virtual Functions per port)
* Using the Intel® DPDK PMD PF i40e driver:
Kernel Params: iommu=pt, intel_iommu=on
.. code-block:: console
modprobe uio
insmod igb_uio
./dpdk_nic_bind.py -b igb_uio bb:ss.f
echo 2 > /sys/bus/pci/devices/0000\:bb\:ss.f/max_vfs (To enable two VFs on a specific PCI device)
Launch the Intel® DPDK testpmd/example or your own host daemon application using the Intel® DPDK PMD library.
Virtual Function enumeration is performed in the following sequence by the Linux* pci driver for a dual-port NIC.
When you enable the four Virtual Functions with the above command, the four enabled functions have a Function#
represented by (Bus#, Device#, Function#) in sequence starting from 0 to 3.
However:
* Virtual Functions 0 and 2 belong to Physical Function 0
* Virtual Functions 1 and 3 belong to Physical Function 1
.. note::
The above is an important consideration to take into account when targeting specific packets to a selected port.
Intel® 82599 10 Gigabit Ethernet Controller VF Infrastructure
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
The programmer can enable a maximum of *63 Virtual Functions* and there must be *one Physical Function* per Intel® 82599
10 Gigabit Ethernet Controller NIC port.
The reason for this is that the device allows for a maximum of 128 queues per port and a virtual/physical function has to
have at least one queue pair (RX/TX).
The current implementation of the Intel® DPDK ixgbevf driver supports a single queue pair (RX/TX) per Virtual Function.
The Physical Function in host could be either configured by the Linux* ixgbe driver
(in the case of the Linux Kernel-based Virtual Machine [KVM]) or by DPDK PMD PF driver.
When using both DPDK PMD PF/VF drivers, the whole NIC will be taken over by DPDK based application.
For example,
* Using Linux* ixgbe driver:
.. code-block:: console
rmmod ixgbe (To remove the ixgbe module)
insmod ixgbe max_vfs=2,2 (To enable two Virtual Functions per port)
* Using the Intel® DPDK PMD PF ixgbe driver:
Kernel Params: iommu=pt, intel_iommu=on
.. code-block:: console
modprobe uio
insmod igb_uio
./dpdk_nic_bind.py -b igb_uio bb:ss.f
echo 2 > /sys/bus/pci/devices/0000\:bb\:ss.f/max_vfs (To enable two VFs on a specific PCI device)
Launch the Intel® DPDK testpmd/example or your own host daemon application using the Intel® DPDK PMD library.
Virtual Function enumeration is performed in the following sequence by the Linux* pci driver for a dual-port NIC.
When you enable the four Virtual Functions with the above command, the four enabled functions have a Function#
represented by (Bus#, Device#, Function#) in sequence starting from 0 to 3.
However:
* Virtual Functions 0 and 2 belong to Physical Function 0
* Virtual Functions 1 and 3 belong to Physical Function 1
.. note::
The above is an important consideration to take into account when targeting specific packets to a selected port.
Intel® 82576 Gigabit Ethernet Controller and Intel® Ethernet Controller I350 Family VF Infrastructure
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
In a virtualized environment, an Intel® 82576 Gigabit Ethernet Controller serves up to eight virtual machines (VMs).
The controller has 16 TX and 16 RX queues.
They are generally referred to (or thought of) as queue pairs (one TX and one RX queue).
This gives the controller 16 queue pairs.
A pool is a group of queue pairs for assignment to the same VF, used for transmit and receive operations.
The controller has eight pools, with each pool containing two queue pairs, that is, two TX and two RX queues assigned to each VF.
In a virtualized environment, an Intel® Ethernet Controller I350 family device serves up to eight virtual machines (VMs) per port.
The eight queues can be accessed by eight different VMs if configured correctly (the i350 has 4x1GbE ports each with 8T X and 8 RX queues),
that means, one Transmit and one Receive queue assigned to each VF.
For example,
* Using Linux* igb driver:
.. code-block:: console
rmmod igb (To remove the igb module)
insmod igb max_vfs=2,2 (To enable two Virtual Functions per port)
* Using Intel® DPDK PMD PF igb driver:
Kernel Params: iommu=pt, intel_iommu=on modprobe uio
.. code-block:: console
insmod igb_uio
./dpdk_nic_bind.py -b igb_uio bb:ss.f
echo 2 > /sys/bus/pci/devices/0000\:bb\:ss.f/max_vfs (To enable two VFs on a specific pci device)
Launch Intel® DPDK testpmd/example or your own host daemon application using the Intel® DPDK PMD library.
Virtual Function enumeration is performed in the following sequence by the Linux* pci driver for a four-port NIC.
When you enable the four Virtual Functions with the above command, the four enabled functions have a Function#
represented by (Bus#, Device#, Function#) in sequence, starting from 0 to 7.
However:
* Virtual Functions 0 and 4 belong to Physical Function 0
* Virtual Functions 1 and 5 belong to Physical Function 1
* Virtual Functions 2 and 6 belong to Physical Function 2
* Virtual Functions 3 and 7 belong to Physical Function 3
.. note::
The above is an important consideration to take into account when targeting specific packets to a selected port.
Validated Hypervisors
~~~~~~~~~~~~~~~~~~~~~
The validated hypervisor is:
* KVM (Kernel Virtual Machine) with Qemu, version 0.14.0
However, the hypervisor is bypassed to configure the Virtual Function devices using the Mailbox interface,
the solution is hypervisor-agnostic.
Xen* and VMware* (when SR- IOV is supported) will also be able to support the Intel® DPDK with Virtual Function driver support.
Expected Guest Operating System in Virtual Machine
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The expected guest operating systems in a virtualized environment are:
* Fedora* 14 (64-bit)
* Ubuntu* 10.04 (64-bit)
For supported kernel versions, refer to the *Intel® DPDK Release Notes*.
Setting Up a KVM Virtual Machine Monitor
----------------------------------------
The following describes a target environment:
* Host Operating System: Fedora 14
* Hypervisor: KVM (Kernel Virtual Machine) with Qemu version 0.14.0
* Guest Operating System: Fedora 14
* Linux Kernel Version: Refer to the *Intel® DPDK Getting Started Guide*
* Target Applications: l2fwd, l3fwd-vf
The setup procedure is as follows:
#. Before booting the Host OS, open **BIOS setup** and enable **Intel® VT features**.
#. While booting the Host OS kernel, pass the intel_iommu=on kernel command line argument using GRUB.
When using Intel® DPDK PF driver on host, pass the iommu=pt kernel command line argument in GRUB.
#. Download qemu-kvm-0.14.0 from
`http://sourceforge.net/projects/kvm/files/qemu-kvm/ <http://sourceforge.net/projects/kvm/files/qemu-kvm/>`_
and install it in the Host OS using the following steps:
When using a recent kernel (2.6.25+) with kvm modules included:
.. code-block:: console
tar xzf qemu-kvm-release.tar.gz
cd qemu-kvm-release
./configure --prefix=/usr/local/kvm
make
sudo make install
sudo /sbin/modprobe kvm-intel
When using an older kernel, or a kernel from a distribution without the kvm modules,
you must download (from the same link), compile and install the modules yourself:
.. code-block:: console
tar xjf kvm-kmod-release.tar.bz2
cd kvm-kmod-release
./configure
make
sudo make install
sudo /sbin/modprobe kvm-intel
qemu-kvm installs in the /usr/local/bin directory.
For more details about KVM configuration and usage, please refer to:
`http://www.linux-kvm.org/page/HOWTO1 <http://www.linux-kvm.org/page/HOWTO1>`_.
#. Create a Virtual Machine and install Fedora 14 on the Virtual Machine.
This is referred to as the Guest Operating System (Guest OS).
#. Download and install the latest ixgbe driver from:
`http://downloadcenter.intel.com/Detail_Desc.aspx?agr=Y&amp;DwnldID=14687 <http://downloadcenter.intel.com/Detail_Desc.aspx?agr=Y&amp;DwnldID=14687>`_
#. In the Host OS
When using Linux kernel ixgbe driver, unload the Linux ixgbe driver and reload it with the max_vfs=2,2 argument:
.. code-block:: console
rmmod ixgbe
"modprobe ixgbe max_vfs=2,2"
When using DPDK PMD PF driver, insert Intel® DPDK kernel module igb_uio and set the number of VF by sysfs max_vfs:
.. code-block:: console
modprobe uio
insmod igb_uio
./dpdk_nic_bind.py -b igb_uio 02:00.0 02:00.1 0e:00.0 0e:00.1
echo 2 > /sys/bus/pci/devices/0000\:02\:00.0/max_vfs
echo 2 > /sys/bus/pci/devices/0000\:02\:00.1/max_vfs
echo 2 > /sys/bus/pci/devices/0000\:0e\:00.0/max_vfs
echo 2 > /sys/bus/pci/devices/0000\:0e\:00.1/max_vfs
.. note::
You need to explicitly specify number of vfs for each port, for example,
in the command above, it creates two vfs for the first two ixgbe ports.
Let say we have a machine with four physical ixgbe ports:
0000:02:00.0
0000:02:00.1
0000:0e:00.0
0000:0e:00.1
The command above creates two vfs for device 0000:02:00.0:
.. code-block:: console
ls -alrt /sys/bus/pci/devices/0000\:02\:00.0/virt*
lrwxrwxrwx. 1 root root 0 Apr 13 05:40 /sys/bus/pci/devices/0000:02:00.0/ virtfn1 -> ../0000:02:10.2
lrwxrwxrwx. 1 root root 0 Apr 13 05:40 /sys/bus/pci/devices/0000:02:00.0/ virtfn0 -> ../0000:02:10.0
It also creates two vfs for device 0000:02:00.1:
.. code-block:: console
ls -alrt /sys/bus/pci/devices/0000\:02\:00.1/virt*
lrwxrwxrwx. 1 root root 0 Apr 13 05:51 /sys/bus/pci/devices/0000:02:00.1/
virtfn1 -> ../0000:02:10.3
lrwxrwxrwx. 1 root root 0 Apr 13 05:51 /sys/bus/pci/devices/0000:02:00.1/
virtfn0 -> ../0000:02:10.1
#. List the PCI devices connected and notice that the Host OS shows two Physical Functions (traditional ports)
and four Virtual Functions (two for each port).
This is the result of the previous step.
#. Insert the pci_stub module to hold the PCI devices that are freed from the default driver using the following command
(see http://www.linux-kvm.org/page/How_to_assign_devices_with_VT-d_in_KVM Section 4 for more information):
.. code-block:: console
sudo /sbin/modprobe pci-stub
Unbind the default driver from the PCI devices representing the Virtual Functions.
A script to perform this action is as follows:
.. code-block:: console
echo "8086 10ed" > /sys/bus/pci/drivers/pci-stub/new_id
echo 0000:08:10.0 > /sys/bus/pci/devices/0000:08:10.0/driver/unbind
echo 0000:08:10.0 > /sys/bus/pci/drivers/pci-stub/bind
where, 0000:08:10.0 belongs to the Virtual Function visible in the Host OS.
#. Now, start the Virtual Machine by running the following command:
.. code-block:: console
/usr/local/kvm/bin/qemu-system-x86_64 -m 4096 -smp 4 -boot c -hda lucid.qcow2 -device pci-assign,host=08:10.0
where:
— -m = memory to assign
— -smp = number of smp cores
— -boot = boot option
— -hda = virtual disk image
— -device = device to attach
.. note::
— The pci-assign,host=08:10.0 alue indicates that you want to attach a PCI device
to a Virtual Machine and the respective (Bus:Device.Function)
numbers should be passed for the Virtual Function to be attached.
— qemu-kvm-0.14.0 allows a maximum of four PCI devices assigned to a VM,
but this is qemu-kvm version dependent since qemu-kvm-0.14.1 allows a maximum of five PCI devices.
— qemu-system-x86_64 also has a -cpu command line option that is used to select the cpu_model
to emulate in a Virtual Machine. Therefore, it can be used as:
.. code-block:: console
/usr/local/kvm/bin/qemu-system-x86_64 -cpu ?
(to list all available cpu_models)
/usr/local/kvm/bin/qemu-system-x86_64 -m 4096 -cpu host -smp 4 -boot c -hda lucid.qcow2 -device pci-assign,host=08:10.0
(to use the same cpu_model equivalent to the host cpu)
For more information, please refer to: `http://wiki.qemu.org/Features/CPUModels <http://wiki.qemu.org/Features/CPUModels>`_.
#. Install and run DPDK host app to take over the Physical Function. Eg.
.. code-block:: console
make install T=x86_64-native-linuxapp-gcc
./x86_64-native-linuxapp-gcc/app/testpmd -c f -n 4 -- -i
#. Finally, access the Guest OS using vncviewer with the localhost:5900 port and check the lspci command output in the Guest OS.
The virtual functions will be listed as available for use.
#. Configure and install the Intel® DPDK with an x86_64-native-linuxapp-gcc configuration on the Guest OS as normal,
that is, there is no change to the normal installation procedure.
.. code-block:: console
make config T=x86_64-native-linuxapp-gcc O=x86_64-native-linuxapp-gcc
cd x86_64-native-linuxapp-gcc
make
.. note::
If you are unable to compile the Intel® DPDK and you are getting "error: CPU you selected does not support x86-64 instruction set",
power off the Guest OS and start the virtual machine with the correct -cpu option in the qemu- system-x86_64 command as shown in step 9.
You must select the best x86_64 cpu_model to emulate or you can select host option if available.
.. note::
Run the Intel® DPDK l2fwd sample application in the Guest OS with Hugepages enabled.
For the expected benchmark performance, you must pin the cores from the Guest OS to the Host OS (taskset can be used to do this) and
you must also look at the PCI Bus layout on the board to ensure you are not running the traffic over the QPI Inteface.
.. note::
* The Virtual Machine Manager (the Fedora package name is virt-manager) is a utility for virtual machine management
that can also be used to create, start, stop and delete virtual machines.
If this option is used, step 2 and 6 in the instructions provided will be different.
* virsh, a command line utility for virtual machine management,
can also be used to bind and unbind devices to a virtual machine in Ubuntu.
If this option is used, step 6 in the instructions provided will be different.
* The Virtual Machine Monitor (see Figure 11) is equivalent to a Host OS with KVM installed as described in the instructions.
.. _pg_figure_11:
**Figure 11. Performance Benchmark Setup**
.. image25_png has been renamed
|perf_benchmark|
Intel® DPDK SR-IOV PMD PF/VF Driver Usage Model
-----------------------------------------------
Fast Host-based Packet Processing
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Software Defined Network (SDN) trends are demanding fast host-based packet handling.
In a virtualization environment,
the Intel® DPDK VF PMD driver performs the same throughput result as a non-VT native environment.
With such host instance fast packet processing, lots of services such as filtering, QoS,
DPI can be offloaded on the host fast path.
shows the scenario where some VMs directly communicate externally via a VFs,
while others connect to a virtual switch and share the same uplink bandwidth.
.. _pg_figure_12:
**Figure 12. Fast Host-based Packet Processing**
.. image26_png has been renamed
|fast_pkt_proc|
SR-IOV (PF/VF) Approach for Inter-VM Communication
--------------------------------------------------
Inter-VM data communication is one of the traffic bottle necks in virtualization platforms.
SR-IOV device assignment helps a VM to attach the real device, taking advantage of the bridge in the NIC.
So VF-to-VF traffic within the same physical port (VM0<->VM1) have hardware acceleration.
However, when VF crosses physical ports (VM0<->VM2), there is no such hardware bridge.
In this case, the Intel® DPDK PMD PF driver provides host forwarding between such VMs.
Figure 13 shows an example.
In this case an update of the MAC address lookup tables in both the NIC and host Intel® DPDK application is required.
In the NIC, writing the destination of a MAC address belongs to another cross device VM to the PF specific pool.
So when a packet comes in, its destination MAC address will match and forward to the host Intel® DPDK PMD application.
In the host Intel® DPDK application, the behavior is similar to L2 forwarding,
that is, the packet is forwarded to the correct PF pool.
The SR-IOV NIC switch forwards the packet to a specific VM according to the MAC destination address
which belongs to the destination VF on the VM.
.. _pg_figure_13:
**Figure 13. Inter-VM Communication**
.. image27_png has been renamed
|inter_vm_comms|
.. |perf_benchmark| image:: img/perf_benchmark.png
.. |single_port_nic| image:: img/single_port_nic.png
.. |inter_vm_comms| image:: img/inter_vm_comms.png
.. |fast_pkt_proc| image:: img/fast_pkt_proc.png

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Programmer's Guide
==================
June 2014
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS,
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OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
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Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
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Copyright © 2012-2014, Intel Corporation. All rights reserved.
**Contents**
.. toctree::
:maxdepth: 3
:numbered:
intro
overview
env_abstraction_layer
malloc_lib
ring_lib
mempool_lib
mbuf_lib
poll_mode_drv
i40e_ixgbe_igb_virt_func_drv
driver_vm_emul_dev
ivshmem_lib
poll_mode_drv_emulated_virtio_nic
poll_mode_drv_paravirtual_vmxnets_nic
intel_dpdk_xen_based_packet_switch_sol
libpcap_ring_based_poll_mode_drv
link_bonding_poll_mode_drv_lib
timer_lib
hash_lib
lpm_lib
lpm6_lib
packet_distrib_lib
ip_fragment_reassembly_lib
multi_proc_support
kernel_nic_interface
thread_safety_intel_dpdk_functions
qos_framework
power_man
packet_classif_access_ctrl
packet_framework
source_org
dev_kit_build_system
dev_kit_root_make_help
extend_intel_dpdk
build_app
ext_app_lib_make_help
perf_opt_guidelines
writing_efficient_code
profile_app
glossary
**Figures**
:ref:`Figure 1. Core Components Architecture <pg_figure_1>`
:ref:`Figure 2. EAL Initialization in a Linux Application Environment <pg_figure_2>`
:ref:`Figure 3. Example of a malloc heap and malloc elements within the malloc library <pg_figure_3>`
:ref:`Figure 4. Ring Structure <pg_figure_4>`
:ref:`Figure 5. Two Channels and Quad-ranked DIMM Example <pg_figure_5>`
:ref:`Figure 6. Three Channels and Two Dual-ranked DIMM Example <pg_figure_6>`
:ref:`Figure 7. A mempool in Memory with its Associated Ring <pg_figure_7>`
:ref:`Figure 8. An mbuf with One Segment <pg_figure_8>`
:ref:`Figure 9. An mbuf with Three Segments <pg_figure_9>`
:ref:`Figure 10. Virtualization for a Single Port NIC in SR-IOV Mode <pg_figure_10>`
:ref:`Figure 11. Performance Benchmark Setup <pg_figure_11>`
:ref:`Figure 12. Fast Host-based Packet Processing <pg_figure_12>`
:ref:`Figure 13. Inter-VM Communication <pg_figure_13>`
:ref:`Figure 14. Host2VM Communication Example Using kni vhost Back End <pg_figure_14>`
:ref:`Figure 15. Host2VM Communication Example Using qemu vhost Back End <pg_figure_15>`
:ref:`Figure 16. Memory Sharing inthe Intel® DPDK Multi-process Sample Application <pg_figure_16>`
:ref:`Figure 17. Components of an Intel® DPDK KNI Application <pg_figure_17>`
:ref:`Figure 18. Packet Flow via mbufs in the Intel DPDK® KNI <pg_figure_18>`
:ref:`Figure 19. vHost-net Architecture Overview <pg_figure_19>`
:ref:`Figure 20. KNI Traffic Flow <pg_figure_20>`
:ref:`Figure 21. Complex Packet Processing Pipeline with QoS Support <pg_figure_21>`
:ref:`Figure 22. Hierarchical Scheduler Block Internal Diagram <pg_figure_22>`
:ref:`Figure 23. Scheduling Hierarchy per Port <pg_figure_23>`
:ref:`Figure 24. Internal Data Structures per Port <pg_figure_24>`
:ref:`Figure 25. Prefetch Pipeline for the Hierarchical Scheduler Enqueue Operation <pg_figure_25>`
:ref:`Figure 26. Pipe Prefetch State Machine for the Hierarchical Scheduler Dequeue Operation <pg_figure_26>`
:ref:`Figure 27. High-level Block Diagram of the Intel® DPDK Dropper <pg_figure_27>`
:ref:`Figure 28. Flow Through the Dropper <pg_figure_28>`
:ref:`Figure 29. Example Data Flow Through Dropper <pg_figure_29>`
:ref:`Figure 30. Packet Drop Probability for a Given RED Configuration <pg_figure_30>`
:ref:`Figure 31. Initial Drop Probability (pb), Actual Drop probability (pa) Computed Using a Factor 1 (Blue Curve) and a Factor 2 (Red Curve) <pg_figure_31>`
:ref:`Figure 32. Example of packet processing pipeline. The input ports 0 and 1 are connected with the output ports 0, 1 and 2 through tables 0 and 1. <pg_figure_32>`
:ref:`Figure 33. Sequence of steps for hash table operations in packet processing context <pg_figure_33>`
:ref:`Figure 34. Data structures for configurable key size hash tables <pg_figure_34>`
:ref:`Figure 35. Bucket search pipeline for key lookup operation (configurable key size hash tables) <pg_figure_35>`
:ref:`Figure 36. Pseudo-code for match, match_many and match_pos <pg_figure_36>`
:ref:`Figure 37. Data structures for 8-byte key hash tables <pg_figure_37>`
:ref:`Figure 38. Data structures for 16-byte key hash tables <pg_figure_38>`
:ref:`Figure 39. Bucket search pipeline for key lookup operation (single key size hash tables) <pg_figure_39>`
**Tables**
:ref:`Table 1. Packet Processing Pipeline Implementing QoS <pg_table_1>`
:ref:`Table 2. Infrastructure Blocks Used by the Packet Processing Pipeline <pg_table_2>`
:ref:`Table 3. Port Scheduling Hierarchy <pg_table_3>`
:ref:`Table 4. Scheduler Internal Data Structures per Port <pg_table_4>`
:ref:`Table 5. Ethernet Frame Overhead Fields <pg_table_5>`
:ref:`Table 6. Token Bucket Generic Operations <pg_table_6>`
:ref:`Table 7. Token Bucket Generic Parameters <pg_table_7>`
:ref:`Table 8. Token Bucket Persistent Data Structure <pg_table_8>`
:ref:`Table 9. Token Bucket Operations <pg_table_9>`
:ref:`Table 10. Subport/Pipe Traffic Class Upper Limit Enforcement Persistent Data Structure <pg_table_10>`
:ref:`Table 11. Subport/Pipe Traffic Class Upper Limit Enforcement Operations <pg_table_11>`
:ref:`Table 12. Weighted Round Robin (WRR) <pg_table_12>`
:ref:`Table 13. Subport Traffic Class Oversubscription <pg_table_13>`
:ref:`Table 14. Watermark Propagation from Subport Level to Member Pipes at the Beginning of Each Traffic Class Upper Limit Enforcement Period <pg_table_14>`
:ref:`Table 15. Watermark Calculation <pg_table_15>`
:ref:`Table 16. RED Configuration Parameters <pg_table_16>`
:ref:`Table 17. Relative Performance of Alternative Approaches <pg_table_17>`
:ref:`Table 18. RED Configuration Corresponding to RED Configuration File <pg_table_18>`
:ref:`Table 19. Port types <pg_table_19>`
:ref:`Table 20. Port abstract interface <pg_table_20>`
:ref:`Table 21. Table types <pg_table_21>`
:ref:`Table 29. Table Abstract Interface <pg_table_29_1>`
:ref:`Table 22. Configuration parameters common for all hash table types <pg_table_22>`
:ref:`Table 23. Configuration parameters specific to extendible bucket hash table <pg_table_23>`
:ref:`Table 24. Configuration parameters specific to pre-computed key signature hash table <pg_table_24>`
:ref:`Table 25. The main large data structures (arrays) used for configurable key size hash tables <pg_table_25>`
:ref:`Table 26. Field description for bucket array entry (configurable key size hash tables) <pg_table_26>`
:ref:`Table 27. Description of the bucket search pipeline stages (configurable key size hash tables) <pg_table_27>`
:ref:`Table 28. Lookup tables for match, match_many, match_pos <pg_table_28>`
:ref:`Table 29. Collapsed lookup tables for match, match_many and match_pos <pg_table_29>`
:ref:`Table 30. The main large data structures (arrays) used for 8-byte and 16-byte key size hash tables <pg_table_30>`
:ref:`Table 31. Field description for bucket array entry (8-byte and 16-byte key hash tables) <pg_table_31>`
:ref:`Table 32. Description of the bucket search pipeline stages (8-byte and 16-byte key hash tables) <pg_table_32>`
:ref:`Table 33. Next hop actions (reserved) <pg_table_33>`
:ref:`Table 34. User action examples <pg_table_34>`

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Intel® DPDK Xen Based Packet-Switching Solution
===============================================
Introduction
------------
Intel® DPDK provides a para-virtualization packet switching solution, based on the Xen hypervisor's Grant Table, Note 1,
which provides simple and fast packet switching capability between guest domains and host domain based on MAC address or VLAN tag.
This solution is comprised of two components;
a Poll Mode Driver (PMD) as the front end in the guest domain and a switching back end in the host domain.
XenStore is used to exchange configure information between the PMD front end and switching back end,
including grant reference IDs for shared Virtio RX/TX rings,
MAC address, device state, and so on. XenStore is an information storage space shared between domains,
see further information on XenStore below.
The front end PMD can be found in the Intel® DPDK directory lib/ librte_pmd_xenvirt and back end example in examples/vhost_xen.
The PMD front end and switching back end use shared Virtio RX/TX rings as para- virtualized interface.
The Virtio ring is created by the front end, and Grant table references for the ring are passed to host.
The switching back end maps those grant table references and creates shared rings in a mapped address space.
The following diagram describes the functionality of the Intel® DPDK Xen Packet- Switching Solution.
.. image35_png has been renamed
|dpdk_xen_pkt_switch|
Note 1 The Xen hypervisor uses a mechanism called a Grant Table to share memory between domains
(`http://wiki.xen.org/wiki/Grant Table <http://wiki.xen.org/wiki/Grant%20Table>`_).
A diagram of the design is shown below, where "gva" is the Guest Virtual Address,
which is the data pointer of the mbuf, and "hva" is the Host Virtual Address:
.. image36_png has been renamed
|grant_table|
In this design, a Virtio ring is used as a para-virtualized interface for better performance over a Xen private ring
when packet switching to and from a VM.
The additional performance is gained by avoiding a system call and memory map in each memory copy with a XEN private ring.
Device Creation
---------------
Poll Mode Driver Front End
~~~~~~~~~~~~~~~~~~~~~~~~~~
* Mbuf pool allocation:
To use a Xen switching solution, the Intel® DPDK application should use rte_mempool_gntalloc_create()
to reserve mbuf pools during initialization.
rte_mempool_gntalloc_create() creates a mempool with objects from memory allocated and managed via gntalloc/gntdev.
The Intel® DPDK now supports construction of mempools from allocated virtual memory through the rte_mempool_xmem_create() API.
This front end constructs mempools based on memory allocated through the xen_gntalloc driver.
rte_mempool_gntalloc_create() allocates Grant pages, maps them to continuous virtual address space,
and calls rte_mempool_xmem_create() to build mempools.
The Grant IDs for all Grant pages are passed to the host through XenStore.
* Virtio Ring Creation:
The Virtio queue size is defined as 256 by default in the VQ_DESC_NUM macro.
Using the queue setup function,
Grant pages are allocated based on ring size and are mapped to continuous virtual address space to form the Virtio ring.
Normally, one ring is comprised of several pages.
Their Grant IDs are passed to the host through XenStore.
There is no requirement that this memory be physically continuous.
* Interrupt and Kick:
There are no interrupts in Intel® DPDK Xen Switching as both front and back ends work in polling mode.
There is no requirement for notification.
* Feature Negotiation:
Currently, feature negotiation through XenStore is not supported.
* Packet Reception & Transmission:
With mempools and Virtio rings created, the front end can operate Virtio devices,
as it does in Virtio PMD for KVM Virtio devices with the exception that the host
does not require notifications or deal with interrupts.
XenStore is a database that stores guest and host information in the form of (key, value) pairs.
The following is an example of the information generated during the startup of the front end PMD in a guest VM (domain ID 1):
.. code-block:: console
xenstore -ls /local/domain/1/control/dpdk
0_mempool_gref="3042,3043,3044,3045"
0_mempool_va="0x7fcbc6881000"
0_tx_vring_gref="3049"
0_rx_vring_gref="3053"
0_ether_addr="4e:0b:d0:4e:aa:f1"
0_vring_flag="3054"
...
Multiple mempools and multiple Virtios may exist in the guest domain, the first number is the index, starting from zero.
The idx#_mempool_va stores the guest virtual address for mempool idx#.
The idx#_ether_adder stores the MAC address of the guest Virtio device.
For idx#_rx_ring_gref, idx#_tx_ring_gref, and idx#_mempool_gref, the value is a list of Grant references.
Take idx#_mempool_gref node for example, the host maps those Grant references to a continuous virtual address space.
The real Grant reference information is stored in this virtual address space,
where (gref, pfn) pairs follow each other with -1 as the terminator.
.. image37_pnng has been renamed
|grant_refs|
After all gref# IDs are retrieved, the host maps them to a continuous virtual address space.
With the guest mempool virtual address, the host establishes 1:1 address mapping.
With multiple guest mempools, the host establishes multiple address translation regions.
Switching Back End
~~~~~~~~~~~~~~~~~~
The switching back end monitors changes in XenStore.
When the back end detects that a new Virtio device has been created in a guest domain, it will:
#. Retrieve Grant and configuration information from XenStore.
#. Map and create a Virtio ring.
#. Map mempools in the host and establish address translation between the guest address and host address.
#. Select a free VMDQ pool, set its affinity with the Virtio device, and set the MAC/ VLAN filter.
Packet Reception
~~~~~~~~~~~~~~~~
When packets arrive from an external network, the MAC?VLAN filter classifies packets into queues in one VMDQ pool.
As each pool is bonded to a Virtio device in some guest domain, the switching back end will:
#. Fetch an available entry from the Virtio RX ring.
#. Get gva, and translate it to hva.
#. Copy the contents of the packet to the memory buffer pointed to by gva.
The Intel® DPDK application in the guest domain, based on the PMD front end,
is polling the shared Virtio RX ring for available packets and receives them on arrival.
Packet Transmission
~~~~~~~~~~~~~~~~~~~
When a Virtio device in one guest domain is to transmit a packet,
it puts the virtual address of the packet's data area into the shared Virtio TX ring.
The packet switching back end is continuously polling the Virtio TX ring.
When new packets are available for transmission from a guest, it will:
#. Fetch an available entry from the Virtio TX ring.
#. Get gva, and translate it to hva.
#. Copy the packet from hva to the host mbuf's data area.
#. Compare the destination MAC address with all the MAC addresses of the Virtio devices it manages.
If a match exists, it directly copies the packet to the matched VIrtio RX ring.
Otherwise, it sends the packet out through hardware.
.. note::
The packet switching back end is for demonstration purposes only.
The user could implement their switching logic based on this example.
In this example, only one physical port on the host is supported.
Multiple segments are not supported. The biggest mbuf supported is 4KB.
When the back end is restarted, all front ends must also be restarted.
Running the Application
-----------------------
The following describes the steps required to run the application.
Validated Environment
~~~~~~~~~~~~~~~~~~~~~
Host:
Xen-hypervisor: 4.2.2
Distribution: Fedora release 18
Kernel: 3.10.0
Xen development package (including Xen, Xen-libs, xen-devel): 4.2.3
Guest:
Distribution: Fedora 16 and 18
Kernel: 3.6.11
Xen Host Prerequisites
~~~~~~~~~~~~~~~~~~~~~~
Note that the following commands might not be the same on different Linux* distributions.
* Install xen-devel package:
.. code-block:: console
yum install xen-devel.x86_64
* Start xend if not already started:
.. code-block:: console
/etc/init.d/xend start
* Mount xenfs if not already mounted:
.. code-block:: console
mount -t xenfs none /proc/xen
* Enlarge the limit for xen_gntdev driver:
.. code-block:: console
modprobe -r xen_gntdev
modprobe xen_gntdev limit=1000000
.. note::
The default limit for earlier versions of the xen_gntdev driver is 1024.
That is insufficient to support the mapping of multiple Virtio devices into multiple VMs,
so it is necessary to enlarge the limit by reloading this module.
The default limit of recent versions of xen_gntdev is 1048576.
The rough calculation of this limit is:
limit=nb_mbuf# * VM#.
In Intel® DPDK examples, nb_mbuf# is normally 8192.
Building and Running the Switching Backend
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#. Edit config/common_linuxapp, and change the default configuration value for the following two items:
.. code-block:: console
CONFIG_RTE_LIBRTE_XEN_DOM0=y
CONFIG RTE_LIBRTE_PMD_XENVIRT=n
#. Build the target:
.. code-block:: console
make install T=x86_64-native-linuxapp-gcc
#. Ensure that RTE_SDK and RTE_TARGET are correctly set. Build the switching example:
.. code-block:: console
make -C examples/vhost_xen/
#. Load the Xen Intel® DPDK memory management module and preallocate memory:
.. code-block:: console
insmod ./x86_64-native-linuxapp-gcc/build/lib/librte_eal/linuxapp/xen_dom0/rte_dom0_mm.ko
echo 2048> /sys/kernel/mm/dom0-mm/memsize-mB/memsize
.. note::
On Xen Dom0, there is no hugepage support.
Under Xen Dom0, the Intel® DPDK uses a special memory management kernel module
to allocate chunks of physically continuous memory.
Refer to the *Intel® DPDK Getting Started Guide* for more information on memory management in the Intel® DPDK.
In the above command, 4 GB memory is reserved (2048 of 2 MB pages) for Intel® DPDK.
#. Load igb_uio and bind one Intel NIC controller to igb_uio:
.. code-block:: console
insmod x86_64-native-linuxapp-gcc/kmod/igb_uio.ko
python tools/dpdk_nic_bind.py -b igb_uio 0000:09:00:00.0
In this case, 0000:09:00.0 is the PCI address for the NIC controller.
#. Run the switching back end example:
.. code-block:: console
examples/vhost_xen/build/vhost-switch -c f -n 3 --xen-dom0 -- -p1
.. note::
The -xen-dom0 option instructs the Intel® DPDK to use the Xen kernel module to allocate memory.
Other Parameters:
* -vm2vm
The vm2vm parameter enables/disables packet switching in software.
Disabling vm2vm implies that on a VM packet transmission will always go to the Ethernet port
and will not be switched to another VM
* -Stats
The Stats parameter controls the printing of Virtio-net device statistics.
The parameter specifies the interval (in seconds) at which to print statistics,
an interval of 0 seconds will disable printing statistics.
Xen PMD Frontend Prerequisites
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#. Install xen-devel package for accessing XenStore:
.. code-block:: console
yum install xen-devel.x86_64
#. Mount xenfs, if it is not already mounted:
.. code-block:: console
mount -t xenfs none /proc/xen
#. Enlarge the default limit for xen_gntalloc driver:
.. code-block:: console
modprobe -r xen_gntalloc
modprobe xen_gntalloc limit=6000
.. note::
Before the Linux kernel version 3.8-rc5, Jan 15th 2013,
a critical defect occurs when a guest is heavily allocating Grant pages.
The Grant driver allocates fewer pages than expected which causes kernel memory corruption.
This happens, for example, when a guest uses the v1 format of a Grant table entry and allocates
more than 8192 Grant pages (this number might be different on different hypervisor versions).
To work around this issue, set the limit for gntalloc driver to 6000.
(The kernel normally allocates hundreds of Grant pages with one Xen front end per virtualized device).
If the kernel allocates a lot of Grant pages, for example, if the user uses multiple net front devices,
it is best to upgrade the Grant alloc driver.
This defect has been fixed in kernel version 3.8-rc5 and later.
Building and Running the Front End
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#. Edit config/common_linuxapp, and change the default configuration value:
.. code-block:: console
CONFIG_RTE_LIBRTE_XEN_DOM0=n
CONFIG_RTE_LIBRTE_PMD_XENVIRT=y
#. Build the package:
.. code-block:: console
make install T=x86_64-native-linuxapp-gcc
#. Enable hugepages. Refer to the *Intel® DPDK Getting Started Guide* for instructions on
how to use hugepages in the Intel® DPDK.
#. Run TestPMD. Refer to *Intel® DPDK TestPMD Application User Guide* for detailed parameter usage.
.. code-block:: console
./x86_64-native-linuxapp-gcc/app/testpmd -c f -n 4 --vdev="eth_xenvirt0,mac=00:00:00:00:00:11"
testpmd>set fwd mac
testpmd>start
As an example to run two TestPMD instances over 2 Xen Virtio devices:
.. code-block:: console
--vdev="eth_xenvirt0,mac=00:00:00:00:00:11" --vdev="eth_xenvirt1;mac=00:00:00:00:00:22"
Usage Examples: Injecting a Packet Stream Using a Packet Generator
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Loopback Mode
^^^^^^^^^^^^^
Run TestPMD in a guest VM:
.. code-block:: console
./x86_64-native-linuxapp-gcc/app/testpmd -c f -n 4 --vdev="eth_xenvirt0,mac=00:00:00:00:00:11" -- -i --eth-peer=0,00:00:00:00:00:22
testpmd> set fwd mac
testpmd> start
Example output of the vhost_switch would be:
.. code-block:: console
DATA:(0) MAC_ADDRESS 00:00:00:00:00:11 and VLAN_TAG 1000 registered.
The above message indicates that device 0 has been registered with MAC address 00:00:00:00:00:11 and VLAN tag 1000.
Any packets received on the NIC with these values is placed on the device's receive queue.
Configure a packet stream in the packet generator, set the destination MAC address to 00:00:00:00:00:11, and VLAN to 1000,
the guest Virtio receives these packets and sends them out with destination MAC address 00:00:00:00:00:22.
Inter-VM Mode
^^^^^^^^^^^^^
Run TestPMD in guest VM1:
.. code-block:: console
./x86_64-native-linuxapp-gcc/app/testpmd -c f -n 4 --vdev="eth_xenvirt0,mac=00:00:00:00:00:11" -- -i --eth-peer=0,00:00:00:00:00:22 -- -i
Run TestPMD in guest VM2:
.. code-block:: console
./x86_64-native-linuxapp-gcc/app/testpmd -c f -n 4 --vdev="eth_xenvirt0,mac=00:00:00:00:00:22" -- -i --eth-peer=0,00:00:00:00:00:33
Configure a packet stream in the packet generator, and set the destination MAC address to 00:00:00:00:00:11 and VLAN to 1000.
The packets received in Virtio in guest VM1 will be forwarded to Virtio in guest VM2 and
then sent out through hardware with destination MAC address 00:00:00:00:00:33.
The packet flow is:
packet generator->Virtio in guest VM1->switching backend->Virtio in guest VM2->switching backend->wire
.. |grant_table| image:: img/grant_table.png
.. |grant_refs| image:: img/grant_refs.png
.. |dpdk_xen_pkt_switch| image:: img/dpdk_xen_pkt_switch.png

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Introduction
============
This document provides software architecture information,
development environment information and optimization guidelines.
For programming examples and for instructions on compiling and running each sample application,
see the *Intel® DPDK Sample Applications User Guide* for details.
For general information on compiling and running applications, see the *Intel® DPDK Getting Started Guide*.
Documentation Roadmap
---------------------
The following is a list of Intel® DPDK documents in the suggested reading order:
* **Release Notes** (this document): Provides release-specific information, including supported features,
limitations, fixed issues, known issues and so on.
Also, provides the answers to frequently asked questions in FAQ format.
* **Getting Started Guide** : Describes how to install and configure the Intel® DPDK software;
designed to get users up and running quickly with the software.
* **FreeBSD* Getting Started Guide** : A document describing the use of the Intel® DPDK with FreeBSD*
has been added in Intel® DPDK Release 1.6.0.
Refer to this guide for installation and configuration instructions to get started using the Intel® DPDK with FreeBSD*.
* **Programmer's Guide** (this document): Describes:
* The software architecture and how to use it (through examples),
specifically in a Linux* application (linuxapp) environment
* The content of the Intel® DPDK, the build system
(including the commands that can be used in the root Intel® DPDK Makefile to build the development kit and an application)
and guidelines for porting an application
* Optimizations used in the software and those that should be considered for new development
A glossary of terms is also provided.
* **API Reference** : Provides detailed information about Intel® DPDK functions,
data structures and other programming constructs.
* **Sample Applications User Guide**: Describes a set of sample applications.
Each chapter describes a sample application that showcases specific functionality
and provides instructions on how to compile, run and use the sample application.
Related Publications
--------------------
The following documents provide information that is relevant to the development of applications using the Intel® DPDK:
* Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
IP Fragmentation and Reassembly Library
=======================================
The IP Fragmentation and Reassembly Library implements IPv4 and IPv6 packet fragmentation and reassembly.
Packet fragmentation
--------------------
Packet fragmentation routines devide input packet into number of fragments.
Both rte_ipv4_fragment_packet() and rte_ipv6_fragment_packet() functions assume that input mbuf data
points to the start of the IP header of the packet (i.e. L2 header is already stripped out).
To avoid copying fo the actual packet's data zero-copy technique is used (rte_pktmbuf_attach).
For each fragment two new mbufs are created:
* Direct mbuf -- mbuf that will contain L3 header of the new fragment.
* Indirect mbuf -- mbuf that is attached to the mbuf with the original packet.
It's data field points to the start of the original packets data plus fragment offset.
Then L3 header is copied from the original mbuf into the 'direct' mbuf and updated to reflect new fragmented status.
Note that for IPv4, header checksum is not recalculated and is set to zero.
Finally 'direct' and 'indirect' mbufs for each fragnemt are linked together via mbuf's next filed to compose a packet for the new fragment.
The caller has an ability to explicitly specify which mempools should be used to allocate 'direct' and 'indirect' mbufs from.
Note that configuration macro RTE_MBUF_SCATTER_GATHER has to be enabled to make fragmentation library build and work correctly.
For more information about direct and indirect mbufs, refer to the *Intel DPDK Programmers guide 7.7 Direct and Indirect Buffers.*
Packet reassembly
-----------------
IP Fragment Table
~~~~~~~~~~~~~~~~~
Fragment table maintains information about already received fragments of the packet.
Each IP packet is uniquely identified by triple <Source IP address>, <Destination IP address>, <ID>.
Note that all update/lookup operations on Fragmen Table are not thread safe.
So if different execution contexts (threads/processes) will access the same table simultaneously,
then some exernal syncing mechanism have to be provided.
Each table entry can hold information about packets consisting of up to RTE_LIBRTE_IP_FRAG_MAX (by default: 4) fragments.
Code example, that demonstrates creation of a new Fragment table:
.. code-block:: c
frag_cycles = (rte_get_tsc_hz() + MS_PER_S - 1) / MS_PER_S * max_flow_ttl;
bucket_num = max_flow_num + max_flow_num / 4;
frag_tbl = rte_ip_frag_table_create(max_flow_num, bucket_entries, max_flow_num, frag_cycles, socket_id);
Internally Fragmen table is a simple hash table.
The basic idea is to use two hash functions and <bucket_entries> \* associativity.
This provides 2 \* <bucket_entries> possible locations in the hash table for each key.
When the collision occurs and all 2 \* <bucket_entries> are occupied,
instead of resinserting existing keys into alternative locations, ip_frag_tbl_add() just returns a faiure.
Also, entries that resides in the table longer then <max_cycles> are considered as invalid,
and could be removed/replaced by the new ones.
Note that reassembly demands a lot of mbuf's to be allocated.
At any given time up to (2 \* bucket_entries \* RTE_LIBRTE_IP_FRAG_MAX \* <maximum number of mbufs per packet>)
can be stored inside Fragment Table waiting for remaining fragments.
Packet Reassembly
~~~~~~~~~~~~~~~~~
Fragmented packets processing and reassembly is done by the rte_ipv4_frag_reassemble_packet()/rte_ipv6_frag_reassemble_packet.
Functions. They either return a pointer to valid mbuf that contains reassembled packet,
or NULL (if the packet can't be reassembled for some reason).
These functions are responsible for:
#. Search the Fragment Table for entry with packet's <IPv4 Source Address, IPv4 Destination Address, Packet ID>.
#. If the entry is found, then check if that entry already timed-out.
If yes, then free all previously received fragments, and remove information about them from the entry.
#. If no entry with such key is found, then try to create a new one by one of two ways:
a) Use as empty entry.
b) Delete a timed-out entry, free mbufs associated with it mbufs and store a new entry with specified key in it.
#. Update the entry with new fragment information and check if a packet can be reassembled
(the packet's entry contains all fragments).
a) If yes, then, reassemble the packet, mark table's entry as empty and return the reassembled mbuf to the caller.
b) If no, then return a NULL to the caller.
If at any stage of packet processing an error is envountered
(e.g: can't insert new entry into the Fragment Table, or invalid/timed-out fragment),
then the function will free all associated with the packet fragments,
mark the table entry as invalid and return NULL to the caller.
Debug logging and Statistics Collection
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The RTE_LIBRTE_IP_FRAG_TBL_STAT config macro controls statistics collection for the Fragment Table.
This macro is not enabled by default.
The RTE_LIBRTE_IP_FRAG_DEBUG controls debug logging of IP fragments processing and reassembling.
This macro is disabled by default.
Note that while logging contains a lot of detailed information,
it slows down packet processing and might cause the loss of a lot of packets.

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
IVSHMEM Library
===============
The Intel® DPDK IVSHMEM library facilitates fast zero-copy data sharing among virtual machines
(host-to-guest or guest-to-guest) by means of QEUMU's IVSHMEM mechanism.
The library works by providing a command line for QEMU to map several hugepages into a single IVSHMEM device.
For the guest to know what is inside any given IVSHMEM device
(and to distinguish between Intel® DPDK and non-Intel® DPDK IVSHMEM devices),
a metadata file is also mapped into the IVSHMEM segment.
No work needs to be done by the guest application to map IVSHMEM devices into memory;
they are automatically recognized by the Intel® DPDK Environment Abstraction Layer (EAL).
A typical Intel® DPDK IVSHMEM use case looks like the following.
.. image28_png has been renamed
|ivshmem|
The same could work with several virtual machines, providing host-to-VM or VM-to-VM communication.
The maximum number of metadata files is 32 (by default) and each metadata file can contain different (or even the same) hugepages.
The only constraint is that each VM has to have access to the memory it is sharing with other entities (be it host or another VM).
For example, if the user wants to share the same memzone across two VMs, each VM must have that memzone in its metadata file.
IVHSHMEM Library API Overview
-----------------------------
The following is a simple guide to using the IVSHMEM Library API:
* Call rte_ivshmem_metadata_create() to create a new metadata file.
The metadata name is used to distinguish between multiple metadata files.
* Populate each metadata file with Intel® DPDK data structures.
This can be done using the following API calls:
* rte_ivhshmem_metadata_add_memzone() to add rte_memzone to metadata file
* rte_ivshmem_metadata_add_ring() to add rte_ring to metadata file
* rte_ivshmem_metadata_add_mempool() to add rte_mempool to metadata file
* Finally, call rte_ivshmem_metadata_cmdline_generate() to generate the command line for QEMU.
Multiple metadata files (and thus multiple command lines) can be supplied to a single VM.
.. note::
Only data structures fully residing in Intel® DPDK hugepage memory work correctly.
Supported data structures created by malloc(), mmap()
or otherwise using non-Intel® DPDK memory cause undefined behavior and even a segmentation fault.
IVSHMEM Environment Configuration
---------------------------------
The steps needed to successfully run IVSHMEM applications are the following:
* Compile a special version of QEMU from sources.
The source code can be found on the QEMU website (currently, version 1.4.x is supported, but version 1.5.x is known to work also),
however, the source code will need to be patched to support using regular files as the IVSHMEM memory backend.
The patch is not included in the Intel® DPDK package,
but is available on the `Intel®DPDK-vswitch project webpage <https://01.org/packet-processing/intel%C2%AE-ovdk>`_
(either separately or in an Intel® DPDK vSwitch package).
* Enable IVSHMEM library in the Intel® DPDK build configuration.
In the default configuration, IVSHMEM library is not compiled. To compile the IVSHMEM library,
one has to either use one of the provided IVSHMEM targets
(for example, x86_64-ivshmem-linuxapp-gcc),
or set CONFIG_RTE_LIBRTE_IVSHMEM to "y" in the build configuration.
* Set up hugepage memory on the virtual machine.
The guest applications run as regular Intel® DPDK (primary) processes and thus need their own hugepage memory set up inside the VM.
The process is identical to the one described in the *Intel® DPDK Getting Started Guide*.
Best Practices for Writing IVSHMEM Applications
-----------------------------------------------
When considering the use of IVSHMEM for sharing memory, security implications need to be carefully evaluated.
IVSHMEM is not suitable for untrusted guests, as IVSHMEM is essentially a window into the host processs memory.
This also has implications for the multiple VM scenarios.
While the IVSHMEM library tries to share as little memory as possible,
it is quite probable that data designated for one VM might also be present in an IVSMHMEM device designated for another VM.
Consequently, any shared memory corruption will affect both host and all VMs sharing that particular memory.
IVSHMEM applications essentially behave like multi-process applications,
so it is important to implement access serialization to data and thread safety.
Intel® DPDK ring structures are already thread-safe, however,
any custom data structures that the user might need would have to be thread-safe also.
Similar to regular Intel® DPDK multi-process applications,
it is not recommended to use function pointers as functions might have different memory addresses in different processes.
It is best to avoid freeing the rte_mbuf structure on a different machine from where it was allocated,
that is, if the mbuf was allocated on the host, the host should free it.
Consequently, any packet transmission and reception should also happen on the same machine (whether virtual or physical).
Failing to do so may lead to data corruption in the mempool cache.
Despite the IVSHMEM mechanism being zero-copy and having good performance,
it is still desirable to do processing in batches and follow other procedures described in
:ref:`Performance Optimization <Performance_Optimization>`.
Best Practices for Running IVSHMEM Applications
-----------------------------------------------
For performance reasons,
it is best to pin host processes and QEMU processes to different cores so that they do not interfere with each other.
If NUMA support is enabled, it is also desirable to keep host process' hugepage memory and QEMU process on the same NUMA node.
For the best performance across all NUMA nodes, each QUEMU core should be pinned to host CPU core on the appropriate NUMA node.
QEMU's virtual NUMA nodes should also be set up to correspond to physical NUMA nodes.
More on how to set up Intel® DPDK and QEMU NUMA support can be found in *Intel® DPDK Getting Started Guide* and
`QEMU documentation <http://qemu.weilnetz.de/qemu-doc.html>`_ respectively.
A script called cpu_layout.py is provided with the Intel® DPDK package (in the tools directory)
that can be used to identify which CPU cores correspond to which NUMA node.
The QEMU IVSHMEM command line creation should be considered the last step before starting the virtual machine.
Currently, there is no hot plug support for QEMU IVSHMEM devices,
so one cannot add additional memory to an IVSHMEM device once it has been created.
Therefore, the correct sequence to run an IVSHMEM application is to run host application first,
obtain the command lines for each IVSHMEM device and then run all QEMU instances with guest applications afterwards.
It is important to note that once QEMU is started, it holds on to the hugepages it uses for IVSHMEM devices.
As a result, if the user wishes to shut down or restart the IVSHMEM host application,
it is not enough to simply shut the application down.
The virtual machine must also be shut down (if not, it will hold onto outdated host data).
.. |ivshmem| image:: img/ivshmem.png

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kernel NIC Interface
====================
The Intel® DPDK Kernel NIC Interface (KNI) allows userspace applications access to the Linux* control plane.
The benefits of using the Intel® DPDK KNI are:
* Faster than existing Linux TUN/TAP interfaces
(by eliminating system calls and copy_to_user()/copy_from_user() operations.
* Allows management of Intel® DPDK ports using standard Linux net tools such as ethtool, ifconfig and tcpdump.
* Allows an interface with the kernel network stack.
The components of an application using the Intel® DPDK Kernel NIC Interface are shown in Figure 17.
.. _pg_figure_17:
**Figure 17. Components of an Intel® DPDK KNI Application**
.. image43_png has been renamed
|kernel_nic_intf|
The Intel® DPDK KNI Kernel Module
---------------------------------
The KNI kernel loadable module provides support for two types of devices:
* A Miscellaneous device (/dev/kni) that:
* Creates net devices (via ioctl calls).
* Maintains a kernel thread context shared by all KNI instances
(simulating the RX side of the net driver).
* For single kernel thread mode, maintains a kernel thread context shared by all KNI instances
(simulating the RX side of the net driver).
* For multiple kernel thread mode, maintains a kernel thread context for each KNI instance
(simulating the RX side of the new driver).
* Net device:
* Net functionality provided by implementing several operations such as netdev_ops,
header_ops, ethtool_ops that are defined by struct net_device,
including support for Intel® DPDK mbufs and FIFOs.
* The interface name is provided from userspace.
* The MAC address can be the real NIC MAC address or random.
KNI Creation and Deletion
-------------------------
The KNI interfaces are created by an Intel® DPDK application dynamically.
The interface name and FIFO details are provided by the application through an ioctl call
using the rte_kni_device_info struct which contains:
* The interface name.
* Physical addresses of the corresponding memzones for the relevant FIFOs.
* Mbuf mempool details, both physical and virtual (to calculate the offset for mbuf pointers).
* PCI information.
* Core affinity.
Refer to rte_kni_common.h in the Intel® DPDK source code for more details.
The physical addresses will be re-mapped into the kernel address space and stored in separate KNI contexts.
Once KNI interfaces are created, the KNI context information can be queried by calling the rte_kni_info_get() function.
The KNI interfaces can be deleted by an Intel® DPDK application dynamically after being created.
Furthermore, all those KNI interfaces not deleted will be deleted on the release operation
of the miscellaneous device (when the Intel® DPDK application is closed).
Intel® DPDK mbuf Flow
---------------------
To minimize the amount of Intel® DPDK code running in kernel space, the mbuf mempool is managed in userspace only.
The kernel module will be aware of mbufs,
but all mbuf allocation and free operations will be handled by the Intel® DPDK application only.
Figure 18 shows a typical scenario with packets sent in both directions.
.. _pg_figure_18:
**Figure 18. Packet Flow via mbufs in the Intel DPDK® KNI**
.. image44_png has been renamed
|pkt_flow_kni|
Use Case: Ingress
-----------------
On the Intel® DPDK RX side, the mbuf is allocated by the PMD in the RX thread context.
This thread will enqueue the mbuf in the rx_q FIFO.
The KNI thread will poll all KNI active devices for the rx_q.
If an mbuf is dequeued, it will be converted to a sk_buff and sent to the net stack via netif_rx().
The dequeued mbuf must be freed, so the same pointer is sent back in the free_q FIFO.
The RX thread, in the same main loop, polls this FIFO and frees the mbuf after dequeuing it.
Use Case: Egress
----------------
For packet egress the Intel® DPDK application must first enqueue several mbufs to create an mbuf cache on the kernel side.
The packet is received from the Linux net stack, by calling the kni_net_tx() callback.
The mbuf is dequeued (without waiting due the cache) and filled with data from sk_buff.
The sk_buff is then freed and the mbuf sent in the tx_q FIFO.
The Intel® DPDK TX thread dequeues the mbuf and sends it to the PMD (via rte_eth_tx_burst()).
It then puts the mbuf back in the cache.
Ethtool
-------
Ethtool is a Linux-specific tool with corresponding support in the kernel
where each net device must register its own callbacks for the supported operations.
The current implementation uses the igb/ixgbe modified Linux drivers for ethtool support.
Ethtool is not supported in i40e and VMs (VF or EM devices).
Link state and MTU change
-------------------------
Link state and MTU change are network interface specific operations usually done via ifconfig.
The request is initiated from the kernel side (in the context of the ifconfig process)
and handled by the user space Intel® DPDK application.
The application polls the request, calls the application handler and returns the response back into the kernel space.
The application handlers can be registered upon interface creation or explicitly registered/unregistered in runtime.
This provides flexibility in multiprocess scenarios
(where the KNI is created in the primary process but the callbacks are handled in the secondary one).
The constraint is that a single process can register and handle the requests.
KNI Working as a Kernel vHost Backend
-------------------------------------
vHost is a kernel module usually working as the backend of virtio (a para- virtualization driver framework)
to accelerate the traffic from the guest to the host.
The Intel® DPDK Kernel NIC interface provides the ability to hookup vHost traffic into userspace Intel® DPDK application.
Together with the Intel® DPDK PMD virtio, it significantly improves the throughput between guest and host.
In the scenario where Intel® DPDK is running as fast path in the host, kni-vhost is an efficient path for the traffic.
Overview
~~~~~~~~
vHost-net has three kinds of real backend implementations. They are: 1) tap, 2) macvtap and 3) RAW socket.
The main idea behind kni-vhost is making the KNI work as a RAW socket, attaching it as the backend instance of vHost-net.
It is using the existing interface with vHost-net, so it does not require any kernel hacking,
and is fully-compatible with the kernel vhost module.
As vHost is still taking responsibility for communicating with the front-end virtio,
it naturally supports both legacy virtio -net and the Intel® DPDK PMD virtio.
There is a little penalty that comes from the non-polling mode of vhost.
However, it scales throughput well when using KNI in multi-thread mode.
.. _pg_figure_19:
**Figure 19. vHost-net Architecture Overview**
.. image45_png has been renamed
|vhost_net_arch|
Packet Flow
~~~~~~~~~~~
There is only a minor difference from the original KNI traffic flows.
On transmit side, vhost kthread calls the RAW socket's ops sendmsg and it puts the packets into the KNI transmit FIFO.
On the receive side, the kni kthread gets packets from the KNI receive FIFO, puts them into the queue of the raw socket,
and wakes up the task in vhost kthread to begin receiving.
All the packet copying, irrespective of whether it is on the transmit or receive side,
happens in the context of vhost kthread.
Every vhost-net device is exposed to a front end virtio device in the guest.
.. _pg_figure_20:
**Figure 20. KNI Traffic Flow**
.. image46_png has been renamed
|kni_traffic_flow|
Sample Usage
~~~~~~~~~~~~
Before starting to use KNI as the backend of vhost, the CONFIG_RTE_KNI_VHOST configuration option must be turned on.
Otherwise, by default, KNI will not enable its backend support capability.
Of course, as a prerequisite, the vhost/vhost-net kernel CONFIG should be chosen before compiling the kernel.
#. Compile the Intel® DPDK and insert igb_uio as normal.
#. Insert the KNI kernel module:
.. code-block:: console
insmod ./rte_kni.ko
If using KNI in multi-thread mode, use the following command line:
.. code-block:: console
insmod ./rte_kni.ko kthread_mode=multiple
#. Running the KNI sample application:
.. code-block:: console
./kni -c -0xf0 -n 4 -- -p 0x3 -P -config="(0,4,6),(1,5,7)"
This command runs the kni sample application with two physical ports.
Each port pins two forwarding cores (ingress/egress) in user space.
#. Assign a raw socket to vhost-net during qemu-kvm startup.
The Intel® DPDK does not provide a script to do this since it is easy for the user to customize.
The following shows the key steps to launch qemu-kvm with kni-vhost:
.. code-block:: bash
#!/bin/bash
echo 1 > /sys/class/net/vEth0/sock_en
fd=`cat /sys/class/net/vEth0/sock_fd`
qemu-kvm \
-name vm1 -cpu host -m 2048 -smp 1 -hda /opt/vm-fc16.img \
-netdev tap,fd=$fd,id=hostnet1,vhost=on \
-device virti-net-pci,netdev=hostnet1,id=net1,bus=pci.0,addr=0x4
It is simple to enable raw socket using sysfs sock_en and get raw socket fd using sock_fd under the KNI device node.
Then, using the qemu-kvm command with the -netdev option to assign such raw socket fd as vhost's backend.
.. note::
The key word tap must exist as qemu-kvm now only supports vhost with a tap beckend, so here we cheat qemu-kvm by an existing fd.
Compatibility Configure Option
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
There is a CONFIG_RTE_KNI_VHOST_VNET_HDR_EN configuration option in Intel® DPDK configuration file.
By default, it set to n, which means do not turn on the virtio net header,
which is used to support additional features (such as, csum offload, vlan offload, generic-segmentation and so on),
since the kni-vhost does not yet support those features.
Even if the option is turned on, kni-vhost will ignore the information that the header contains.
When working with legacy virtio on the guest, it is better to turn off unsupported offload features using ethtool -K.
Otherwise, there may be problems such as an incorrect L4 checksum error.
.. |kni_traffic_flow| image:: img/kni_traffic_flow.png
.. |vhost_net_arch| image:: img/vhost_net_arch.png
.. |pkt_flow_kni| image:: img/pkt_flow_kni.png
.. |kernel_nic_intf| image:: img/kernel_nic_intf.png

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Libpcap and Ring Based Poll Mode Drivers
========================================
In addition to Poll Mode Drivers (PMDs) for physical and virtual hardware,
the Intel® DPDK also includes two pure-software PMDs. These two drivers are:
* A libpcap -based PMD (librte_pmd_pcap) that reads and writes packets using libpcap,
- both from files on disk, as well as from physical NIC devices using standard Linux kernel drivers.
* A ring-based PMD (librte_pmd_ring) that allows a set of software FIFOs (that is, rte_ring)
to be accessed using the PMD APIs, as though they were physical NICs.
.. note::
The libpcap -based PMD is disabled by default in the build configuration files,
owing to an external dependency on the libpcap development files which must be installed on the board.
Once the libpcap development files are installed,
the library can be enabled by setting CONFIG_RTE_LIBRTE_PMD_PCAP=y and recompiling the Intel® DPDK.
Using the Drivers from the EAL Command Line
-------------------------------------------
For ease of use, the Intel® DPDK EAL also has been extended to allow pseudo-ethernet devices,
using one or more of these drivers,
to be created at application startup time during EAL initialization.
To do so, the --vdev= parameter must be passed to the EAL.
This takes take options to allow ring and pcap-based Ethernet to be allocated and used transparently by the application.
This can be used, for example, for testing on a virtual machine where there are no Ethernet ports.
Libpcap-based PMD
~~~~~~~~~~~~~~~~~
Pcap-based devices can be created using the virtual device --vdev option.
The device name must start with the eth_pcap prefix followed by numbers or letters.
The name is unique for each device. Each device can have multiple stream options and multiple devices can be used.
Multiple device definitions can be arranged using multiple --vdev.
Device name and stream options must be separated by commas as shown below:
.. code-block:: console
$RTE_TARGET/app/testpmd -c f -n 4 --vdev 'eth_pcap0,stream_opt0=..,stream_opt1=..' --vdev='eth_pcap1,stream_opt0=..'
Device Streams
^^^^^^^^^^^^^^
Multiple ways of stream definitions can be assessed and combined as long as the following two rules are respected:
* A device is provided with two different streams - reception and transmission.
* A device is provided with one network interface name used for reading and writing packets.
The different stream types are:
* rx_pcap: Defines a reception stream based on a pcap file.
The driver reads each packet within the given pcap file as if it was receiving it from the wire.
The value is a path to a valid pcap file.
rx_pcap=/path/to/file.pcap
* tx_pcap: Defines a transmission stream based on a pcap file.
The driver writes each received packet to the given pcap file.
The value is a path to a pcap file.
The file is overwritten if it already exists and it is created if it does not.
tx_pcap=/path/to/file.pcap
* rx_iface: Defines a reception stream based on a network interface name.
The driver reads packets coming from the given interface using the Linux kernel driver for that interface.
The value is an interface name.
rx_iface=eth0
* tx_iface: Defines a transmission stream based on a network interface name.
The driver sends packets to the given interface using the Linux kernel driver for that interface.
The value is an interface name.
tx_iface=eth0
* iface: Defines a device mapping a network interface.
The driver both reads and writes packets from and to the given interface.
The value is an interface name.
iface=eth0
Examples of Usage
^^^^^^^^^^^^^^^^^
Read packets from one pcap file and write them to another:
.. code-block:: console
$RTE_TARGET/app/testpmd -c '0xf' -n 4 --vdev 'eth_pcap0,rx_pcap=/path/to/ file_rx.pcap,tx_pcap=/path/to/file_tx.pcap' -- --port-topology=chained
Read packets from a network interface and write them to a pcap file:
.. code-block:: console
$RTE_TARGET/app/testpmd -c '0xf' -n 4 --vdev 'eth_pcap0,rx_iface=eth0,tx_pcap=/path/to/file_tx.pcap' -- --port-topology=chained
Read packets from a pcap file and write them to a network interface:
.. code-block:: console
$RTE_TARGET/app/testpmd -c '0xf' -n 4 --vdev 'eth_pcap0,rx_pcap=/path/to/ file_rx.pcap,tx_iface=eth1' -- --port-topology=chained
Forward packets through two network interfaces:
.. code-block:: console
$RTE_TARGET/app/testpmd -c '0xf' -n 4 --vdev 'eth_pcap0,iface=eth0' --vdev='eth_pcap1;iface=eth1'
Using libpcap-based PMD with the testpmd Application
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
One of the first things that testpmd does before starting to forward packets is to flush the RX streams
by reading the first 512 packets on every RX stream and discarding them.
When using a libpcap-based PMD this behavior can be turned off using the following command line option:
.. code-block:: console
--no-flush-rx
It is also available in the runtime command line:
.. code-block:: console
set flush_rx on/off
It is useful for the case where the rx_pcap is being used and no packets are meant to be discarded.
Otherwise, the first 512 packets from the input pcap file will be discarded by the RX flushing operation.
.. code-block:: console
$RTE_TARGET/app/testpmd -c '0xf' -n 4 --vdev 'eth_pcap0,rx_pcap=/path/to/ file_rx.pcap,tx_pcap=/path/to/file_tx.pcap' -- --port-topology=chained --no-flush-rx
Rings-based PMD
~~~~~~~~~~~~~~~
To run an Intel® DPDK application on a machine without any Ethernet devices, a pair of ring-based rte_ethdevs can be used as below.
The device names passed to the --vdev option must start with eth_ring and take no additional parameters.
Multiple devices may be specified, separated by commas.
.. code-block:: console
./testpmd -c E -n 4 --vdev=eth_ring0 --vdev=eth_ring1 -- -i
EAL: Detected lcore 1 as core 1 on socket 0
...
Interactive-mode selected
Configuring Port 0 (socket 0)
Configuring Port 1 (socket 0)
Checking link statuses...
Port 0 Link Up - speed 10000 Mbps - full-duplex
Port 1 Link Up - speed 10000 Mbps - full-duplex
Done
testpmd> start tx_first
io packet forwarding - CRC stripping disabled - packets/burst=16
nb forwarding cores=1 - nb forwarding ports=2
RX queues=1 - RX desc=128 - RX free threshold=0
RX threshold registers: pthresh=8 hthresh=8 wthresh=4
TX queues=1 - TX desc=512 - TX free threshold=0
TX threshold registers: pthresh=36 hthresh=0 wthresh=0
TX RS bit threshold=0 - TXQ flags=0x0
testpmd> stop
Telling cores to stop...
Waiting for lcores to finish...
.. image38_png has been renamed
|forward_stats|
.. code-block:: console
+++++++++++++++ Accumulated forward statistics for allports++++++++++
RX-packets: 462384736 RX-dropped: 0 RX-total: 462384736
TX-packets: 462384768 TX-dropped: 0 TX-total: 462384768
+++++++++++++++++++++++++++++++++++++++++++++++++++++
Done.
Using the Poll Mode Driver from an Application
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Both drivers can provide similar APIs to allow the user to create a PMD, that is,
rte_ethdev structure, instances at run-time in the end-application,
for example, using rte_eth_from_rings() or rte_eth_from_pcaps() APIs.
For the rings- based PMD, this functionality could be used, for example,
to allow data exchange between cores using rings to be done in exactly the
same way as sending or receiving packets from an Ethernet device.
For the libpcap-based PMD, it allows an application to open one or more pcap files
and use these as a source of packet input to the application.
Usage Examples
^^^^^^^^^^^^^^
To create two pseudo-ethernet ports where all traffic sent to a port is looped back
for reception on the same port (error handling omitted for clarity):
.. code-block:: c
struct rte_ring *r1, *r2;
int port1, port2;
r1 = rte_ring_create("R1", 256, SOCKET0,RING_F_SP_ENQ|RING_F_SC_DEQ);
r2 = rte_ring_create("R2", 256, SOCKET0, RING_F_SP_ENQ|RING_F_SC_DEQ);
/* create an ethdev where RX and TX are done to/from r1, and * another from r2 */
port1 = rte_eth_from_rings(r1, 1, r1, 1, SOCKET0);
port2 = rte_eth_from_rings(r2, 1, r2, 1, SOCKET0);
To create two pseudo-Ethernet ports where the traffic is switched between them,
that is, traffic sent to port 1 is read back from port 2 and vice-versa,
the final two lines could be changed as below:
.. code-block:: c
port1 = rte_eth_from_rings(r1, 1, r2, 1, SOCKET0);
port2 = rte_eth_from_rings(r2, 1, r1, 1, SOCKET0);
This type of configuration could be useful in a pipeline model, for example,
where one may want to have inter-core communication using pseudo Ethernet devices rather than raw rings,
for reasons of API consistency.
Enqueuing and dequeuing items from an rte_ring using the rings-based PMD may be slower than using the native rings API.
This is because Intel® DPDK Ethernet drivers make use of function pointers to call the appropriate enqueue or dequeue functions,
while the rte_ring specific functions are direct function calls in the code and are often inlined by the compiler.
Once an ethdev has been created, for either a ring or a pcap-based PMD,
it should be configured and started in the same way as a regular Ethernet device, that is,
by calling rte_eth_dev_configure() to set the number of receive and transmit queues,
then calling rte_eth_rx_queue_setup() / tx_queue_setup() for each of those queues and
finally calling rte_eth_dev_start() to allow transmission and reception of packets to begin.
.. |forward_stats| image:: img/forward_stats.png

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Link Bonding Poll Mode Driver Library
=====================================
In addition to Poll Mode Drivers (PMDs) for physical and virtual hardware,
Intel® DPDK also includes a pure-software library that
allows physical PMD's to be bonded together to create a single logical PMD.
|link_bonding|
The Link Bonding PMD library(librte_pmd_bond) supports bonding of groups of physical ports of the same speed (1GbE, 10GbE and 40GbE) and
duplex to provide similar the capabilities to that found in Linux bonding driver to allow the aggregation of multiple (slave) NICs
into a single logical interface between a server and a switch.
The new bonded PMD will then process these interfaces based on the mode of operation specified to provide support for features
such as redundant links, fault tolerance and/or load balancing.
The librte_pmd_bond library exports a C API which provides an API for the creation of bonded devices
as well as the configuration and management of the bonded device and its slave devices.
.. note::
The Link Bonding PMD Library is enabled by default in the build configuration files,
the library can be disabled by setting CONFIG_RTE_LIBRTE_PMD_BOND=n and recompiling the Intel® DPDK.
Link Bonding Modes Overview
---------------------------
Currently the Link Bonding PMD library supports 4 modes of operation:
* **Round-Robin (Mode 0):**
This mode provides load balancing and fault tolerance by transmission of packets
in sequential order from the first available slave device through the last.
Packets are bulk dequeued from devices then serviced in round-robin manner.
* **Active Backup (Mode 1):**
In this mode only one slave in the bond is active at any time, a different slave becomes active if,
and only if, the primary active slave fails,
thereby providing fault tolerance to slave failure.
The single logical bonded interface's MAC address is externally visible on only one NIC (port)
to avoid confusing the network switch.
* **Balance XOR (Mode 2):**
This mode provides load balancing based on transmit packets based on the selected XOR transmission policy and fault tolerance.
The default policy (layer2) uses a simple XOR calculation on the packet source / destination MAC address to select the slave to transmit on.
Alternate transmission policies supported are layer 2+3, this uses the IP source and destination addresses in the calculation of the slave port and
the final supported policy is layer 3+4, this uses IP source and destination addresses as well as the UDP source and destination port.
* **Broadcast (Mode 3):**
This mode provides fault tolerance by transmission of packets on all slave ports.
Implementation Details
----------------------
The librte_pmd_bond onded device are compatible with the Ethernet device API exported by the Ethernet PMDs described in the *Intel® DPDK API Reference*.
The Link Bonding Library supports the creation of bonded devices at application startup time during EAL initialization using the
--vdev option as well as programmatically via the C API rte_eth_bond_create function.
Bonded devices support the dynamical addition and removal of slave devices using
the rte_eth_bond_slave_add / rte_eth_bond_slave_remove APIs.
After a slave device is added to a bonded device slave is stopped using
rte_eth_dev_stop and the slave reconfigured using rte_eth_dev_configure the RX and TX queues are also reconfigured
using rte_eth_tx_queue_setup / rte_eth_rx_queue_setup with the parameters use to configure the bonding device.
Requirements / Limitations
~~~~~~~~~~~~~~~~~~~~~~~~~~
The current implementation only supports physical devices of the same type, speed and duplex to be added as slaves.
The bonded device inherits these values from the first active slave added to the bonded device
and then all further slaves added to the bonded device must match these parameters.
A bonding device must have a minimum of one slave before the bonding device itself can be started.
Like all other PMD, all functions exported by a PMD are lock-free functions that are assumed
not to be invoked in parallel on different logical cores to work on the same target object.
It should also be noted that the PMD receive function should not be invoked directly on a slave devices after they have
been to a bonded device since packets read directly from the slave device will no longer be available to the bonded device to read.
Configuration
~~~~~~~~~~~~~
Link bonding devices are created using the rte_eth_bond_create API
which requires a unique device name, the bonding mode,
and the socket Id to allocate the bonding device's resources on.
The other configurable parameters for a bonded device are its slave devices, its primary slave,
a user defined MAC address and transmission policy to use if the device is balance XOR mode.
Slave Devices
^^^^^^^^^^^^^
Bonding devices support up to a maximum of RTE_MAX_ETHPORTS slave devices of the same speed and duplex.
Ethernet devices can be added as a slave to a maximum of one bonded device.
Slave devices are reconfigured with the configuration of the bonded device on being added to a bonded device.
The bonded also guarantees to return the MAC address of the slave device to its original value of removal of a slave from it.
Primary Slave
^^^^^^^^^^^^^
The primary slave is used to define the default port to use when a bonded device is in active backup mode.
A different port will only be used if, and only if, the current primary port goes down.
If the user does not specify a primary port it will default to being the first port added to the bonded device.
MAC Address
^^^^^^^^^^^
The bonded device can be configured with a user specified MAC address,
this address will be inherited by the some/all slave devices depending on the operating mode.
If the device is in active backup mode then only the primary device will have the user specified MAC,
all other slaves will retain their original MAC address.
In mode 0, 2, and 3 all slaves devices are configure with the bonded devices MAC address.
If a user defined MAC address is not defined then the bonded device will default to using the primary slaves MAC address.
Balance XOR Transmit Policies
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
There are 3 supported transmission policies for bonded device running in Balance XOR mode. Layer 2, Layer 2+3, Layer 3+4.
* **Layer 2:** Ethernet MAC address based balancing is the default transmission policy for Balance XOR bonding mode.
It uses a simple XOR calculation on the source MAC address and destination MAC address of the packet and
then calculate the modulus of this value to calculate the slave device to transmit the packet on.
* **Layer 2 + 3:** Ethernet MAC address & IP Address based balancing uses a combination of source/destination MAC addresses and
the source/destination IP addresses of the data packet to decide which slave port the packet will be transmitted on.
* **Layer 3 + 4:** IP Address & UDP Port based balancing uses a combination of source/destination IP Address and
the source/destination UDP ports of the packet of the data packet to decide which slave port the packet will be transmitted on.
All these policies support 802.1Q VLAN Ethernet packets, as well as IPv4, IPv6 and UDP protocols for load balancing.
Using Link Bonding Devices
--------------------------
The librte_pmd_bond library support two modes of device creation, the libraries export full C API or
using the EAL command line to statically configure link bonding devices at application startup.
Using the EAL option it is possible to use link bonding functionality transparently without specific knowledge of the libraries API,
this can be used, for example, to add bonding functionality, such as active backup,
to an existing application which has no knowledge of the link bonding C API.
Using the Poll Mode Driver from an Application
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Using the librte_pmd_bond libraries API it is possible to dynamicall create and manage link bonding device from within any application.
Link bonding device are created using the rte_eth_bond_create API which requires a unqiue device name,
the link bonding mode to initial the device in and finally the socket Id which to allocate the devices resources onto.
After successful creation of a bonding device it must be configured using the generic Ethernet device configure API rte_eth_dev_configure
and then the RX and TX queues which will be used must be setup using rte_eth_tx_queue_setup / rte_eth_rx_queue_setup.
Slave devices can be dynamically added and removed from a link bonding device using the rte_eth_bond_slave_add / rte_eth_bond_slave_remove
APIs but at least one slave device must be added to the link bonding device before it can be started using rte_eth_dev_start.
The link status of a bonded device is dictated by that of its slaves, if all slave device link status are down or
if all slaves are removed from the link bonding device then the link status of the bonding device will go down.
It is also possible to configure / query the configuration of the control parameters of a bonded device using the provided APIs
rte_eth_bond_mode_set/get, rte_eth_bond_primary_set/get, rte_eth_bond_mac_set/reset and rte_eth_bond_xmit_policy_set/get.
Using Link Bonding Devices from the EAL Command Line
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Link bonding devices can be created at application startup time using the --vdev EAL command line option.
The device name must start with the eth_bond prefix followed by numbers or letters. The name must be unique for each device.
Each device can have multiple options arranged in a comma separated list.
Multiple devices definitions can be arranged by calling the --vdev option multiple times.
Device names and bonding options must be separated by commas as shown below:
.. code-block:: console
$RTE_TARGET/app/testpmd -c f -n 4 --vdev 'eth_bond0,bond_opt0=..,bond opt1=..'--vdev 'eth_bond1,bond _opt0=..,bond_opt1=..'
Link Bonding EAL Options
^^^^^^^^^^^^^^^^^^^^^^^^
There are multiple ways of definitions that can be assessed and combined as long as the following two rules are respected:
* A unique device name, in the format of eth_bondX is provided,
where X can be any combination of numbers and/or letters,
and the name is no greater than 32 characters long.
* A least one slave device is provided with for each bonded device definition.
* The operation mode of the bonded device being created is provided.
The different options are:
* mode: Integer value defining the bonding mode of the device.
Currently supports modes 0,1,2,3 (round-robin, active backup, balance, and broadcast).
mode=2
* slave: Defines the PMD device which will be added as slave to the bonded device.
This option can be selected multiple time, for each device to be added as a slave.
Physical devices should be specified using their PCI address, in the format domain:bus:devid.function
slave=0000:0a:00.0,slave=0000:0a:00.1
* primary: Optional parameter which defines the primary slave port,
is used in active backup mode to select the primary slave for data TX/RX if it is available.
The primary port also is used to select the MAC address to use when it is not defined by the user.
This defaults to the first slave added to the device if it is specified.
The primary device must be a slave of the bonded device.
primary=0000:0a:00.0
* socket_id: Optional parameter used to select which socket on a NUMA device the bonded devices resources will be allocated on.
socket_id=0
* mac: Optional parameter to select a MAC address for link bonding device, this overrides the value of the primary slave device.
mac=00:1e:67:1d:fd:1d
* xmit_policy: Optional parameter which defines the transmission policy when the bonded device is in balance mode.
If not user specified this defaults to l2 (layer 2) forwarding,
the other transmission policies available are l23 (layer 2+3) and l34 (layer 3+4)
xmit_policy=l2
Examples of Usage
^^^^^^^^^^^^^^^^^
Create a bonded device in round robin mode with two slaves specified by their PCI address:
.. code-block:: console
$RTE_TARGET/app/testpmd -c '0xf' -n 4 --vdev 'eth_bond0,mode=0, slave=0000:00a:00.01,slave=0000:004:00.00' -- --port-topology=chained
Create a bonded device in round robin mode with two slaves specified by their PCI address and an overriding MAC address:
.. code-block:: console
$RTE_TARGET/app/testpmd -c '0xf' -n 4 --vdev 'eth_bond0,mode=0, slave=0000:00a:00.01,slave=0000:004:00.00,mac=00:1e:67:1d:fd:1d' -- --port-topology=chained
Create a bonded device in active backup mode with two slaves specified, and a primary slave specified by their PCI addresses:
.. code-block:: console
$RTE_TARGET/app/testpmd -c '0xf' -n 4 --vdev 'eth_bond0,mode=1, slave=0000:00a:00.01,slave=0000:004:00.00,primary=0000:00a:00.01' -- --port-topology=chained
Create a bonded device in balance mode with two slaves specified by their PCI addresses, and a transmission policy of layer 3 + 4 forwarding:
.. code-block:: console
$RTE_TARGET/app/testpmd -c '0xf' -n 4 --vdev 'eth_bond0,mode=2, slave=0000:00a:00.01,slave=0000:004:00.00,xmit_policy=l34' -- --port-topology=chained
.. |link_bonding| image:: img/link_bonding.png

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
LPM6 Library
============
The LPM6 (LPM for IPv6) library component implements the Longest Prefix Match (LPM) table search method for 128-bit keys
that is typically used to find the best match route in IPv6 forwarding applications.
LPM6 API Overview
-----------------
The main configuration parameters for the LPM6 library are:
* Maximum number of rules: This defines the size of the table that holds the rules,
and therefore the maximum number of rules that can be added.
* Number of tbl8s: A tbl8 is a node of the trie that the LPM6 algorithm is based on.
This parameter is related to the number of rules you can have,
but there is no way to accurately predict the number needed to hold a specific number of rules,
since it strongly depends on the depth and IP address of every rule.
One tbl8 consumes 1 kb of memory. As a recommendation, 65536 tbl8s should be sufficient to store
several thousand IPv6 rules, but the number can vary depending on the case.
An LPM prefix is represented by a pair of parameters (128-bit key, depth), with depth in the range of 1 to 128.
An LPM rule is represented by an LPM prefix and some user data associated with the prefix.
The prefix serves as the unique identifier for the LPM rule.
In this implementation, the user data is 1-byte long and is called "next hop",
which corresponds to its main use of storing the ID of the next hop in a routing table entry.
The main methods exported for the LPM component are:
* Add LPM rule: The LPM rule is provided as input.
If there is no rule with the same prefix present in the table, then the new rule is added to the LPM table.
If a rule with the same prefix is already present in the table, the next hop of the rule is updated.
An error is returned when there is no available space left.
* Delete LPM rule: The prefix of the LPM rule is provided as input.
If a rule with the specified prefix is present in the LPM table, then it is removed.
* Lookup LPM key: The 128-bit key is provided as input.
The algorithm selects the rule that represents the best match for the given key and returns the next hop of that rule.
In the case that there are multiple rules present in the LPM table that have the same 128-bit value,
the algorithm picks the rule with the highest depth as the best match rule,
which means the rule has the highest number of most significant bits matching between the input key and the rule key.
Implementation Details
~~~~~~~~~~~~~~~~~~~~~~
This is a modification of the algorithm used for IPv4 (see Section 19.2 "Implementation Details").
In this case, instead of using two levels, one with a tbl24 and a second with a tbl8, 14 levels are used.
The implementation can be seen as a multi-bit trie where the *stride*
or number of bits inspected on each level varies from level to level.
Specifically, 24 bits are inspected on the root node, and the remaining 104 bits are inspected in groups of 8 bits.
This effectively means that the trie has 14 levels at the most, depending on the rules that are added to the table.
The algorithm allows the lookup operation to be performed with a number of memory accesses
that directly depends on the length of the rule and
whether there are other rules with bigger depths and the same key in the data structure.
It can vary from 1 to 14 memory accesses, with 5 being the average value for the lengths
that are most commonly used in IPv6.
The main data structure is built using the following elements:
* A table with 224 entries
* A number of tables, configurable by the user through the API, with 28 entries
The first table, called tbl24, is indexed using the first 24 bits of the IP address be looked up,
while the rest of the tables, called tbl8s,
are indexed using the rest of the bytes of the IP address, in chunks of 8 bits.
This means that depending on the outcome of trying to match the IP address of an incoming packet to the rule stored in the tbl24
or the subsequent tbl8s we might need to continue the lookup process in deeper levels of the tree.
Similar to the limitation presented in the algorithm for IPv4,
to store every possible IPv6 rule, we would need a table with 2^128 entries.
This is not feasible due to resource restrictions.
By splitting the process in different tables/levels and limiting the number of tbl8s,
we can greatly reduce memory consumption while maintaining a very good lookup speed (one memory access per level).
.. image40_png has been renamed
|tbl24_tbl8_tbl8|
An entry in a table contains the following fields:
* next hop / index to the tbl8
* depth of the rule (length)
* valid flag
* valid group flag
* external entry flag
The first field can either contain a number indicating the tbl8 in which the lookup process should continue
or the next hop itself if the longest prefix match has already been found.
The depth or length of the rule is the number of bits of the rule that is stored in a specific entry.
The flags are used to determine whether the entry/table is valid or not
and whether the search process have finished or not respectively.
Both types of tables share the same structure.
The other main data structure is a table containing the main information about the rules (IP, next hop and depth).
This is a higher level table, used for different things:
* Check whether a rule already exists or not, prior to addition or deletion,
without having to actually perform a lookup.
When deleting, to check whether there is a rule containing the one that is to be deleted.
This is important, since the main data structure will have to be updated accordingly.
Addition
~~~~~~~~
When adding a rule, there are different possibilities.
If the rule's depth is exactly 24 bits, then:
* Use the rule (IP address) as an index to the tbl24.
* If the entry is invalid (i.e. it doesn't already contain a rule) then set its next hop to its value,
the valid flag to 1 (meaning this entry is in use),
and the external entry flag to 0 (meaning the lookup process ends at this point,
since this is the longest prefix that matches).
If the rule's depth is bigger than 24 bits but a multiple of 8, then:
* Use the first 24 bits of the rule as an index to the tbl24.
* If the entry is invalid (i.e. it doesn't already contain a rule) then look for a free tbl8,
set the index to the tbl8 to this value,
the valid flag to 1 (meaning this entry is in use),
and the external entry flag to 1
(meaning the lookup process must continue since the rule hasn't been explored completely).
* Use the following 8 bits of the rule as an index to the next tbl8.
* Repeat the process until the tbl8 at the right level (depending on the depth) has been reached
and fill it with the next hop, setting the next entry flag to 0.
If the rule's depth is any other value, prefix expansion must be performed.
This means the rule is copied to all the entries (as long as they are not in use) which would also cause a match.
As a simple example, let's assume the depth is 20 bits.
This means that there are 2^(24-20) = 16 different combinations of the first 24 bits of an IP address that would cause a match.
Hence, in this case, we copy the exact same entry to every position indexed by one of these combinations.
By doing this we ensure that during the lookup process, if a rule matching the IP address exists,
it is found in, at the most, 14 memory accesses,
depending on how many times we need to move to the next table.
Prefix expansion is one of the keys of this algorithm, since it improves the speed dramatically by adding redundancy.
Prefix expansion can be performed at any level.
So, for example, is the depth is 34 bits, it will be performed in the third level (second tbl8-based level).
Lookup
~~~~~~
The lookup process is much simpler and quicker. In this case:
* Use the first 24 bits of the IP address as an index to the tbl24.
If the entry is not in use, then it means we don't have a rule matching this IP.
If it is valid and the external entry flag is set to 0, then the next hop is returned.
* If it is valid and the external entry flag is set to 1, then we use the tbl8 index to find out the tbl8 to be checked,
and the next 8 bits of the IP address as an index to this table.
Similarly, if the entry is not in use, then we don't have a rule matching this IP address.
If it is valid then check the external entry flag for a new tbl8 to be inspected.
* Repeat the process until either we find an invalid entry (lookup miss) or a valid entry with the external entry flag set to 0.
Return the next hop in the latter case.
Limitations in the Number of Rules
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
There are different things that limit the number of rules that can be added.
The first one is the maximum number of rules, which is a parameter passed through the API.
Once this number is reached, it is not possible to add any more rules to the routing table unless one or more are removed.
The second limitation is in the number of tbl8s available.
If we exhaust tbl8s, we won't be able to add any more rules.
How to know how many of them are necessary for a specific routing table is hard to determine in advance.
In this algorithm, the maximum number of tbl8s a single rule can consume is 13,
which is the number of levels minus one, since the first three bytes are resolved in the tbl24. However:
* Typically, on IPv6, routes are not longer than 48 bits, which means rules usually take up to 3 tbl8s.
As explained in the LPM for IPv4 algorithm, it is possible and very likely that several rules will share one or more tbl8s,
depending on what their first bytes are.
If they share the same first 24 bits, for instance, the tbl8 at the second level will be shared.
This might happen again in deeper levels, so, effectively,
two 48 bit-long rules may use the same three tbl8s if the only difference is in their last byte.
The number of tbl8s is a parameter exposed to the user through the API in this version of the algorithm,
due to its impact in memory consumption and the number or rules that can be added to the LPM table.
One tbl8 consumes 1 kilobyte of memory.
Use Case: IPv6 Forwarding
-------------------------
The LPM algorithm is used to implement the Classless Inter-Domain Routing (CIDR) strategy used by routers implementing IP forwarding.
.. |tbl24_tbl8_tbl8| image:: img/tbl24_tbl8_tbl8.png

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.. _LPM_Library:
LPM Library
===========
The Intel® DPDK LPM library component implements the Longest Prefix Match (LPM) table search method for 32-bit keys
that is typically used to find the best route match in IP forwarding applications.
LPM API Overview
----------------
The main configuration parameter for LPM component instances is the maximum number of rules to support.
An LPM prefix is represented by a pair of parameters (32- bit key, depth), with depth in the range of 1 to 32.
An LPM rule is represented by an LPM prefix and some user data associated with the prefix.
The prefix serves as the unique identifier of the LPM rule.
In this implementation, the user data is 1-byte long and is called next hop,
in correlation with its main use of storing the ID of the next hop in a routing table entry.
The main methods exported by the LPM component are:
* Add LPM rule: The LPM rule is provided as input.
If there is no rule with the same prefix present in the table, then the new rule is added to the LPM table.
If a rule with the same prefix is already present in the table, the next hop of the rule is updated.
An error is returned when there is no available rule space left.
* Delete LPM rule: The prefix of the LPM rule is provided as input.
If a rule with the specified prefix is present in the LPM table, then it is removed.
* Lookup LPM key: The 32-bit key is provided as input.
The algorithm selects the rule that represents the best match for the given key and returns the next hop of that rule.
In the case that there are multiple rules present in the LPM table that have the same 32-bit key,
the algorithm picks the rule with the highest depth as the best match rule,
which means that the rule has the highest number of most significant bits matching between the input key and the rule key.
Implementation Details
----------------------
The current implementation uses a variation of the DIR-24-8 algorithm that trades memory usage for improved LPM lookup speed.
The algorithm allows the lookup operation to be performed with typically a single memory read access.
In the statistically rare case when the best match rule is having a depth bigger than 24,
the lookup operation requires two memory read accesses.
Therefore, the performance of the LPM lookup operation is greatly influenced by
whether the specific memory location is present in the processor cache or not.
The main data structure is built using the following elements:
* A table with 2^24 entries.
* A number of tables (RTE_LPM_TBL8_NUM_GROUPS) with 2^8 entries.
The first table, called tbl24, is indexed using the first 24 bits of the IP address to be looked up,
while the second table(s), called tbl8, is indexed using the last 8 bits of the IP address.
This means that depending on the outcome of trying to match the IP address of an incoming packet to the rule stored in the tbl24
we might need to continue the lookup process in the second level.
Since every entry of the tbl24 can potentially point to a tbl8, ideally, we would have 2^24 tbl8s,
which would be the same as having a single table with 2^32 entries.
This is not feasible due to resource restrictions.
Instead, this approach takes advantage of the fact that rules longer than 24 bits are very rare.
By splitting the process in two different tables/levels and limiting the number of tbl8s,
we can greatly reduce memory consumption while maintaining a very good lookup speed (one memory access, most of the times).
.. image39 has been renamed
|tbl24_tbl8|
An entry in tbl24 contains the following fields:
* next hop / index to the tbl8
* valid flag
* external entry flag
* depth of the rule (length)
The first field can either contain a number indicating the tbl8 in which the lookup process should continue
or the next hop itself if the longest prefix match has already been found.
The two flags are used to determine whether the entry is valid or not and
whether the search process have finished or not respectively.
The depth or length of the rule is the number of bits of the rule that is stored in a specific entry.
An entry in a tbl8 contains the following fields:
* next hop
* valid
* valid group
* depth
Next hop and depth contain the same information as in the tbl24.
The two flags show whether the entry and the table are valid respectively.
The other main data structure is a table containing the main information about the rules (IP and next hop).
This is a higher level table, used for different things:
* Check whether a rule already exists or not, prior to addition or deletion,
without having to actually perform a lookup.
* When deleting, to check whether there is a rule containing the one that is to be deleted.
This is important, since the main data structure will have to be updated accordingly.
Addition
~~~~~~~~
When adding a rule, there are different possibilities.
If the rule's depth is exactly 24 bits, then:
* Use the rule (IP address) as an index to the tbl24.
* If the entry is invalid (i.e. it doesn't already contain a rule) then set its next hop to its value,
the valid flag to 1 (meaning this entry is in use),
and the external entry flag to 0
(meaning the lookup process ends at this point, since this is the longest prefix that matches).
If the rule's depth is exactly 32 bits, then:
* Use the first 24 bits of the rule as an index to the tbl24.
* If the entry is invalid (i.e. it doesn't already contain a rule) then look for a free tbl8,
set the index to the tbl8 to this value,
the valid flag to 1 (meaning this entry is in use), and the external entry flag to 1
(meaning the lookup process must continue since the rule hasn't been explored completely).
If the rule's depth is any other value, prefix expansion must be performed.
This means the rule is copied to all the entries (as long as they are not in use) which would also cause a match.
As a simple example, let's assume the depth is 20 bits.
This means that there are 2^(24 - 20) = 16 different combinations of the first 24 bits of an IP address that
would cause a match.
Hence, in this case, we copy the exact same entry to every position indexed by one of these combinations.
By doing this we ensure that during the lookup process, if a rule matching the IP address exists,
it is found in either one or two memory accesses,
depending on whether we need to move to the next table or not.
Prefix expansion is one of the keys of this algorithm,
since it improves the speed dramatically by adding redundancy.
Lookup
~~~~~~
The lookup process is much simpler and quicker. In this case:
* Use the first 24 bits of the IP address as an index to the tbl24.
If the entry is not in use, then it means we don't have a rule matching this IP.
If it is valid and the external entry flag is set to 0, then the next hop is returned.
* If it is valid and the external entry flag is set to 1,
then we use the tbl8 index to find out the tbl8 to be checked,
and the last 8 bits of the IP address as an index to this table.
Similarly, if the entry is not in use, then we don't have a rule matching this IP address.
If it is valid then the next hop is returned.
Limitations in the Number of Rules
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
There are different things that limit the number of rules that can be added.
The first one is the maximum number of rules, which is a parameter passed through the API.
Once this number is reached,
it is not possible to add any more rules to the routing table unless one or more are removed.
The second reason is an intrinsic limitation of the algorithm.
As explained before, to avoid high memory consumption, the number of tbl8s is limited in compilation time
(this value is by default 256).
If we exhaust tbl8s, we won't be able to add any more rules.
How many of them are necessary for a specific routing table is hard to determine in advance.
A tbl8 is consumed whenever we have a new rule with depth bigger than 24,
and the first 24 bits of this rule are not the same as the first 24 bits of a rule previously added.
If they are, then the new rule will share the same tbl8 than the previous one,
since the only difference between the two rules is within the last byte.
With the default value of 256, we can have up to 256 rules longer than 24 bits that differ on their first three bytes.
Since routes longer than 24 bits are unlikely, this shouldn't be a problem in most setups.
Even if it is, however, the number of tbl8s can be modified.
Use Case: IPv4 Forwarding
~~~~~~~~~~~~~~~~~~~~~~~~~
The LPM algorithm is used to implement Classless Inter-Domain Routing (CIDR) strategy used by routers implementing IPv4 forwarding.
References
~~~~~~~~~~
* RFC1519 Classless Inter-Domain Routing (CIDR): an Address Assignment and Aggregation Strategy,
`http://www.ietf.org/rfc/rfc1519 <http://www.ietf.org/rfc/rfc1519>`_
* Pankaj Gupta, Algorithms for Routing Lookups and Packet Classification, PhD Thesis, Stanford University,
2000 (`http://klamath.stanford.edu/~pankaj/thesis/ thesis_1sided.pdf <http://klamath.stanford.edu/~pankaj/thesis/%20thesis_1sided.pdf>`_ )
.. |tbl24_tbl8| image:: img/tbl24_tbl8.png

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.. _Malloc_Library:
Malloc Library
==============
The librte_malloc library provides an API to allocate any-sized memory.
The objective of this library is to provide malloc-like functions to allow allocation from hugepage memory
and to facilitate application porting.
The *Intel® DPDK API Reference* manual describes the available functions.
Typically, these kinds of allocations should not be done in data plane processing
because they are slower than pool-based allocation and make use of locks within the allocation
and free paths.
However, they can be used in configuration code.
Refer to the rte_malloc() function description in the *Intel® DPDK API Reference* manual for more information.
Cookies
-------
When CONFIG_RTE_MALLOC_DEBUG is enabled, the allocated memory contains overwrite protection fields
to help identify buffer overflows.
Alignment and NUMA Constraints
------------------------------
The rte_malloc() takes an align argument that can be used to request a memory area
that is aligned on a multiple of this value (which must be a power of two).
On systems with NUMA support, a call to the rte_malloc() function will return memory
that has been allocated on the NUMA socket of the core which made the call.
A set of APIs is also provided, to allow memory to be explicitly allocated on a NUMA socket directly,
or by allocated on the NUMA socket where another core is located,
in the case where the memory is to be used by a logical core other than on the one doing the memory allocation.
Use Cases
---------
This library is needed by an application that requires malloc-like functions at initialization time,
and does not require the physical address information for the individual memory blocks.
For allocating/freeing data at runtime, in the fast-path of an application,
the memory pool library should be used instead.
If a block of memory with a known physical address is needed,
e.g. for use by a hardware device, a memory zone should be used.
Internal Implementation
-----------------------
Data Structures
~~~~~~~~~~~~~~~
There are two data structure types used internally in the malloc library:
* struct malloc_heap - used to track free space on a per-socket basis
* struct malloc_elem - the basic element of allocation and free-space tracking inside the library.
Structure: malloc_heap
^^^^^^^^^^^^^^^^^^^^^^
The malloc_heap structure is used in the library to manage free space on a per-socket basis.
Internally in the library, there is one heap structure per NUMA node,
which allows us to allocate memory to a thread based on the NUMA node on which this thread runs.
While this does not guarantee that the memory will be used on that NUMA node,
it is no worse than a scheme where the memory is always allocated on a fixed or random node.
The key fields of the heap structure and their function are described below (see also diagram above):
* mz_count - field to count the number of memory zones which have been allocated for heap memory on this NUMA node.
The sole use of this value is, in combination with the numa_socket value,
to generate a suitable, unique name for each memory zone.
* lock - the lock field is needed to synchronize access to the heap.
Given that the free space in the heap is tracked using a linked list,
we need a lock to prevent two threads manipulating the list at the same time.
* free_head - this points to the first element in the list of free nodes for this malloc heap.
.. note::
The malloc_heap structure does not keep track of either the memzones allocated,
since there is little point as they cannot be freed.
Neither does it track the in-use blocks of memory,
since these are never touched except when they are to be freed again -
at which point the pointer to the block is an input to the free() function.
.. _pg_figure_3:
**Figure 3. Example of a malloc heap and malloc elements within the malloc library**
.. image4_png has been renamed
|malloc_heap|
Structure: malloc_elem
^^^^^^^^^^^^^^^^^^^^^^
The malloc_elem structure is used as a generic header structure for various blocks of memory in a memzone.
It is used in three different ways - all shown in the diagram above:
#. As a header on a block of free or allocated memory - normal case
#. As a padding header inside a block of memory
#. As an end-of-memzone marker
The most important fields in the structure and how they are used are described below.
.. note::
If the usage of a particular field in one of the above three usages is not described,
the field can be assumed to have an undefined value in that situation, for example,
for padding headers only the "state" and "pad" fields have valid values.
* heap - this pointer is a reference back to the heap structure from which this block was allocated.
It is used for normal memory blocks when they are being freed,
to add the newly-freed block to the heap's free-list.
* prev - this pointer points to the header element/block in the memzone immediately behind the current one.
When freeing a block, this pointer is used to reference the previous block to check if that block is also free.
If so, then the two free blocks are merged to form a single larger block.
* next_free - this pointer is used to chain the free-list of unallocated memory blocks together.
Again, it is only used in normal memory blocks - on malloc() to find a suitable free block to allocate,
and on free() to add the newly freed element to the free-list.
* state - This field can have one of three values: "Free", "Busy" or "Pad".
The former two, are to indicate the allocation state of a normal memory block,
and the latter is to indicate that the element structure is a dummy structure at the end of the start-of-block padding
(i.e. where the start of the data within a block is not at the start of the block itself, due to alignment constraints).
In this case, the pad header is used to locate the actual malloc element header for the block.
For the end-of-memzone structure, this is always a "busy" value, which ensures that no element,
on being freed, searches beyond the end of the memzone for other blocks to merge with into a larger free area.
* pad - this holds the length of the padding present at the start of the block.
In the case of a normal block header, it is added to the address of the end of the header
to give the address of the start of the data area i.e.
the value passed back to the application on a malloc.
Within a dummy header inside the padding, this same value is stored,
and is subtracted from the address of the dummy header to yield the address of the actual block header.
* size - the size of the data block, including the header itself.
For end-of-memzone structures, this size is given as zero, though it is never actually checked.
For normal blocks which are being freed,
this size value is used in place of a "next" pointer to identify the location of the next block of memory
(so that if it too is free, the two free blocks can be merged into one).
Memory Allocation
~~~~~~~~~~~~~~~~~
When an application makes a call to a malloc-like function,
the malloc function will first index the lcore_config structure for the calling thread,
and determine the NUMA node idea of that thread.
That is used to index the array of malloc_heap structures,
and the heap_alloc () function is called with that heap as parameter,
along with the requested size, type and alignment parameters.
The heap_alloc() function will scan the free_list for the heap,
and attempt to find a free block suitable for storing data of the requested size,
with the requested alignment constraints.
If no suitable block is found - for example, the first time malloc is called for a node,
and the free-list is NULL - a new memzone is reserved and set up as heap elements.
The setup involves placing a dummy structure at the end of the memzone
to act as a sentinel to prevent accesses beyond the end
(as the sentinel is marked as BUSY, the malloc library code will never attempt to reference it further),
and a proper element header at the start of the memzone.
This latter header identifies all space in the memzone, bar the sentinel value at the end,
as a single free heap element, and it is then added to the free_list for the heap.
Once the new memzone has been set up, the scan of the free-list for the heap is redone,
and on this occasion should find the newly created,
suitable element as the size of memory reserved in the memzone is set to be
at least the size of the requested data block plus the alignment -
subject to a minimum size specified in the Intel DPDK compile-time configuration.
When a suitable, free element has been identified, the pointer to be returned to the user is calculated,
with the space to be provided to the user being at the end of the free block.
The cache-line of memory immediately preceding this space is filled with a struct malloc_elem header:
if the remaining space within the block is small e.g. <=128 bytes,
then a pad header is used, and the remaining space is wasted.
If, however, the remaining space is greater than this, then the single free element block is split into two,
and a new, proper, malloc_elem header is put before the returned data space.
[The advantage of allocating the memory from the end of the existing element is that
in this case no adjustment of the free list needs to take place -
the existing element on the free list just has its size pointer adjusted,
and the following element has its "prev" pointer redirected to the newly created element].
Freeing Memory
~~~~~~~~~~~~~~
To free an area of memory, the pointer to the start of the data area is passed to the free function.
The size of the malloc_elem structure is subtracted from this pointer to get the element header for the block.
If this header is of type "PAD" then the pad length is further subtracted from the pointer
to get the proper element header for the entire block.
From this element header, we get pointers to the heap from which the block came -- and to where it must be freed,
as well as the pointer to the previous element, and, via the size field,
we can calculate the pointer to the next element.
These next and previous elements are then checked to see if they too are free,
and if so, they are merged with the current elements.
This means that we can never have two free memory blocks adjacent to one another,
they are always merged into a single block.
.. |malloc_heap| image:: img/malloc_heap.png

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.. _Mbuf_Library:
Mbuf Library
============
The mbuf library provides the ability to allocate and free buffers (mbufs)
that may be used by the Intel® DPDK application to store message buffers.
The message buffers are stored in a mempool, using the :ref:`Mempool Library <Mempool_Library>`.
A rte_mbuf struct can carry network packet buffers (type is RTE_MBUF_PKT)
or generic control buffers (type is RTE_MBUF_CTRL).
This can be extended to other types.
The rte_mbuf is kept as small as possible (one cache line if possible).
Design of Packet Buffers
------------------------
For the storage of the packet data (including protocol headers), two approaches were considered:
#. Embed metadata within a single memory buffer the structure followed by a fixed size area for the packet data.
#. Use separate memory buffers for the metadata structure and for the packet data.
The advantage of the first method is that it only needs one operation to allocate/free the whole memory representation of a packet.
On the other hand, the second method is more flexible and allows
the complete separation of the allocation of metadata structures from the allocation of packet data buffers.
The first method was chosen for the Intel® DPDK.
The metadata contains control information such as message type, length,
pointer to the start of the data and a pointer for additional mbuf structures allowing buffer chaining.
Message buffers that are used to carry network packets can handle buffer chaining
where multiple buffers are required to hold the complete packet.
This is the case for jumbo frames that are composed of many mbufs linked together through their pkt.next field.
For a newly allocated mbuf, the area at which the data begins in the message buffer is
RTE_PKTMBUF_HEADROOM bytes after the beginning of the buffer, which is cache aligned.
Message buffers may be used to carry control information, packets, events,
and so on between different entities in the system.
Message buffers may also use their data pointers to point to other message buffer data sections or other structures.
Figure 8 and Figure 9 show some of these scenarios.
.. _pg_figure_8:
**Figure 8. An mbuf with One Segment**
.. image22_png has been replaced
|mbuf1|
.. _pg_figure_9:
**Figure 9. An mbuf with Three Segments**
.. image23_png has been replaced
|mbuf2|
The Buffer Manager implements a fairly standard set of buffer access functions to manipulate network packets.
Buffers Stored in Memory Pools
------------------------------
The Buffer Manager uses the :ref:`Mempool Library <Mempool_Library>` to allocate buffers.
Therefore, it ensures that the packet header is interleaved optimally across the channels and ranks for L3 processing.
An mbuf contains a field indicating the pool that it originated from.
When calling rte_ctrlmbuf_free(m) or rte_pktmbuf_free(m), the mbuf returns to its original pool.
Constructors
------------
Packet and control mbuf constructors are provided by the API.
The rte_pktmbuf_init() and rte_ctrlmbuf_init() functions initialize some fields in the mbuf structure that
are not modified by the user once created (mbuf type, origin pool, buffer start address, and so on).
This function is given as a callback function to the rte_mempool_create() function at pool creation time.
Allocating and Freeing mbufs
----------------------------
Allocating a new mbuf requires the user to specify the mempool from which the mbuf should be taken.
For a packet mbuf, it contains one segment, with a length of 0.
The pointer to data is initialized to have some bytes of headroom in the buffer (RTE_PKTMBUF_HEADROOM).
For a control mbuf, it is initialized with data pointing to the beginning of the buffer and a length of zero.
Freeing a mbuf means returning it into its original mempool.
The content of an mbuf is not modified when it is stored in a pool (as a free mbuf).
Fields initialized by the constructor do not need to be re-initialized at mbuf allocation.
When freeing a packet mbuf that contains several segments, all of them are freed and returned to their original mempool.
Manipulating mbufs
------------------
This library provides some functions for manipulating the data in a packet mbuf. For instance:
* Get data length
* Get a pointer to the start of data
* Prepend data before data
* Append data after data
* Remove data at the beginning of the buffer (rte_pktmbuf_adj())
* Remove data at the end of the buffer (rte_pktmbuf_trim()) Refer to the *Intel® DPDK API Reference* for details.
Meta Information
----------------
Some information is retrieved by the network driver and stored in an mbuf to make processing easier.
For instance, the VLAN, the RSS hash result (see :ref:`Poll Mode Driver <Poll_Mode_Driver>`)
and a flag indicating that the checksum was computed by hardware.
An mbuf also contains the input port (where it comes from), and the number of segment mbufs in the chain.
For chained buffers, only the first mbuf of the chain stores this meta information.
Direct and Indirect Buffers
---------------------------
A direct buffer is a buffer that is completely separate and self-contained.
An indirect buffer behaves like a direct buffer but for the fact that the data pointer it contains points to data in another direct buffer.
This is useful in situations where packets need to be duplicated or fragmented,
since indirect buffers provide the means to reuse the same packet data across multiple buffers.
A buffer becomes indirect when it is "attached" to a direct buffer using the rte_pktmbuf_attach() function.
Each buffer has a reference counter field and whenever an indirect buffer is attached to the direct buffer,
the reference counter on the direct buffer is incremented.
Similarly, whenever the indirect buffer is detached, the reference counter on the direct buffer is decremented.
If the resulting reference counter is equal to 0, the direct buffer is freed since it is no longer in use.
There are a few things to remember when dealing with indirect buffers.
First of all, it is not possible to attach an indirect buffer to another indirect buffer.
Secondly, for a buffer to become indirect, its reference counter must be equal to 1,
that is, it must not be already referenced by another indirect buffer.
Finally, it is not possible to reattach an indirect buffer to the direct buffer (unless it is detached first).
While the attach/detach operations can be invoked directly using the recommended rte_pktmbuf_attach() and rte_pktmbuf_detach() functions,
it is suggested to use the higher-level rte_pktmbuf_clone() function,
which takes care of the correct initialization of an indirect buffer and can clone buffers with multiple segments.
Since indirect buffers are not supposed to actually hold any data,
the memory pool for indirect buffers should be configured to indicate the reduced memory consumption.
Examples of the initialization of a memory pool for indirect buffers (as well as use case examples for indirect buffers)
can be found in several of the sample applications, for example, the IPv4 Multicast sample application.
Debug
-----
In debug mode (CONFIG_RTE_MBUF_DEBUG is enabled),
the functions of the mbuf library perform sanity checks before any operation (such as, buffer corruption, bad type, and so on).
Use Cases
---------
All networking application should use mbufs to transport network packets.
.. |mbuf1| image:: img/mbuf1.svg
.. |mbuf2| image:: img/mbuf2.svg

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.. _Mempool_Library:
Mempool Library
===============
A memory pool is an allocator of a fixed-sized object.
In the Intel® DPDK, it is identified by name and uses a ring to store free objects.
It provides some other optional services such as a per-core object cache and
an alignment helper to ensure that objects are padded to spread them equally on all DRAM or DDR3 channels.
This library is used by the
:ref:`Mbuf Library <Mbuf_Library>` and the
:ref:`Environment Abstraction Layer <Environment_Abstraction_Layer>` (for logging history).
Cookies
-------
In debug mode (CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG is enabled), cookies are added at the beginning and end of allocated blocks.
The allocated objects then contain overwrite protection fields to help debugging buffer overflows.
Stats
-----
In debug mode (CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG is enabled),
statistics about get from/put in the pool are stored in the mempool structure.
Statistics are per-lcore to avoid concurrent access to statistics counters.
Memory Alignment Constraints
----------------------------
Depending on hardware memory configuration, performance can be greatly improved by adding a specific padding between objects.
The objective is to ensure that the beginning of each object starts on a different channel and rank in memory so that all channels are equally loaded.
This is particularly true for packet buffers when doing L3 forwarding or flow classification.
Only the first 64 bytes are accessed, so performance can be increased by spreading the start addresses of objects among the different channels.
The number of ranks on any DIMM is the number of independent sets of DRAMs that can be accessed for the full data bit-width of the DIMM.
The ranks cannot be accessed simultaneously since they share the same data path.
The physical layout of the DRAM chips on the DIMM itself does not necessarily relate to the number of ranks.
When running an application, the EAL command line options provide the ability to add the number of memory channels and ranks.
.. note::
The command line must always have the number of memory channels specified for the processor.
Examples of alignment for different DIMM architectures are shown in Figure 5 and Figure 6.
.. _pg_figure_5:
**Figure 5. Two Channels and Quad-ranked DIMM Example**
.. image19_png has been replaced
|memory-management|
In this case, the assumption is that a packet is 16 blocks of 64 bytes, which is not true.
The Intel® 5520 chipset has three channels, so in most cases,
no padding is required between objects (except for objects whose size are n x 3 x 64 bytes blocks).
.. _pg_figure_6:
**Figure 6. Three Channels and Two Dual-ranked DIMM Example**
.. image20_png has been replaced
|memory-management2|
When creating a new pool, the user can specify to use this feature or not.
Local Cache
-----------
In terms of CPU usage, the cost of multiple cores accessing a memory pool's ring of free buffers may be high
since each access requires a compare-and-set (CAS) operation.
To avoid having too many access requests to the memory pool's ring,
the memory pool allocator can maintain a per-core cache and do bulk requests to the memory pool's ring,
via the cache with many fewer locks on the actual memory pool structure.
In this way, each core has full access to its own cache (with locks) of free objects and
only when the cache fills does the core need to shuffle some of the free objects back to the pools ring or
obtain more objects when the cache is empty.
While this may mean a number of buffers may sit idle on some core's cache,
the speed at which a core can access its own cache for a specific memory pool without locks provides performance gains.
The cache is composed of a small, per-core table of pointers and its length (used as a stack).
This cache can be enabled or disabled at creation of the pool.
The maximum size of the cache is static and is defined at compilation time (CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE).
Figure 7 shows a cache in operation.
.. _pg_figure_7:
**Figure 7. A mempool in Memory with its Associated Ring**
.. image21_png has been replaced
|mempool|
Use Cases
---------
All allocations that require a high level of performance should use a pool-based memory allocator.
Below are some examples:
* :ref:`Mbuf Library <Mbuf_Library>`
* :ref:`Environment Abstraction Layer <Environment_Abstraction_Layer>` , for logging service
* Any application that needs to allocate fixed-sized objects in the data plane and that will be continuously utilized by the system.
.. |memory-management| image:: img/memory-management.svg
.. |memory-management2| image:: img/memory-management2.svg
.. |mempool| image:: img/mempool.svg

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.. _Multi-process_Support:
Multi-process Support
=====================
In the Intel® DPDK, multi-process support is designed to allow a group of Intel® DPDK processes
to work together in a simple transparent manner to perform packet processing,
or other workloads, on Intel® architecture hardware.
To support this functionality,
a number of additions have been made to the core Intel® DPDK Environment Abstraction Layer (EAL).
The EAL has been modified to allow different types of Intel® DPDK processes to be spawned,
each with different permissions on the hugepage memory used by the applications.
For now, there are two types of process specified:
* primary processes, which can initialize and which have full permissions on shared memory
* secondary processes, which cannot initialize shared memory,
but can attach to pre- initialized shared memory and create objects in it.
Standalone Intel® DPDK processes are primary processes,
while secondary processes can only run alongside a primary process or
after a primary process has already configured the hugepage shared memory for them.
To support these two process types, and other multi-process setups described later,
two additional command-line parameters are available to the EAL:
* --proc-type: for specifying a given process instance as the primary or secondary Intel® DPDK instance
* --file-prefix: to allow processes that do not want to co-operate to have different memory regions
A number of example applications are provided that demonstrate how multiple Intel® DPDK processes can be used together.
These are more fully documented in the "Multi- process Sample Application" chapter
in the *Intel® DPDK Sample Application's User Guide*.
Memory Sharing
--------------
The key element in getting a multi-process application working using the Intel® DPDK is to ensure that
memory resources are properly shared among the processes making up the multi-process application.
Once there are blocks of shared memory available that can be accessed by multiple processes,
then issues such as inter-process communication (IPC) becomes much simpler.
On application start-up in a primary or standalone process,
the Intel DPDK records to memory-mapped files the details of the memory configuration it is using - hugepages in use,
the virtual addresses they are mapped at, the number of memory channels present, etc.
When a secondary process is started, these files are read and the EAL recreates the same memory configuration
in the secondary process so that all memory zones are shared between processes and all pointers to that memory are valid,
and point to the same objects, in both processes.
.. note::
Refer to Section 23.3 "Multi-process Limitations" for details of
how Linux kernel Address-Space Layout Randomization (ASLR) can affect memory sharing.
.. _pg_figure_16:
**Figure 16. Memory Sharing in the Intel® DPDK Multi-process Sample Application**
.. image42_png has been replaced
|multi_process_memory|
The EAL also supports an auto-detection mode (set by EAL --proc-type=auto flag ),
whereby an Intel® DPDK process is started as a secondary instance if a primary instance is already running.
Deployment Models
-----------------
Symmetric/Peer Processes
~~~~~~~~~~~~~~~~~~~~~~~~
Intel® DPDK multi-process support can be used to create a set of peer processes where each process performs the same workload.
This model is equivalent to having multiple threads each running the same main-loop function,
as is done in most of the supplied Intel® DPDK sample applications.
In this model, the first of the processes spawned should be spawned using the --proc-type=primary EAL flag,
while all subsequent instances should be spawned using the --proc-type=secondary flag.
The simple_mp and symmetric_mp sample applications demonstrate this usage model.
They are described in the "Multi-process Sample Application" chapter in the *Intel® DPDK Sample Application's User Guide*.
Asymmetric/Non-Peer Processes
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
An alternative deployment model that can be used for multi-process applications
is to have a single primary process instance that acts as a load-balancer or
server distributing received packets among worker or client threads, which are run as secondary processes.
In this case, extensive use of rte_ring objects is made, which are located in shared hugepage memory.
The client_server_mp sample application shows this usage model.
It is described in the "Multi-process Sample Application" chapter in the *Intel® DPDK Sample Application's User Guide*.
Running Multiple Independent Intel® DPDK Applications
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In addition to the above scenarios involving multiple Intel® DPDK processes working together,
it is possible to run multiple Intel® DPDK processes side-by-side,
where those processes are all working independently.
Support for this usage scenario is provided using the --file-prefix parameter to the EAL.
By default, the EAL creates hugepage files on each hugetlbfs filesystem using the rtemap_X filename,
where X is in the range 0 to the maximum number of hugepages -1.
Similarly, it creates shared configuration files, memory mapped in each process, using the /var/run/.rte_config filename,
when run as root (or $HOME/.rte_config when run as a non-root user;
if filesystem and device permissions are set up to allow this).
The rte part of the filenames of each of the above is configurable using the file-prefix parameter.
In addition to specifying the file-prefix parameter,
any Intel® DPDK applications that are to be run side-by-side must explicitly limit their memory use.
This is done by passing the -m flag to each process to specify how much hugepage memory, in megabytes,
each process can use (or passing --socket-mem to specify how much hugepage memory on each socket each process can use).
.. note::
Independent Intel® DPDK instances running side-by-side on a single machine cannot share any network ports.
Any network ports being used by one process should be blacklisted in every other process.
Running Multiple Independent Groups of Intel® DPDK Applications
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In the same way that it is possible to run independent Intel® DPDK applications side- by-side on a single system,
this can be trivially extended to multi-process groups of Intel® DPDK applications running side-by-side.
In this case, the secondary processes must use the same --file-prefix parameter
as the primary process whose shared memory they are connecting to.
.. note::
All restrictions and issues with multiple independent Intel® DPDK processes running side-by-side
apply in this usage scenario also.
Multi-process Limitations
-------------------------
There are a number of limitations to what can be done when running Intel® DPDK multi-process applications.
Some of these are documented below:
* The multi-process feature requires that the exact same hugepage memory mappings be present in all applications.
The Linux security feature - Address-Space Layout Randomization (ASLR) can interfere with this mapping,
so it may be necessary to disable this feature in order to reliably run multi-process applications.
.. warning::
Disabling Address-Space Layout Randomization (ASLR) may have security implications,
so it is recommended that it be disabled only when absolutely necessary,
and only when the implications of this change have been understood.
* All Intel® DPDK processes running as a single application and using shared memory must have distinct coremask arguments.
It is not possible to have a primary and secondary instance, or two secondary instances,
using any of the same logical cores.
Attempting to do so can cause corruption of memory pool caches, among other issues.
* The delivery of interrupts, such as Ethernet* device link status interrupts, do not work in secondary processes.
All interrupts are triggered inside the primary process only.
Any application needing interrupt notification in multiple processes should provide its own mechanism
to transfer the interrupt information from the primary process to any secondary process that needs the information.
* The use of function pointers between multiple processes running based of different compiled binaries is not supported,
since the location of a given function in one process may be different to its location in a second.
This prevents the librte_hash library from behaving properly as in a multi-threaded instance,
since it uses a pointer to the hash function internally.
To work around this issue, it is recommended that multi-process applications perform the hash calculations by directly calling
the hashing function from the code and then using the rte_hash_add_with_hash()/rte_hash_lookup_with_hash() functions
instead of the functions which do the hashing internally, such as rte_hash_add()/rte_hash_lookup().
* Depending upon the hardware in use, and the number of Intel® DPDK processes used,
it may not be possible to have HPET timers available in each Intel® DPDK instance.
The minimum number of HPET comparators available to Linux* userspace can be just a single comparator,
which means that only the first, primary Intel® DPDK process instance can open and mmap /dev/hpet.
If the number of required Intel® DPDK processes exceeds that of the number of available HPET comparators,
the TSC (which is the default timer in this release) must be used as a time source across all processes instead of the HPET.
.. |multi_process_memory| image:: img/multi_process_memory.svg

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**Part 1: Architecture Overview**
Overview
========
This section gives a global overview of the architecture of Intel® Data Plane Development Kit (Intel® DPDK).
The main goal of the Intel® DPDK is to provide a simple,
complete framework for fast packet processing in data plane applications.
Users may use the code to understand some of the techniques employed,
to build upon for prototyping or to add their own protocol stacks.
Alternative ecosystem options that use the Intel® DPDK are available.
The framework creates a set of libraries for specific environments
through the creation of an Environment Abstraction Layer (EAL),
which may be specific to a mode of the Intel® architecture (32-bit or 64-bit),
Linux* user space compilers or a specific platform.
These environments are created through the use of make files and configuration files.
Once the EAL library is created, the user may link with the library to create their own applications.
Other libraries, outside of EAL, including the Hash,
Longest Prefix Match (LPM) and rings libraries are also provided.
Sample applications are provided to help show the user how to use various features of the Intel® DPDK.
The Intel® DPDK implements a run to completion model for packet processing,
where all resources must be allocated prior to calling Data Plane applications,
running as execution units on logical processing cores.
The model does not support a scheduler and all devices are accessed by polling.
The primary reason for not using interrupts is the performance overhead imposed by interrupt processing.
In addition to the run-to-completion model,
a pipeline model may also be used by passing packets or messages between cores via the rings.
This allows work to be performed in stages and may allow more efficient use of code on cores.
Development Environment
-----------------------
The Intel® DPDK project installation requires Linux and the associated toolchain,
such as one or more compilers, assembler, make utility,
editor and various libraries to create the Intel® DPDK components and libraries.
Once these libraries are created for the specific environment and architecture,
they may then be used to create the user's data plane application.
When creating applications for the Linux user space, the glibc library is used.
For Intel® DPDK applications, two environmental variables (RTE_SDK and RTE_TARGET)
must be configured before compiling the applications.
The following are examples of how the variables can be set:
.. code-block:: console
export RTE_SDK=/home/user/DPDK
export RTE_TARGET=x86_64-native-linuxapp-gcc
See the *Intel® DPDK Getting Started Guide* for information on setting up the development environment.
Environment Abstraction Layer
-----------------------------
The Environment Abstraction Layer (EAL) provides a generic interface
that hides the environment specifics from the applications and libraries.
The services provided by the EAL are:
* Intel® DPDK loading and launching
* Support for multi-process and multi-thread execution types
* Core affinity/assignment procedures
* System memory allocation/de-allocation
* Atomic/lock operations
* Time reference
* PCI bus access
* Trace and debug functions
* CPU feature identification
* Interrupt handling
* Alarm operations
The EAL is fully described in :ref:`Environment Abstraction Layer <Environment_Abstraction_Layer>`.
Core Components
---------------
The *core components* are a set of libraries that provide all the elements needed
for high-performance packet processing applications.
.. _pg_figure_1:
**Figure 1. Core Components Architecture**
.. image2_png has been replaced
|architecture-overview|
Memory Manager (librte_malloc)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The librte_malloc library provides an API to allocate memory from the memzones created from the hugepages instead of the heap.
This helps when allocating large numbers of items that may become susceptible to TLB misses
when using typical 4k heap pages in the Linux user space environment.
This memory allocator is fully described in :ref:`Malloc Library <Malloc_Library>`.
Ring Manager (librte_ring)
~~~~~~~~~~~~~~~~~~~~~~~~~~
The ring structure provides a lockless multi-producer, multi-consumer FIFO API in a finite size table.
It has some advantages over lockless queues; easier to implement, adapted to bulk operations and faster.
A ring is used by the :ref:`Memory Pool Manager (librte_mempool) <Mempool_Library>`
and may be used as a general communication mechanism between cores
and/or execution blocks connected together on a logical core.
This ring buffer and its usage are fully described in :ref:`Ring Library <Ring_Library>`.
Memory Pool Manager (librte_mempool)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The Memory Pool Manager is responsible for allocating pools of objects in memory.
A pool is identified by name and uses a ring to store free objects.
It provides some other optional services,
such as a per-core object cache and an alignment helper to ensure that objects are padded to spread them equally on all RAM channels.
This memory pool allocator is described in :ref:`Mempool Library <Mempool_Library>`.
Network Packet Buffer Management (librte_mbuf)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The mbuf library provides the facility to create and destroy buffers
that may be used by the Intel® DPDK application to store message buffers.
The message buffers are created at startup time and stored in a mempool, using the Intel® DPDK mempool library.
This library provide an API to allocate/free mbufs, manipulate control message buffers (ctrlmbuf) which are generic message buffers,
and packet buffers (pktmbuf) which are used to carry network packets.
Network Packet Buffer Management is described in :ref:`Mbuf Library <Mbuf_Library>`.
Timer Manager (librte_timer)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This library provides a timer service to Intel® DPDK execution units,
providing the ability to execute a function asynchronously.
It can be periodic function calls, or just a one-shot call.
It uses the timer interface provided by the Environment Abstraction Layer (EAL)
to get a precise time reference and can be initiated on a per-core basis as required.
The library documentation is available in :ref:`Timer Library <Timer_Library>`.
Ethernet* Poll Mode Driver Architecture
---------------------------------------
The Intel® DPDK includes Poll Mode Drivers (PMDs) for 1 GbE, 10 GbE and 40GbE, and para virtualized virtio
Ethernet controllers which are designed to work without asynchronous, interrupt-based signaling mechanisms.
See :ref:`Poll Mode Driver <Poll_Mode_Driver>`.
Packet Forwarding Algorithm Support
-----------------------------------
The Intel® DPDK includes Hash (librte_hash) and Longest Prefix Match (LPM,librte_lpm)
libraries to support the corresponding packet forwarding algorithms.
See :ref:`Hash Library <Hash_Library>` and :ref:`LPM Library <LPM_Library>` for more information.
librte_net
----------
The librte_net library is a collection of IP protocol definitions and convenience macros.
It is based on code from the FreeBSD* IP stack and contains protocol numbers (for use in IP headers),
IP-related macros, IPv4/IPv6 header structures and TCP, UDP and SCTP header structures.
.. |architecture-overview| image:: img/architecture-overview.svg

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Packet Classification and Access Control
========================================
The Intel® DPDK provides an Access Control library that gives the ability
to classify an input packet based on a set of classification rules.
The ACL library is used to perform an N-tuple search over a set of rules with multiple categories
and find the best match (highest priority) for each category.
The library API provides the following basic operations:
* Create a new Access Control (AC) context.
* Add rules into the context.
* For all rules in the context, build the runtime structures necessary to perform packet classification.
* Perform input packet classifications.
* Destroy an AC context and its runtime structures and free the associated memory.
Overview
--------
The current implementation allows the user for each AC context to specify its own rule (set of fields)
over which packet classification will be performed.
To define each field inside an AC rule, the following structure is used:
.. code-block:: c
struct rte_acl_field_def {
uint8_t type; /*< type - ACL_FIELD_TYPE. */
uint8_t size; /*< size of field 1,2,4, or 8. */
uint8_t field_index; /*< index of field inside the rule. */
uint8_t input_index; /*< 0-N input index. */
uint32_t offset; /*< offset to start of field. */
};
* type
The field type is one of three choices:
* _MASK - for fields such as IP addresses that have a value and a mask defining the number of relevant bits.
* _RANGE - for fields such as ports that have a lower and upper value for the field.
* _BITMASK - for fields such as protocol identifiers that have a value and a bit mask.
* size
The size parameter defines the length of the field in bytes. Allowable values are 1, 2, 4, or 8 bytes.
Note that due to the grouping of input bytes, 1 or 2 byte fields must be defined as consecutive fields
that make up 4 consecutive input bytes.
Also, it is best to define fields of 8 or more bytes as 4 byte fields so that
the build processes can eliminate fields that are all wild.
* field_index
A zero-based value that represents the position of the field inside the rule; 0 to N-1 for N fields.
* input_index
For performance reasons, the inner loop of the search function is unrolled to process four input bytes at a time.
This requires the input to be grouped into sets of 4 consecutive bytes.
The loop processes the first input byte as part of the setup and then
subsequent bytes must be in groups of 4 consecutive bytes.
The input index specifies to which input group that field belongs to.
* offset
The offset field defines the offset for the field.
This is the offset from the beginning of the buffer parameter for the search.
For example, to define classification for the following IPv4 5-tuple structure:
.. code-block:: c
struct ipv4_5tuple {
uint8_t proto;
uint32_t ip_src;
uint32_t ip_dst;
uint16_t port_src;
uint16_t port_dst;
};
The following array of field definitions can be used:
.. code-block:: c
struct rte_acl_field_def ipv4_defs[5] = {
/* first input field - always one byte long. */
{
.type = RTE_ACL_FIELD_TYPE_BITMASK,
.size = sizeof (uint8_t),
.field_index = 0,
.input_index = 0,
.offset = offsetof (struct ipv4_5tuple, proto),
},
/* next input field (IPv4 source address) - 4 consecutive bytes. */
{
.type = RTE_ACL_FIELD_TYPE_MASK,
.size = sizeof (uint32_t),
.field_index = 1,
.input_index = 1,
.offset = offsetof (struct ipv4_5tuple, ip_src),
},
/* next input field (IPv4 destination address) - 4 consecutive bytes. */
{
.type = RTE_ACL_FIELD_TYPE_MASK,
.size = sizeof (uint32_t),
.field_index = 2,
.input_index = 2,
.offset = offsetof (struct ipv4_5tuple, ip_dst),
},
/*
* Next 2 fields (src & dst ports) form 4 consecutive bytes.
* They share the same input index.
*/
{
.type = RTE_ACL_FIELD_TYPE_RANGE,
.size = sizeof (uint16_t),
.field_index = 3,
.input_index = 3,
.offset = offsetof (struct ipv4_5tuple, port_src),
},
{
.type = RTE_ACL_FIELD_TYPE_RANGE,
.size = sizeof (uint16_t),
.field_index = 4,
.input_index = 3,
.offset = offsetof (struct ipv4_5tuple, port_dst),
},
};
A typical example of such an IPv4 5-tuple rule is a follows:
::
source addr/mask destination addr/mask source ports dest ports protocol/mask
192.168.1.0/24 192.168.2.31/32 0:65535 1234:1234 17/0xff
Any IPv4 packets with protocol ID 17 (UDP), source address 192.168.1.[0-255], destination address 192.168.2.31,
source port [0-65535] and destination port 1234 matches the above rule.
To define classification for the IPv6 2-tuple: <protocol, IPv6 source address> over the following IPv6 header structure:
.. code-block:: c
struct struct ipv6_hdr {
uint32_t vtc_flow; /* IP version, traffic class & flow label. */
uint16_t payload_len; /* IP packet length - includes sizeof(ip_header). */
uint8_t proto; /* Protocol, next header. */
uint8_t hop_limits; /* Hop limits. */
uint8_t src_addr[16]; /* IP address of source host. */
uint8_t dst_addr[16]; /* IP address of destination host(s). */
} __attribute__((__packed__));
The following array of field definitions can be used:
.. code-block:: c
struct struct rte_acl_field_def ipv6_2tuple_defs[5] = {
{
.type = RTE_ACL_FIELD_TYPE_BITMASK,
.size = sizeof (uint8_t),
.field_index = 0,
.input_index = 0,
.offset = offsetof (struct ipv6_hdr, proto),
},
{
.type = RTE_ACL_FIELD_TYPE_MASK,
.size = sizeof (uint32_t),
.field_index = 1,
.input_index = 1,
.offset = offsetof (struct ipv6_hdr, src_addr[0]),
},
{
.type = RTE_ACL_FIELD_TYPE_MASK,
.size = sizeof (uint32_t),
.field_index = 2,
.input_index = 2,
.offset = offsetof (struct ipv6_hdr, src_addr[4]),
},
{
.type = RTE_ACL_FIELD_TYPE_MASK,
.size = sizeof (uint32_t),
.field_index = 3,
.input_index = 3,
.offset = offsetof (struct ipv6_hdr, src_addr[8]),
},
{
.type = RTE_ACL_FIELD_TYPE_MASK,
.size = sizeof (uint32_t),
.field_index = 4,
.input_index = 4,
.offset = offsetof (struct ipv6_hdr, src_addr[12]),
},
};
A typical example of such an IPv6 2-tuple rule is a follows:
::
source addr/mask protocol/mask
2001:db8:1234:0000:0000:0000:0000:0000/48 6/0xff
Any IPv6 packets with protocol ID 6 (TCP), and source address inside the range
[2001:db8:1234:0000:0000:0000:0000:0000 - 2001:db8:1234:ffff:ffff:ffff:ffff:ffff] matches the above rule.
When creating a set of rules, for each rule, additional information must be supplied also:
* **priority**: A weight to measure the priority of the rules (higher is better).
If the input tuple matches more than one rule, then the rule with the higher priority is returned.
Note that if the input tuple matches more than one rule and these rules have equal priority,
it is undefined which rule is returned as a match.
It is recommended to assign a unique priority for each rule.
* **category_mask**: Each rule uses a bit mask value to select the relevant category(s) for the rule.
When a lookup is performed, the result for each category is returned.
This effectively provides a "parallel lookup" by enabling a single search to return multiple results if,
for example, there were four different sets of ACL rules, one for access control, one for routing, and so on.
Each set could be assigned its own category and by combining them into a single database,
one lookup returns a result for each of the four sets.
* **userdata**: A user-defined field that could be any value except zero.
For each category, a successful match returns the userdata field of the highest priority matched rule.
.. note::
When adding new rules into an ACL context, all fields must be in host byte order (LSB).
When the search is performed for an input tuple, all fields in that tuple must be in network byte order (MSB).
Application Programming Interface (API) Usage
---------------------------------------------
.. note::
For more details about the Access Control API, please refer to the *Intel® DPDK API Reference*.
The following example demonstrates IPv4, 5-tuple classification for rules defined above
with multiple categories in more detail.
Classify with Multiple Categories
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
.. code-block:: c
struct rte_acl_ctx * acx;
struct rte_acl_config cfg;
int ret;
/* define a structure for the rule with up to 5 fields. */
RTE_ACL_RULE_DEF(acl_ipv4_rule, RTE_DIM(ipv4_defs));
/* AC context creation parameters. */
struct rte_acl_param prm = {
.name = "ACL_example",
.socket_id = SOCKET_ID_ANY,
.rule_size = RTE_ACL_RULE_SZ(RTE_DIM(ipv4_defs)),
/* number of fields per rule. */
.max_rule_num = 8, /* maximum number of rules in the AC context. */
};
struct acl_ipv4_rule acl_rules[] = {
/* matches all packets traveling to 192.168.0.0/16, applies for categories: 0,1 */
{
.data = {.userdata = 1, .category_mask = 3, .priority = 1},
/* destination IPv4 */
.field[2] = {.value.u32 = IPv4(192,168,0,0),. mask_range.u32 = 16,},
/* source port */
.field[3] = {.value.u16 = 0, .mask_range.u16 = 0xffff,},
/* destination port */
.field[4] = {.value.u16 = 0, .mask_range.u16 = 0xffff,},
},
/* matches all packets traveling to 192.168.1.0/24, applies for categories: 0 */
{
.data = {.userdata = 2, .category_mask = 1, .priority = 2},
/* destination IPv4 */
.field[2] = {.value.u32 = IPv4(192,168,1,0),. mask_range.u32 = 24,},
/* source port */
.field[3] = {.value.u16 = 0, .mask_range.u16 = 0xffff,},
/* destination port */
.field[4] = {.value.u16 = 0, .mask_range.u16 = 0xffff,},
},
/* matches all packets traveling from 10.1.1.1, applies for categories: 1 */
{
.data = {.userdata = 3, .category_mask = 2, .priority = 3},
/* source IPv4 */
.field[1] = {.value.u32 = IPv4(10,1,1,1),. mask_range.u32 = 32,},
/* source port */
.field[3] = {.value.u16 = 0, .mask_range.u16 = 0xffff,},
/* destination port */
.field[4] = {.value.u16 = 0, .mask_range.u16 = 0xffff,},
},
};
/* create an empty AC context */
if ((acx = rte_acl_create(&prm)) == NULL) {
/* handle context create failure. */
}
/* add rules to the context */
ret = rte_acl_add_rules(acx, acl_rules, RTE_DIM(acl_rules));
if (ret != 0) {
/* handle error at adding ACL rules. */
}
/* prepare AC build config. */
cfg.num_categories = 2;
cfg.num_fields = RTE_DIM(ipv4_defs);
memcpy(cfg.defs, ipv4_defs, sizeof (ipv4_defs));
/* build the runtime structures for added rules, with 2 categories. */
ret = rte_acl_build(acx, &cfg);
if (ret != 0) {
/* handle error at build runtime structures for ACL context. */
}
For a tuple with source IP address: 10.1.1.1 and destination IP address: 192.168.1.15,
once the following lines are executed:
.. code-block:: c
uint32_t results[4]; /* make classify for 4 categories. */
rte_acl_classify(acx, data, results, 1, 4);
then the results[] array contains:
.. code-block:: c
results[4] = {2, 3, 0, 0};
* For category 0, both rules 1 and 2 match, but rule 2 has higher priority,
therefore results[0] contains the userdata for rule 2.
* For category 1, both rules 1 and 3 match, but rule 3 has higher priority,
therefore results[1] contains the userdata for rule 3.
* For categories 2 and 3, there are no matches, so results[2] and results[3] contain zero,
which indicates that no matches were found for those categories.
For a tuple with source IP address: 192.168.1.1 and destination IP address: 192.168.2.11,
once the following lines are executed:
.. code-block:: c
uint32_t results[4]; /* make classify by 4 categories. */
rte_acl_classify(acx, data, results, 1, 4);
the results[] array contains:
.. code-block:: c
results[4] = {1, 1, 0, 0};
* For categories 0 and 1, only rule 1 matches.
* For categories 2 and 3, there are no matches.
For a tuple with source IP address: 10.1.1.1 and destination IP address: 201.212.111.12,
once the following lines are executed:
.. code-block:: c
uint32_t results[4]; /* make classify by 4 categories. */
rte_acl_classify(acx, data, results, 1, 4);
the results[] array contains:
.. code-block:: c
results[4] = {0, 3, 0, 0};
* For category 1, only rule 3 matches.
* For categories 0, 2 and 3, there are no matches.

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.. BSD LICENSE
Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Packet Distributor Library
==========================
The Intel® DPDK Packet Distributor library is a library designed to be used for dynamic load balancing of traffic
while supporting single packet at a time operation.
When using this library, the logical cores in use are to be considered in two roles: firstly a distributor lcore,
which is responsible for load balancing or distributing packets,
and a set of worker lcores which are responsible for receiving the packets from the distributor and operating on them.
The model of operation is shown in the diagram below.
|packet_distributor1|
Distributor Core Operation
--------------------------
The distributor core does the majority of the processing for ensuring that packets are fairly shared among workers.
The operation of the distributor is as follows:
#. Packets are passed to the distributor component by having the distributor lcore thread call the "rte_distributor_process()" API
#. The worker lcores all share a single cache line with the distributor core in order to pass messages and packets to and from the worker.
The process API call will poll all the worker cache lines to see what workers are requesting packets.
#. As workers request packets, the distributor takes packets from the set of packets passed in and distributes them to the workers.
As it does so, it examines the "tag" -- stored in the RSS hash field in the mbuf -- for each packet
and records what tags are being processed by each worker.
#. If the next packet in the input set has a tag which is already being processed by a worker,
then that packet will be queued up for processing by that worker
and given to it in preference to other packets when that work next makes a request for work.
This ensures that no two packets with the same tag are processed in parallel,
and that all packets with the same tag are processed in input order.
#. Once all input packets passed to the process API have either been distributed to workers
or been queued up for a worker which is processing a given tag,
then the process API returns to the caller.
Other functions which are available to the distributor lcore are:
* rte_distributor_returned_pkts()
* rte_distributor_flush()
* rte_distributor_clear_returns()
Of these the most important API call is "rte_distributor_returned_pkts()"
which should only be called on the lcore which also calls the process API.
It returns to the caller all packets which have finished processing by all worker cores.
Within this set of returned packets, all packets sharing the same tag will be returned in their original order.
**NOTE:**
If worker lcores buffer up packets internally for transmission in bulk afterwards,
the packets sharing a tag will likely get out of order.
Once a worker lcore requests a new packet, the distributor assumes that it has completely finished with the previous packet and
therefore that additional packets with the same tag can safely be distributed to other workers --
who may then flush their buffered packets sooner and cause packets to get out of order.
**NOTE:**
No packet ordering guarantees are made about packets which do not share a common packet tag.
Using the process and returned_pkts API, the following application workflow can be used,
while allowing packet order within a packet flow -- identified by a tag -- to be maintained.
.. image41_png has been renamed
|packet_distributor2|
The flush and clear_returns API calls, mentioned previously,
are likely of less use that the process and returned_pkts APIS, and are principally provided to aid in unit testing of the library.
Descriptions of these functions and their use can be found in the Intel® DPDK API Reference document.
Worker Operation
----------------
Worker cores are the cores which do the actual manipulation of the packets distributed by the packet distributor.
Each worker calls "rte_distributor_get_pkt()" API to request a new packet when it has finished processing the previous one.
[The previous packet should be returned to the distributor component by passing it as the final parameter to this API call.]
Since it may be desirable to vary the number of worker cores, depending on the traffic load
i.e. to save power at times of lighter load,
it is possible to have a worker stop processing packets by calling "rte_distributor_return_pkt()" to indicate that
it has finished the current packet and does not want a new one.
.. |packet_distributor1| image:: img/packet_distributor1.png
.. |packet_distributor2| image:: img/packet_distributor2.png

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