Add new option called external PBL (page base list) to ecore_chain_alloc
for future use. Mark chain as external if external PBL is provided.
Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
This patch updates the base driver and incorporates necessary changes
required to bring in the new firmware 8.10.9.0.
In addition, it would allow driver to add new functionalities that might
be needed in future.
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Change details:
- adds new comments
- modifies some of the existing comments
- abstract code into macros
- split long lines
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
This patch adds the features to supports configuration of various Layer 2
elements, such as channels and filtering options.
Signed-off-by: Harish Patil <harish.patil@qlogic.com>
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Signed-off-by: Sony Chacko <sony.chacko@qlogic.com>
The base driver is the backend module for the QLogic FastLinQ QL4xxxx
25G/40G CNA family of adapters as well as their virtual functions (VF)
in SR-IOV context.
The purpose of the base module is to:
- provide all the common code that will be shared between the various
drivers that would be used with said line of products. Flows such as
chip initialization and de-initialization fall under this category.
- abstract the protocol-specific HW & FW components, allowing the
protocol drivers to have clean APIs, which are detached in its
slowpath configuration from the actual Hardware Software Interface(HSI).
This patch adds a base module without any protocol-specific bits.
I.e., this adds a basic implementation that almost entirely falls under
the first category.
Signed-off-by: Harish Patil <harish.patil@qlogic.com>
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Signed-off-by: Sony Chacko <sony.chacko@qlogic.com>
