679 Commits

Author SHA1 Message Date
Gaetan Rivet
00a3d8104a ethdev: remove detachable device flag
This flag is not necessary at the ether layer anymore.
Buses are able to advertise their hotplug support. The ether layer can
rely upon this capability instead of a special flag.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2017-10-26 02:33:01 +02:00
Shreyansh Jain
826b742b1c doc: update release note for DPAA PMD support
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-10-26 02:33:00 +02:00
Shahaf Shuler
93a91beef7 doc: update release notes for mlx5 driver
Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-10-26 02:33:00 +02:00
Akhil Goyal
c261d1431b security: introduce security API and framework
rte_security library provides APIs for security session
create/free for protocol offload or offloaded crypto
operation to ethernet device.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Boris Pismenny <borisp@mellanox.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Aviad Yehezkel <aviadye@mellanox.com>
2017-10-26 03:10:51 +02:00
Declan Doherty
b1ce0ad9e8 cryptodev: break dependency on PCI device bus
Removes any dependency of librte_cryptodev on the PCI device
infrastructure code and removes the functions which were virtual
device specific.

Updates QAT crypto PMD to remove dependencies on rte_cryptodev_pci.h
and replaces those calls with the new bus independent functions.

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-10-25 18:11:01 +02:00
Declan Doherty
f2f020d210 cryptodev: break dependency on virtual device bus
Removes any dependency of librte_cryptodev on the virtual device
infrastructure code and removes the functions which were virtual
device specific.

Updates all virtual PMDs to remove dependencies on rte_cryptodev_vdev.h
and replaces those calls with the new bus independent functions.

Due to these changes, the cryptodev ABI version gets bumped.

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Tested-by: Tomasz Duszynski <tdu@semihalf.com>
2017-10-25 18:11:01 +02:00
Declan Doherty
9e6edea418 cryptodev: add APIs to assist PMD initialisation
Adds new PMD assist functions which are bus independent for driver to
create and destroy new device instances.

Also includes function to parse parameters which can be passed to
driver on device initialisation.

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-10-25 18:11:01 +02:00
Ferruh Yigit
be41ac2a33 flow_classify: introduce flow classify library
The following APIs's are implemented in the
librte_flow_classify library:

rte_flow_classifier_create
rte_flow_classifier_free
rte_flow_classifier_query
rte_flow_classify_table_create
rte_flow_classify_table_entry_add
rte_flow_classify_table_entry_delete

The following librte_table API's are used:
f_create to create a table.
f_add to add a rule to the table.
f_del to delete a rule from the table.
f_free to free a table
f_lookup to match packets with the rules.

The library supports counting of IPv4 five tupple packets only,
ie IPv4 UDP, TCP and SCTP packets.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>
Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
2017-10-24 22:26:54 +02:00
Cristian Dumitrescu
8b05d0be6a table: update library version
Updated map file to current API and bumped up ABI version.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2017-10-24 13:38:31 +02:00
Olivier Matz
091eaac258 log: remove deprecated functions
Remove rte_set_log_level(), rte_get_log_level(),
rte_set_log_type(), and rte_get_log_type().

Also update librte_eal.so version in docuementation.
The LIBABIVER variable in eal has already been modified in
commit f26ab687a74f ("eal: remove Xen dom0 support").

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
2017-10-24 01:24:21 +02:00
Thomas Monjalon
1fb9730997 doc: fix highlight of bumped libs in release notes
The libraries which have their ABI version increased in this release
must be prepended with a + sign to make them appear clearly.

Fixes: f8244c6399d9 ("ethdev: increase port id range")
Fixes: ec51443cc99a ("gso: add Generic Segmentation Offload API framework")

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Zhiyong Yang <zhiyong.yang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-10-23 22:35:36 +02:00
Tomasz Duszynski
8a61c83af2 crypto/mrvl: add mrvl crypto driver
Add support for the Marvell Security Crypto Accelerator EIP197.
Driver is based on external, publicly available, Marvell MUSDK
library that provides access to the hardware with minimum overhead
and high performance.

Driver comes with support for the following features:

* Symmetric crypto
* Sym operation chaining
* AES CBC (128)
* AES CBC (192)
* AES CBC (256)
* AES CTR (128)
* AES CTR (192)
* AES CTR (256)
* 3DES CBC
* 3DES CTR
* MD5
* MD5 HMAC
* SHA1
* SHA1 HMAC
* SHA256
* SHA256 HMAC
* SHA384
* SHA384 HMAC
* SHA512
* SHA512 HMAC
* AES GCM (128)

Driver was engineered cooperatively by Semihalf and Marvell teams.

Semihalf:
Jacek Siuda <jck@semihalf.com>
Tomasz Duszynski <tdu@semihalf.com>

Marvell:
Dmitri Epshtein <dima@marvell.com>
Natalie Samsonov <nsamsono@marvell.com>

Signed-off-by: Jacek Siuda <jck@semihalf.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
2017-10-12 15:22:39 +01:00
Akhil Goyal
bf551c9675 doc: add NXP DPAA SEC
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-10-12 15:22:39 +01:00
Arek Kusztal
ab56c4d9ed crypto/qat: support AES-CCM
This patch adds AES-CCM AEAD cipher and hash algorithm to
Intel QuickAssist Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2017-10-12 15:22:30 +01:00
Pablo de Lara
1a4998dc4d crypto/openssl: support AES-CCM
Add support to AES-CCM, for 128, 192 and 256-bit keys.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2017-10-12 15:22:07 +01:00
Pablo de Lara
c1734807fc crypto/openssl: support DES-CBC
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
2017-10-12 15:14:44 +01:00
Pablo de Lara
ade02f0f3e crypto/aesni_mb: support DES
The Multi-buffer library now supports DES-CBC
and DES-DOCSISBPI algorithms, so this commit
extends adds support for them in the PMD.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Reviewed-by: Radu Nicolau <radu.nicolau@intel.com>
2017-10-12 15:14:06 +01:00
Pablo de Lara
2ac67c3283 test/crypto: remove crypto perf tests
Since the crypto perf application is flexible enough
to cover all the crypto performance tests, these are not needed
anymore, so they will be removed to avoid duplications.
Besides, the crypto perf application gives the user more options
to get performance, for every single supported algorithm,
such as varying the buffer size as the user wants.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2017-10-12 15:13:19 +01:00
Anatoly Burakov
96dfeb609b app/crypto-perf: add new PMD benchmarking mode
This patch adds a new benchmarking mode, which is intended for
microbenchmarking individual parts of the cryptodev framework,
specifically crypto ops alloc-build-free, cryptodev PMD enqueue
and cryptodev PMD dequeue.

It works by first benchmarking crypto operation alloc-build-free
loop (no enqueues/dequeues happening), and then benchmarking
enqueue and dequeue separately, by first completely filling up the
TX queue, and then completely draining the RX queue.

Results are shown as cycle counts per alloc/build/free, PMD enqueue
and PMD dequeue.

One new test mode is added: "pmd-cyclecount"
  (called with --ptest=pmd-cyclecount)

New command-line argument is also added:
  --pmd-cyclecount-delay-ms: this is a pmd-cyclecount-specific parameter
      that controls the delay between enqueue and dequeue. This is
      useful for benchmarking hardware acceleration, as hardware may
      not be able to keep up with enqueued packets. This parameter
      can be increased if there are large amounts of dequeue
      retries.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Reviewed-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-10-12 15:13:18 +01:00
Anatoly Burakov
82982e1766 crypto/qat: enable Tx tail writes coalescing
Don't write CSR tail until we processed enough TX descriptors.

To avoid crypto operations sitting in the TX ring indefinitely,
the "force write" threshold is used:
 - on TX, no tail write coalescing will occur if number of inflights
   is below force write threshold
 - on RX, check if we have a number of crypto ops enqueued that is
   below force write threshold that are not yet submitted to
   processing.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-10-12 15:12:46 +01:00
Anatoly Burakov
571365dd4c crypto/qat: enable Rx head writes coalescing
Don't write CSR head until we processed enough RX descriptors.
Also delay marking them as free until we are writing CSR head.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-10-12 15:12:20 +01:00
Anatoly Burakov
0a081a5fd2 crypto/qat: remove atomics
Replacing atomics in the QAT driver with simple 16-bit integers for
number of inflight packets.

This adds a new limitation to the QAT driver: each queue pair is
now explicitly single-threaded.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-10-12 15:11:35 +01:00
Pablo de Lara
effd3b9fcf cryptodev: allocate driver structure statically
When register a crypto driver, a cryptodev driver
structure was being allocated, using malloc.
Since this call may fail, it is safer to allocate
this memory statically in each PMD, so driver registration
will never fail.

Coverity issue: 158645
Fixes: 7a364faef185 ("cryptodev: remove crypto device type enumeration")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Reviewed-by: Kirill Rybalchenko <kirill.rybalchenko@intel.com>
2017-10-12 15:10:40 +01:00
Matan Azrad
d5b0924ba6 ethdev: add return value to stats get dev op
The stats_get dev op API doesn't include return value, so PMD cannot
return an error in case of failure at stats getting process time.

Since PCI devices can be removed and there is a time between the
physical removal to the RMV interrupt, the user may get invalid stats
without any indication.

This patch changes the stats_get API return value to be int instead of
void.

All the net PMDs stats_get dev ops are adjusted by this patch.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-10-12 01:52:49 +01:00
Jasvinder Singh
cc6d421574 net/softnic: add softnic PMD
Add SoftNIC PMD to provide SW fall-back for ethdev APIs.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2017-10-12 01:52:38 +01:00
David Harton
80d0ff81e8 ethdev: add return code to stats reset function
Some devices do not support reset of eth stats.  An application may
need to know not to clear shadow stats if the device cannot.

rte_eth_stats_reset is updated to provide a return code to share
whether the device supports reset or not.

Signed-off-by: David Harton <dharton@cisco.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-10-12 01:36:58 +01:00
Stephen Hemminger
2cb43002af ethdev: increase device internal name length
Allow sufficient space for UUID in string form (36+1).
Needed to use UUID with Hyper-V.

Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-10-12 01:36:58 +01:00
Tomasz Duszynski
0ddc9b815b net/mrvl: add net PMD skeleton
Add mrvl net pmd driver skeleton providing base for the further
development. Besides the basic functionality QoS configuration is
introduced as well.

Signed-off-by: Jacek Siuda <jck@semihalf.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
2017-10-12 01:36:58 +01:00
Mark Kavanagh
70e737e448 gso: support GRE GSO
This patch adds GSO support for GRE-tunneled packets. Supported GRE
packets must contain an outer IPv4 header, and inner TCP/IPv4 headers.
They may also contain a single VLAN tag. GRE GSO doesn't check if all
input packets have correct checksums and doesn't update checksums for
output packets. Additionally, it doesn't process IP fragmented packets.

As with VxLAN GSO, GRE GSO uses a two-segment MBUF to organize each
output packet, which requires multi-segment mbuf support in the TX
functions of the NIC driver. Also, if a packet is GSOed, GRE GSO reduces
its MBUF refcnt by 1. As a result, when all of its GSOed segments are
freed, the packet is freed automatically.

Signed-off-by: Mark Kavanagh <mark.b.kavanagh@intel.com>
Signed-off-by: Jiayu Hu <jiayu.hu@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2017-10-12 01:36:57 +01:00
Mark Kavanagh
b058d92ea9 gso: support VxLAN GSO
This patch adds a framework that allows GSO on tunneled packets.
Furthermore, it leverages that framework to provide GSO support for
VxLAN-encapsulated packets.

Supported VxLAN packets must have an outer IPv4 header (prepended by an
optional VLAN tag), and contain an inner TCP/IPv4 packet (with an optional
inner VLAN tag).

VxLAN GSO doesn't check if input packets have correct checksums and
doesn't update checksums for output packets. Additionally, it doesn't
process IP fragmented packets.

As with TCP/IPv4 GSO, VxLAN GSO uses a two-segment MBUF to organize each
output packet, which mandates support for multi-segment mbufs in the TX
functions of the NIC driver. Also, if a packet is GSOed, VxLAN GSO
reduces its MBUF refcnt by 1. As a result, when all of its GSO'd segments
are freed, the packet is freed automatically.

Signed-off-by: Mark Kavanagh <mark.b.kavanagh@intel.com>
Signed-off-by: Jiayu Hu <jiayu.hu@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2017-10-12 01:36:57 +01:00
Jiayu Hu
119583797b gso: support TCP/IPv4 GSO
This patch adds GSO support for TCP/IPv4 packets. Supported packets
may include a single VLAN tag. TCP/IPv4 GSO doesn't check if input
packets have correct checksums, and doesn't update checksums for
output packets (the responsibility for this lies with the application).
Additionally, TCP/IPv4 GSO doesn't process IP fragmented packets.

TCP/IPv4 GSO uses two chained MBUFs, one direct MBUF and one indrect
MBUF, to organize an output packet. Note that we refer to these two
chained MBUFs as a two-segment MBUF. The direct MBUF stores the packet
header, while the indirect mbuf simply points to a location within the
original packet's payload. Consequently, use of the GSO library requires
multi-segment MBUF support in the TX functions of the NIC driver.

If a packet is GSO'd, TCP/IPv4 GSO reduces its MBUF refcnt by 1. As a
result, when all of its GSOed segments are freed, the packet is freed
automatically.

Signed-off-by: Jiayu Hu <jiayu.hu@intel.com>
Signed-off-by: Mark Kavanagh <mark.b.kavanagh@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Tested-by: Lei Yao <lei.a.yao@intel.com>
2017-10-12 01:36:57 +01:00
Jiayu Hu
ec51443cc9 gso: add Generic Segmentation Offload API framework
Generic Segmentation Offload (GSO) is a SW technique to split large
packets into small ones. Akin to TSO, GSO enables applications to
operate on large packets, thus reducing per-packet processing overhead.

To enable more flexibility to applications, DPDK GSO is implemented
as a standalone library. Applications explicitly use the GSO library
to segment packets. To segment a packet requires two steps. The first
is to set proper flags to mbuf->ol_flags, where the flags are the same
as that of TSO. The second is to call the segmentation API,
rte_gso_segment(). This patch introduces the GSO API framework to DPDK.

rte_gso_segment() splits an input packet into small ones in each
invocation. The GSO library refers to these small packets generated
by rte_gso_segment() as GSO segments. Each of the newly-created GSO
segments is organized as a two-segment MBUF, where the first segment is a
standard MBUF, which stores a copy of packet header, and the second is an
indirect MBUF which points to a section of data in the input packet.
rte_gso_segment() reduces the refcnt of the input packet by 1. Therefore,
when all GSO segments are freed, the input packet is freed automatically.
Additionally, since each GSO segment has multiple MBUFs (i.e. 2 MBUFs),
the driver of the interface which the GSO segments are sent to should
support to transmit multi-segment packets.

The GSO framework clears the PKT_TX_TCP_SEG flag for both the input
packet, and all produced GSO segments in the event of success, since
segmentation in hardware is no longer required at that point.

Signed-off-by: Jiayu Hu <jiayu.hu@intel.com>
Signed-off-by: Mark Kavanagh <mark.b.kavanagh@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2017-10-12 01:36:57 +01:00
Harry van Haaren
dfb7f82a5a eventdev: bump library version
This commit bumps the library version to refect the ABI change
caused by removing the individual rte_event_port_count, queue_count,
and other get functions. These functions are superseded by the
get-attribute style API, which allows fetching values without API/ABI
changes.

Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-10-10 18:31:44 +02:00
Maxime Coquelin
69c90e98f4 vhost: enable IOMMU support
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Yuanhan Liu <yliu@fridaylinux.org>
2017-10-10 15:53:27 +02:00
Jianfeng Tan
f26ab687a7 eal: remove Xen dom0 support
We remove xen-specific code in EAL, including the option --xen-dom0,
memory initialization code, compiling dependency, etc.

Related documents are removed or updated, and bump the eal library
version.

Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
2017-10-09 01:54:29 +02:00
Jianfeng Tan
a7cb2e20d2 mem: remove API to get physical address in dom0
Previously, to get MFN address in dom0, this API is a wrapper to
obtain the "physical address".

As we will removed xen dom0 support, this API is not necessary.

Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2017-10-09 01:52:37 +02:00
Yipeng Wang
55694b2a9f doc: add membership documentation
This patch adds the documentation for membership library.

Signed-off-by: Yipeng Wang <yipeng1.wang@intel.com>
Reviewed-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-10-09 00:23:59 +02:00
Santosh Shukla
f9caf23ba2 doc: remove mempool deprecation notice
Removed mempool deprecation notice and
updated change info in release_17.11.

Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2017-10-06 21:57:56 +02:00
Zhiyong Yang
f8244c6399 ethdev: increase port id range
Extend port_id definition from uint8_t to uint16_t in lib and drivers
data structures, specifically rte_eth_dev_data. Modify the APIs,
drivers and app using port_id at the same time.

Fix some checkpatch issues from the original code and remove some
unnecessary cast operations.

release_17_11 and deprecation docs have been updated in this patch.

Signed-off-by: Zhiyong Yang <zhiyong.yang@intel.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-10-06 18:23:25 +02:00
Ajit Khaparde
de8a402ae8 doc: update release notes for bnxt
Update release doc briefly describing updates to bnxt PMD.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2017-10-06 02:49:49 +02:00
Alejandro Lucero
b9b21e0eec doc: update release notes with NFP PF support
Signed-off-by: Alejandro Lucero <alejandro.lucero@netronome.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-10-06 02:49:48 +02:00
Ferruh Yigit
5693b81183 doc: add missing PMD versions in release notes
These PMDs must be versioned because they have an API.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Zhiyong Yang <zhiyong.yang@intel.com>
2017-10-04 23:34:11 +02:00
Harry van Haaren
c4c6f68229 doc: add notes on service cores API updates
Add a section on the service cores API changes to 17.11 release notes.

Suggested-by: Neil Horman <nhorman@tuxdriver.com>
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
2017-09-15 13:46:57 +02:00
Harry van Haaren
3cf5eb1546 service: fix and refactor atomic service accesses
This commit fixes an issue in the service runner function,
where the atomic value was not cleared on exiting the service
function. This resulted in future attempts to run the service
to appear like the function was running, however it was in
reality deadlocked.

This commit refactors the atomic handling to be more readable,
by splitting the implementation code into a new static inline
function. The remaining flow control of atomics in the existing
function is refactored for readability.

Fixes: 21698354c832 ("service: introduce service cores concept")

Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
2017-09-15 13:46:24 +02:00
John McNamara
651c1cd775 doc: add template release notes for 17.11
Add template release notes for DPDK 17.11 with inline
comments and explanations of the various sections.

Signed-off-by: John McNamara <john.mcnamara@intel.com>
2017-08-10 10:09:48 +02:00
Jerin Jacob
945081a76a eventdev: bump library version
Bumping the library version to reflect the ABI change, where
rte_event_pmd_pci_probe(), rte_event_pmd_pci_remove(),
rte_event_pmd_vdev_init(), rte_event_pmd_vdev_uninit()
functions removed from the library.

Fixes: b1b3d9f90502 ("eventdev: make vdev init and uninit functions optional")
Fixes: 9a8269d56942 ("eventdev: make PCI probe and remove functions optional")

Reported-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-08-08 20:01:39 +02:00
Jerin Jacob
17f2ea8712 doc: add eventdev lib in 17.05 release notes
librte_eventdev.so.1 was introduced in v17.05, and it missed to
update in release_17_05 release notes.

Fixes: 222555480a7f9 ("version: 17.05.0")
Cc: stable@dpdk.org

Reported-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-08-08 20:01:39 +02:00
Gaetan Rivet
1667331fbc eal: bump ABI version
1. PCI domain field in PCI address structure grew from 16 to 32 bits.

   commit: 463ced957c3f ("pci: increase domain storage to 32 bits")

2. rte_bus structure gaining new ops.

   commit: 3a8f0bc68a90 ("bus: add method to find device")
   commit: 7c8810f43f6e ("bus: introduce device plug/unplug")
   commit: 609eb7dde6d0 ("bus: introduce parsing functionality")
   commit: 98eb4b845c1a ("bus: introduce scan policies")

3. rte_devargs structure having been mostly rewritten.

   commit: f3a1188cee4a ("devargs: make device representation generic")
   commit: 47828c5f3bc3 ("devargs: parse bus info")
   commit: 39f403e0d5bb ("devargs: restore device type API")

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-08-08 20:01:39 +02:00
Cristian Dumitrescu
0ef87a17e3 doc: announce API change for meter library
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
2017-08-08 12:30:54 +02:00
Pablo de Lara
b17def6c2b doc: announce API change in crypto driver allocation
rte_cryptodev_allocate_driver() function gets one parameter
(rte_driver), as the cryptodev_driver structure is
allocated inside the function with rte_malloc.

This function is called from a constructor function,
when crypto PMDs are registered.
If malloc fails, there is no way to recover from it,
so it is better to allocate this structure
statically, in each PMD.

Therefore, it is required to add an extra parameter in
this function, to also get a pointer to this structure.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2017-08-08 12:21:32 +02:00