22004 Commits

Author SHA1 Message Date
Pete Spreadborough
0ac8e95d3c net/bnxt: add TruFlow message handlers
- Add bnxt message functions for truflow APIs

Signed-off-by: Pete Spreadborough <peter.spreadborough@broadcom.com>
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-04-21 13:57:08 +02:00
Randy Schacher
3684541b86 net/bnxt: update HWRM prep to use pointer
- Change HWRM_PREP to use pointer and use the full
  HWRM enum

Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-04-21 13:57:08 +02:00
Ajit Khaparde
cd161800e9 net/bnxt: update HSI structure
- Add most recent bnxt dpdk header.
- HWRM version updated to 1.10.1.30

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
2020-04-21 13:57:08 +02:00
Yunjian Wang
dc1a4d86c6 net/tap: fix unexpected link handler
The nic's interrupt source has some active handler, which maybe call
tap_dev_intr_handler() to set link handler. We should cancel the link
handler before close fd to prevent executing the link handler. It
triggers segfault.

Call Trace:
   0x00007f15e08dad99 in __rte_panic (Error adding fd %d epoll_ctl, %s\n")
   0x00007f15e08e9b87 in eal_intr_thread_main ()
   0x00007f15e249be15 in start_thread ()
   0x00007f15d5322f9d in clone ()

Fixes: c0bddd3a057f ("net/tap: add link status notification")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:08 +02:00
Bernard Iremonger
14faf8e998 net/i40e: add ESP patterns
Add ESP patterns to i40e_flow_parse_rss_pattern().
Update i40e PMD user guide with download link for esp-ah.pkg file.

Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:08 +02:00
Bernard Iremonger
d3bd79713b app/testpmd: handle RSS offload types ESP and AH
Parse RSS offload types ESP and AH add printf for rss_hf

Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-04-21 13:57:08 +02:00
Bernard Iremonger
496a253c79 ethdev: add RSS offload types for ESP and AH
Add ETH_RSS_ESP and ETH_RSS_AH macros

Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>
Reviewed-by: Beilei Xing <beilei.xing@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:08 +02:00
Jakub Grajciar
0a77baed7b net/memif: enable promiscuous mode
Enable promisc mode

Signed-off-by: Jakub Grajciar <jgrajcia@cisco.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:08 +02:00
Yunjian Wang
cbf8909b3a net/tap: fix fd leak on creation failure
When eth_dev_tap_create() is failed, nlsk_fd and ka_fd won't be closed
thus leading fds leak. Zero is a valid fd. Ultimately leads to a valid
fd was closed by mistake.

Fixes: bf7b7f437b49 ("net/tap: create netdevice during probing")
Fixes: cb7e68da630a ("net/tap: fix cleanup on allocation failure")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2020-04-21 13:57:08 +02:00
Yunjian Wang
f9d5da4ab6 net/tap: fix file close on remove
The internal structure is freed and set to NULL in the
rte_eth_dev_release_port() and zero is a valid fd. Ultimately
leads to a valid fd was closed by mistake.

Fixes: 3101191c63ab ("net/tap: fix device removal when no queue exist")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2020-04-21 13:57:08 +02:00
Yunjian Wang
cc6cf04f59 net/tap: fix check for mbuf number of segment
Now the rxq->pool is mbuf concatenation, but its nb_segs is 1. When
conducting some sanity checks on the mbuf with debug enabled, it fails.

Fixes: 0781f5762cfe ("net/tap: support segmented mbufs")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2020-04-21 13:57:08 +02:00
Yunjian Wang
710aa42790 net/tap: fix mbuf and mem leak during queue release
For the tap PMD, we should release mbufs and iovecs from the Rx queue
when closing device. In order to remove duplicated code,
rte_pmd_tap_remove() calls tap_dev_close().

Fixes: 0781f5762cfe ("net/tap: support segmented mbufs")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2020-04-21 13:57:08 +02:00
Yunjian Wang
24cb500c17 net/tap: fix mbuf double free when writev fails
When the tap_write_mbufs() function return with break, mbuf was freed
without increasing num_packets, which could cause applications to free
the mbuf again. And the pmd_tx_burst() function should returns the
number of original packets it actually sent excluding tso mbufs.

Fixes: 9396ad334672 ("net/tap: fix reported number of Tx packets")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2020-04-21 13:57:08 +02:00
Xiaoyu Min
889cf609e5 net/mlx5: fix validation of push VLAN without full mask
Due the limitation of HW, when PMD create push VLAN action it needs to
know what exactly the value of VID/PCP.

PMD try to figure out them via:
  - of_set_vlan_vid/pcp actions
  - VLAN item in pattern
If none of above is provided, default value - zero is used.

However user will write rule like [1] which match on a range of VID and
without of_set_vlan_vid action and expect the VID will inherit from
original packet. This is not supported by HW currently. PMD will set VID
to default value - zero because it cannot figure out the exact value of
VID from VLAN item.

This is sort of misleading for some users.

In order to avoid this, PMD will spit out error for rule like [1] to
force user to provide explicit VID/PCP for new pushed VLAN headers.

[1]: testpmd> flow create 2 ingress transfer group 0 priority 3 pattern
               eth / vlan vid spec 2859 vid prefix 4 / ipv4 / end
	       actcions  of_push_vlan ethertype 0x88A8 /
	       of_set_vlan_pcp vlan_pcp 6 / port_id id 0 / end

Fixes: 9aee7a8418d4 ("net/mlx5: support push flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Reviewed-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-04-21 13:57:08 +02:00
Xiaoyu Min
7162c02d7b net/mlx5: fix push VLAN action to use item info
Currently when PMD create push VLAN action it need to provide VID to HW
and PMD get VID value from item VLAN in pattern if there is no
of_set_vlan_vid action following.

When user create rule like [1], which has of_set_vlan_vid action
before of_push_vlan, the intention is to modify VID on existing VLAN
header and push a new VLAN header with VID _inherit_ from the previous
of_set_vlan_vid.

Currently the above is not covered by PMD, PMD always fetch the VLAN
information from item for of_push_vlan action.

Fix it by only fetch VLAN information from item when there is no
previous of_set_vlan_vid action.

[1]: testpmd> flow create 2 ingress transfer group 1 priority 3 pattern
                eth / vlan vid is 2731 / ipv4 / end actions
		of_set_vlan_vid vlan_vid 3209 / of_push_vlan ethertype
		0x88A8 / port_id id 1 / end

Fixes: b8c0372bc5ac ("net/mlx5: fix set VLAN ID/PCP in new header")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Reviewed-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-04-21 13:57:08 +02:00
John Daley
45a40f98b3 net/enic: allow multiple mark and flag actions
1400 series adapters support multiple MARK and FLAG action types.
  e.g.: mark id 10 / queue index 2 / mark id 11 / queue index 3

Remove the restriction in the Flow Manager implementation.

Signed-off-by: John Daley <johndale@cisco.com>
Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
2020-04-21 13:57:08 +02:00
John Daley
510aecab17 net/enic: support flow API RSS ranges on outer headers
Support rte_flow RSS action on outer headers (level 0). RSS ranges on
the non-default port is OK.
Restrictions:
 - The RETA is ignored. The hash function is simply applied across
   the RSS queue range.
 - The queues used in the RSS group must be sequential.
 - There is a performance hit if the number of queues is not a power
   of 2.

Signed-off-by: John Daley <johndale@cisco.com>
Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
2020-04-21 13:57:08 +02:00
John Daley
285fd7c446 net/enic: change Rx queue ordering to enable RSS action
Each RTE RQ is represented on enic as a Start Of Packet (SOP) queue
and overflow queue (DATA). There were arranged SOP0/DATA0, SOP1/DATA1,..
But need to be arranged SOP0, SOP1,..., DATA0, DATA1... so that
rte_flow RSS queue ranges work.

Signed-off-by: John Daley <johndale@cisco.com>
Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
2020-04-21 13:57:08 +02:00
John Daley
6faf81f1d2 net/enic: update flow manager API
Update the VIC Flow Manager API. The extensions will allow support for:
  - Decap and strip VLAN
  - Remove outer VLAN
  - Set Egress port
  - Set VLAN when replicating encapped packets
  - RSS queue ranges on outer header

Signed-off-by: John Daley <johndale@cisco.com>
Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
2020-04-21 13:57:08 +02:00
Hyong Youb Kim
4bcbbb430f net/enic: fix flow action reordering
The current implementation produces wrong ordering for several cases
like these:

1. mark, decap, steer
Current: steer, mark, decap
Correct: mark, steer, decap

2. decap, steer, steer
Current: steer, steer, decap
Correct: steer, decap, steer

Simplify the logic and swap 1st steer and decap.
Also, allow just one decap action per flow.

Fixes: ea7768b5bba8 ("net/enic: add flow implementation based on Flow Manager API")
Cc: stable@dpdk.org

Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Signed-off-by: John Daley <johndale@cisco.com>
2020-04-21 13:57:08 +02:00
Vu Pham
b8dc6b0e29 common/mlx5: refactor memory management
Refactor common memory btree and cache management to common driver.
Replace some input parameters of MR APIs to more common data structure
like PD, port_id, share_cache,... so that multiple PMD drivers can
use those MR APIs.

Modify mlx5 net pmd driver to use MR management APIs from common driver.

Signed-off-by: Vu Pham <vuhuong@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-04-21 13:57:08 +02:00
Vu Pham
a4de9586ac common/mlx5: refactor IPC handling from net driver
Refactor common multi-process handling codes from net PMD to common
driver. Using tuple mp_id{name, port_id} as standard input parameter
for all multi-process IPC APIs instead of using rte_eth_dev.

Modify net PMD to use multi-process APIs from common driver.

Signed-off-by: Vu Pham <vuhuong@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-04-21 13:57:08 +02:00
Suanming Mou
fe2c412ca9 net/mlx5: fix jump table leak
Currently, when translate jump action, the table reference will be
increased all the time. But when release the jump action, the table
resource reference will only be decreased when jump action is released.
It means for jump action which was referenced more than one time, the
increased table reference only decrease one time when jump action is
released.

Add table release when the jump action was not new created.

Fixes: 684b9a1b1f5c ("net/mlx5: support jump action")
Cc: stable@dpdk.org

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-04-21 13:57:08 +02:00
Suanming Mou
9dbaf7eef6 net/mlx5: fix meter suffix table leak
Currently, the meter suffix table is created and saved in the mlx5
shared struct. It causes the suffix table will never be released
even without any meter rules.

Move the suffix table to meter domain struct to help the suffix table
be released when all the meter rules are destroyed.

Fixes: 46a5e6bc6a85 ("net/mlx5: prepare meter flow tables")
Cc: stable@dpdk.org

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-04-21 13:57:08 +02:00
Alexander Kozyrev
775fc97b01 net/mlx5: add multi-segment packets in MPRQ mode
The multi-stride operations now allow to reduce a stride size
while supporting Jumbo frames. That means that it is possible
to have mbufs configured with a size smaller than the whole
packet received. It is not an issue during normal MPRQ operations
since we attach external buffers instead of copying the data
into the mbuf itself. But it is not the case in "emergency mode"
when we have to copy every packet because of no more external
mbufs are available. Assemble a multi-segment packet to overcome
this issue in case scatter mode is enabled, drop a packet if not.

Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:08 +02:00
Alexander Kozyrev
bd0d5930bf net/mlx5: enable MPRQ multi-stride operations
MPRQ feature should be updated to allow a packet to be received
into multiple strides in order to support the MTU exceeding 8KB.
Special care is needed to prevent the headroom corruption in the
multi-stride mode since the headroom space is borrowed by the PMD
from the tail of the preceding stride. Copy the whole packet into
a separate mbuf in this case or just the overlapping data if the
Rx scattering is supported by an application.

Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:08 +02:00
Alexander Kozyrev
ecb160456a net/mlx5: add device parameter for MPRQ stride size
Define a device parameter to configure log 2 of a stride size for MPRQ
- mprq_log_stride_size. User is able to specify a stride size in a range
allowed by an underlying hardware. The default stride size is defined as
2048 bytes to encompass most commonly used packet sizes in the Internet
(MTU 1518 and less) and will be used in case a maximum configured packet
size cannot fit into the largest possible stride size. Otherwise a
stride size is set to a large enough value to encompass a whole packet.

Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:08 +02:00
Chenxu Di
feaae285b3 net/i40e: support hash configuration in RSS flow
This patch supports:

- Symmetric hash configuration
- Hash input set configuration

Signed-off-by: Chenxu Di <chenxux.di@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:08 +02:00
Wei Zhao
99d8ba79ef net/ice/base: force switch to use different recipe
When we use profile rule as switch rule to download, if
we download 2 different rules one by one, there will be
rejection from function ice_aq_sw_rules(), for example:

"flow create 0 priority 0 ingress pattern eth / ipv6 / ah
/ end actions queue index 3 / end"
"flow create 0 priority 0 ingress pattern eth / ipv6 / esp
/ end actions queue index 2 / end"

That is because the 2 rules has the same s_rule input set
except action queue index, so it will be rejected by
hardware. So we have to use different recipes for them.

Also, we need to add recipe_id to keep record of recipe
index, which will be used in rule remove, if not, there
will be error when search recipe in function
ice_rem_adv_rule() if we create 2 or more profile rule.
For example:

"flow create 0 priority 0 ingress pattern eth / ipv4 / udp
/ pfcp s_field is 1 / end actions queue index 4 / end"
"flow create 0 priority 0 ingress pattern eth / ipv4 / udp
/ pfcp s_field is 0 / end actions queue index 5 / end"

then,

"flow flush 0"

you will find only the first rule will be delete,
because ice_find_recp() will always return recipe
id of the first rule.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Yuan Peng <yuan.peng@intel.com>
2020-04-21 13:57:08 +02:00
Wei Zhao
7e9c855842 net/ice/base: add mask check to find switch recipe
In order to find accurate recipe for switch filter, we
need to add mask as an element when searching for recipe.
If we create different rules with the same input set, but
using different masks, then proper recipes should use
those different mask.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Nannan Lu <nannan.lu@intel.com>
2020-04-21 13:57:08 +02:00
Wei Zhao
312acce5e2 net/ice/base: check number of chained recipes
When we add some long switch rule, we need check the
number of final recipe number, if it is large than
ICE_MAX_CHAIN_RECIPE, we should refuse this rule.
For example:

"flow create 0 ingress pattern eth / ipv6
src is CDCD:910A:2222:5498:8475:1111:3900:1536
dst is CDCD:910A:2222:5498:8475:1111:3900:2022
tc is 3 / udp dst is 45 / end actions queue index 2 / end"

This rule will consume 6 recipe, if it is not refused, it
will cause the following code over write of lkup_indx and mask.

LIST_FOR_EACH_ENTRY(entry, &rm->rg_list, ice_recp_grp_entry,
		l_entry) {
	last_chain_entry->fv_idx[i] = entry->chain_idx;
	buf[recps].content.lkup_indx[i] = entry->chain_idx;
	buf[recps].content.mask[i++] = CPU_TO_LE16(0xFFFF);
	..........
}

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Nannan Lu <nannan.lu@intel.com>
2020-04-21 13:57:08 +02:00
Gavin Hu
024225981c net/i40e: restrict pointer aliasing for NEON
Restrict pointer aliasing to optimize the code generated.

The patch showed ~3% performance uplift on Arm N1SDP platform, and no
degradation on ThunderX2. The tet case is RFC2544 zero-loss L2
forwarding running testpmd.

[1] https://gcc.gnu.org/onlinedocs/gcc-4.8.5/gcc/Restricted-Pointers.html

Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
2020-04-21 13:57:08 +02:00
Gavin Hu
6b50c489a3 net/i40e: relax barrier in Tx for NEON
To keep ordering of mixed accesses, 'DMB OSH' is sufficient.
'DSB' inside the I40E_PCI_REG_WRITE is overkill.[1]

This patch fixes by replacing with just sufficient barriers in the
normal PMD and vPMD.

It showed 7% performance uplift on ThunderX2 and 4% on Arm N1SDP.
The test case is the RFC2544 zero-loss test running testpmd.

[1] http://inbox.dpdk.org/dev/CALBAE1M-ezVWCjqCZDBw+MMDEC4O9
qf0Kpn89EMdGDajepKoZQ@mail.gmail.com

Fixes: ae0eb310f253 ("net/i40e: implement vector PMD for ARM")
Cc: stable@dpdk.org

Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:08 +02:00
Alvin Zhang
746664d546 net/igc: support flow API
Below type of flows are supported:
ether-type filter, 2-tuple filter, SYN filter, RSS.
Update docs too.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:08 +02:00
Alvin Zhang
8938c4e1ee net/igc: support MAC loopback mode
Enable mac-loopback mode.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:08 +02:00
Alvin Zhang
5f266d0d8c net/igc: support VLAN
Below ops ware added:
vlan_filter_set
vlan_offload_set
vlan_tpid_set
vlan_strip_queue_set

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:08 +02:00
Alvin Zhang
bd3fcf0d0f net/igc: support RSS
Below ops are added:
reta_update
reta_query
rss_hash_update
rss_hash_conf_get

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:08 +02:00
Alvin Zhang
0d415cd8e3 net/igc: support flow control
Update feature list too.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:08 +02:00
Alvin Zhang
9417098fdf net/igc: enable Rx queue interrupts
Setup NIC to generate MSI-X interrupts.
Set the IVAR register to map interrupt causes to vectors.
Implement interrupt enable/disable functions.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:07 +02:00
Alvin Zhang
e6defdfddc net/igc: enable statistics
Enable base statistics, extend statistics and per-queue statistics.

Below ops are added:
stats_get
xstats_get
xstats_get_by_id
xstats_get_names_by_id
xstats_get_names
stats_reset
xstats_reset
queue_stats_mapping_set

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:07 +02:00
Alvin Zhang
a5aeb2b9e2 net/igc: support Rx and Tx
Below ops are added too:
mac_addr_add
mac_addr_remove
mac_addr_set
set_mc_addr_list
mtu_set
promiscuous_enable
promiscuous_disable
allmulticast_enable
allmulticast_disable
rx_queue_setup
rx_queue_release
rx_queue_count
rx_descriptor_done
rx_descriptor_status
tx_descriptor_status
tx_queue_setup
tx_queue_release
tx_done_cleanup
rxq_info_get
txq_info_get
dev_supported_ptypes_get

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:07 +02:00
Alvin Zhang
4f09bc55ac net/igc: implement device base operations
Bellow ops are implemented:
dev_configure
dev_start
dev_stop
dev_close
dev_reset
dev_set_link_up
dev_set_link_down
link_update
fw_version_get
dev_led_on
dev_led_off

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:07 +02:00
Alvin Zhang
8cb7c57d9b net/igc: support device initialization
Update base codes, add readme.
Add OS specific functions and definitions.
Add device initialization codes.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:07 +02:00
Alvin Zhang
66fde1b943 net/igc: add skeleton
Implement device detection and loading.
Add igc driver guide docs.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-21 13:57:07 +02:00
Nithin Dabilpuram
c3d30e9d75 net/octeontx2: disable unnecessary error interrupts
Disable CQ_DISABLED error interrupt in NIX_LF_ERR_INT
to fix spurious interrupts in event dev mode. Also skip
configuring RSS when RQ count is '0' because
RSS table initialization is done incorrectly due to
divide-by-zero error and it is leading to RQ_OOR error
in NIX_LF_ERR_INT.

Fixes: 83ce2880e22e ("net/octeontx2: support RSS")
Cc: stable@dpdk.org

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:07 +02:00
Souvik Dey
4ccbda1596 net/bnx2x: handle guest VLAN for SR-IOV
In case of bnx2xvf pmd, tx packets can support vland id in 2 ways:
1. Setting the mbuf ol_flags=PKT_TX_VLAN_PKT and passing the
vlanid in mbuf->vlan_tci.
2. The tx packet itself has the vlan id included in the packet.
The first case is working as expected but the second case where
the vlan id is included in thetx packets itself was found not
working as expected. To handle that we need to properly set the
start_bd bitfield and the vlan_or_ethertype instead of setting it
to just the ethertype in case of VF.

Signed-off-by: Souvik Dey <sodey@rbbn.com>
Acked-by: Rasesh Mody <rmody@marvell.com>
2020-04-21 13:57:07 +02:00
Souvik Dey
0d2870c4f7 net/bnx2x: add multicast MAC address filtering
Add support the set_mc_addr_list device operation in the bnx2xvf PMD.

The configured addresses are stored in the device private area, so
they can be flushed before adding new ones.
Without this v6 multicast packets were properly forwarded to the
Guest VF.

Signed-off-by: Souvik Dey <sodey@rbbn.com>
Acked-by: Rasesh Mody <rmody@marvell.com>
2020-04-21 13:57:07 +02:00
Mohsin Shaikh
00437823cb net/mlx5: use open/read/close for ib stats query
fgets(3)/fread(3)/fscanf(3) etc. use mmap(2)/munmap(2) which leads
to TLB shutdown interrupts to all DPDK app cores including RX cores.
This can cause packet drops. Use read(2)/write(2) instead.

Bugzilla ID: 440
Cc: stable@dpdk.org

Signed-off-by: Mohsin Shaikh <mohsinshaikh@niometrics.com>
Reviewed-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-04-21 13:57:07 +02:00
Bing Zhao
3ac3d8234b net/mlx5: fix index when creating flow
When creating a flow, usually the creating routine is called in
serial. No parallel execution is supported right now. The same
function will be called only once for a single flow creation.

But there is a special case that the creating routine will be called
nested. If the xmeta feature is enabled and there is FLAG / MARK in
the actions list, some metadata reg copy flow needs to be created
before the original flow is applied to the hardware.
In the flow non-cached mode, resources only for flow creation will
not be saved anymore. The memory space is pre-allocated and reused
for each flow. A global index for each device is used to indicate
the memory address of the resources. If the function is called in a
nested mode, then the index will be reset and make everything get
corrupted.

To solve this, a nested index is introduced to save the position for
the original flow creation. Currently, only one level nested call
of the flow creating routine is supported.

Fixes: e7bfa3596a0a ("net/mlx5: separate the flow handle resource")

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-04-21 13:57:07 +02:00
Thomas Monjalon
a5e5af7f20 net/mlx4: fix build with -fno-common
The variable storages of the same name are merged together
if compiled with -fcommon. This is the default.
This default behaviour allows to declare a variable in a header file and
share the variable in every .o binaries thanks to merge at link-time.

In the case of dlopen linking of the glue library, the pointer mlx4_glue
is referencing the glue functions struct and is set after calling
dlopen.

If compiling with -fno-common (default in GCC 10), the variables must be
declared as extern to avoid multiple re-definitions.
In case the glue layer is split in glue library, the variable mlx4_glue
needs to have its own storage for the rest of the PMD.

Cc: stable@dpdk.org

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:07 +02:00