32878 Commits

Author SHA1 Message Date
Sunil Kumar Kori
14f7c27aeb net/cnxk: remove restriction on VF for PFC config
Currently PFC configuration is not allowed on VFs.
Patch enables PFC configuration on VFs

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2022-06-20 19:15:41 +02:00
Satananda Burla
b50f4fbd26 net/cnxk: add SDP link status
Add SDP link status reporting

Signed-off-by: Satananda Burla <sburla@marvell.com>
2022-06-20 19:15:40 +02:00
Nithin Dabilpuram
b2c5ff1bd9 common/cnxk: fix mbox structs to avoid unaligned access
Fix mbox structs to avoid unaligned access as mbox
memory is from BAR space.

Fixes: 503b82de2cbf ("common/cnxk: add mbox request and response definitions")
Fixes: e746aec161cc ("common/cnxk: fix SQ flush sequence")
Cc: stable@dpdk.org

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-06-20 19:15:21 +02:00
Nithin Dabilpuram
cdb718b9d1 common/cnxk: enhance CPT parsing header dump
Enhance CPT parse header dump to dump fragment info
and swap pointers before printing.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-06-20 19:15:20 +02:00
Harman Kalra
cc90e35b53 common/cnxk: support same TC value across multiple queues
User may want to configure same TC value across multiple queues, but
for that all queues should have a common TL3 where this TC value will
get configured.

Changed the pfc_tc_cq_map/pfc_tc_sq_map array indexing to qid and store
TC values in the array. As multiple queues may have same TC value.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-06-20 19:15:19 +02:00
Sunil Kumar Kori
174f2f3512 common/cnxk: add PFC support for VF
Current PFC implementation does not support VFs.
This patch enables PFC on VFs too.

Also fix the config of aura.bp to be based on number
of buffers(aura.limit) and corresponding shift
value(aura.shift).

Fixes: cb4bfd6e7bdf ("event/cnxk: support Rx adapter")
Cc: stable@dpdk.org

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2022-06-20 19:15:17 +02:00
Nithin Dabilpuram
9f8f18037d common/cnxk: avoid CPT backpressure due to errata
Avoid enabling CPT backpressure due to errata where
backpressure would block requests from even other
CPT LF's. Also allow CQ size >=16K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-06-20 19:15:16 +02:00
Nithin Dabilpuram
75315881c2 common/cnxk: use computed value for WQE skip
Use computed value for WQE skip instead of a hard-coded value.
WQE skip needs to be number of 128B lines to accommodate rte_mbuf.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-06-20 19:15:15 +02:00
Bruce Richardson
3d171da6e7 common/cnxk: add include for macro definition
The header file "roc_io.h" uses the "__plt_always_inline" macro but
don't include "roc_platform.h" to get the definition of it. This
inclusion is not necessary for compilation, but the lack of it can
confuse some indexers - such as those in eclipse, which reports the
lines:

"static __plt_always_inline uint64_t"

as possible definitions of a variable called "uint64_t". This confusion
leads to uint64_t being flagged as an unknown type in all other parts of
the project being indexed, e.g. across all of DPDK code.

Adding in the include of roc_platform.h makes it clear to the indexer
that those lines are  part of a function definition, and that allows
eclipse to correctly recognise uint64_t as a type from stdint.h

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-06-17 15:15:19 +02:00
Satheesh Paul
22d9d34882 common/cnxk: add ROC API to free MCAM entry
Add ROC API to free the given MCAM entry. If the MCAM
entry has flow counter associated, this API will clear
and free the flow counter.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-06-17 14:52:42 +02:00
Harman Kalra
d41b53c5be common/cnxk: support CNF10KB SoC
Support for CNF10KB SoC by adding its PCI device ID.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-06-17 14:18:33 +02:00
Rahul Bhansali
eeea2f4e17 common/cnxk: fix CN103XX subsystem device ID
Fix the subsystem device ID for CN103XX.

Fixes: dd462f68f04a ("common/cnxk: support CN103XX platform")
Cc: stable@dpdk.org

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
2022-06-17 13:56:13 +02:00
Rakesh Kudurumalla
825bd1d9d8 common/cnxk: update extra stats for inline device
Inline device's NIX RX and RQ stats are updated
on ethdev extra stats

Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
2022-06-16 13:49:52 +02:00
Ashwin Sekhar T K
2d807166e1 mempool/cnxk: support optional wait when counting
When counting the batch allocated pointers in cnxk mempool driver,
currently it always waits for in-flight batch operations to finish.
Add a provision to make this waiting optional.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2022-06-15 21:32:56 +02:00
Hanumanth Pothula
5f27618bea common/cnxk: handle ROC model init failure
Return with error on fail to initialize ROC model.

Fixes: 014a9e222bac ("common/cnxk: add model init and IO handling API")
Cc: stable@dpdk.org

Signed-off-by: Hanumanth Pothula <hpothula@marvell.com>
2022-06-15 19:55:42 +02:00
Rahul Bhansali
bde0d30aed common/cnxk: print NIX inline outbound CPT LF registers
This add the support to dump NIX inline outbound CPT LF
registers.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2022-06-15 14:25:50 +02:00
Rahul Bhansali
9595e3aef6 common/cnxk: fix decrypt packet count register update
Corrects the CPT decrypt packet counter register.

Fixes: b1a22e5d4f ("common/cnxk: add CPT diagnostics")
Cc: stable@dpdk.org

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
2022-06-15 14:25:23 +02:00
Jerin Jacob
c06b6b9f9d doc: add platform option in cnxk native build
Update cnxk platform documentation to use
-Dplatform meson option for native builds.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2022-06-14 15:04:00 +02:00
Satheesh Paul
d382a8d322 common/cnxk: support dumping flow MCAM entry data
When dumping flow data, read hardware MCAM entry corresponding
to the flow and print that data also.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-06-14 14:23:26 +02:00
David Marchand
a31c9f970d net/cnxk: fix crash in IPsec telemetry
Calling this telemetry callback with no argument caused a crash.

Fixes: 41cc645c214f ("net/cnxk: add inline IPsec telemetry for CN9K")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
2022-06-13 14:08:44 +02:00
Srikanth Yalavarthi
eb5da5408f common/cnxk: add macros to platform layer
Added new platform layer macros for pointer operations,
bitwise operations, spinlock and 32 bit read and write.

Signed-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-06-13 10:20:19 +02:00
Satheesh Paul
670692191a common/cnxk: fix channel number setting in MCAM entries
Adding changes to accommodate the following requirements
while masking the channel number.
1. For CN10K device, channel number should not be masked
   for first pass rules with RTE_FLOW_ACTION_TYPE_SECURITY
   action. And channel number should be masked for all
   other flow rules.
2. For CN9K device channel number should not be masked.

Fixes: 4968b362b639 ("common/cnxk: support CPT second pass flow rules")
Cc: stable@dpdk.org

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-06-13 09:29:24 +02:00
Hanumanth Pothula
ed665c3e6a net/thunderx: populate max and min MTU values
Populate maximum and minimum MTU values while retrieving
device information.

Signed-off-by: Hanumanth Pothula <hpothula@marvell.com>
2022-06-13 09:29:24 +02:00
Harman Kalra
32423e46b3 net/thunderx: support attaching from secondary
Adding support for device hotplugging - attach and detach from
secondary

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-06-13 09:29:24 +02:00
Harman Kalra
2f69bbd8a3 net/octeontx: support allmulticast
Implement allmulticast operations for octeontx driver:
rte_eth_allmulticast_enable()/rte_eth_allmulticast_disable().

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-06-13 09:29:24 +02:00
Harman Kalra
c6b97d6786 net/octeontx: support xstats
Adding support for xstats eth operations.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-06-13 09:29:24 +02:00
Harman Kalra
8f79c43ffa net/thunderx: support setting link attributes
Adding support to configure link attributes like speed,
duplex, negotiation.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-06-13 09:29:24 +02:00
Hanumanth Pothula
a32d2f5c3c net/thunderx: reset Rx DMAC control register
During initialization, reset RX DMAC control register by
sending mbox message NIC_MBOX_MSG_RESET_XCAST to PF.

Signed-off-by: Hanumanth Pothula <hpothula@marvell.com>
2022-06-13 09:29:24 +02:00
Hanumanth Pothula
1f7b83b85e net/thunderx: support polling of link state change
Moving the logic of link polling to VF from PF. Now VF
is supposed to poll for the link status, rather PF alerting
VF about any link change.

Signed-off-by: Hanumanth Pothula <hpothula@marvell.com>
2022-06-13 09:29:24 +02:00
Harman Kalra
5e39350912 net/octeontx: handle port reconfiguration
Adding support for port reconfiguration as user may require to
do so on a running system.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-06-13 09:29:24 +02:00
Harman Kalra
a84ff1d9cf net/octeontx: support setting link attributes
Adding support to configure link attributes like speed,
duplex, negotiation.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-06-13 09:29:24 +02:00
Harman Kalra
39e0717033 net/octeontx: fix port close
Segmentation fault has been observed while closing the ethernet
port. Reason for the segfault is, eth port close also shuts down
event device while other ethernet port is still using the event
device.

Fixes: da6c687471a3 ("net/octeontx: add start and stop support")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-06-13 09:29:24 +02:00
Stanislaw Kardach
c65e343c14 ci: enable C++ check for Arm and PPC
The crossbuild-essential-<arch> packages contain all necessary
dependencies to cross-compile binaries for a given architecture
including C and C++ compilers. Therefore use those instead of listing
packages directly. This way C++ compiler is also installed and C++
include checks will be checked in CI for ARM and PowerPC.

Cc: stable@dpdk.org

Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2022-06-23 14:26:16 +02:00
Stanislaw Kardach
f75dd6d3b1 config: fix C++ cross compiler for Arm and PPC
Through some mixup all cross-files for ARM and PowerPC platforms were
using C Preprocessor (cpp) instead of GCC (g++).
This caused meson to fail detecting the C++ compiler presence and
therefore disabling some targets (i.e. C++ include file checks).

Fixes: e53a5299d219 ("build: support vendor specific ARM cross builds")
Cc: stable@dpdk.org

Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2022-06-23 14:18:42 +02:00
Fidaullah Noonari
ce2f7d472e malloc: fix allocation of almost hugepage size
If called to allocate memory of size is between multiple of hugepage
size minus malloc_header_len and hugepage size, rte_malloc fails.

This fix replaces malloc_elem_trailer_len with malloc_elem_overhead in
try_expand_heap() to include malloc_elem_header_len when calculating
n_seg.

Bugzilla ID: 800
Fixes: 07dcbfe0101f ("malloc: support multiprocess memory hotplug")
Cc: stable@dpdk.org

Signed-off-by: Fidaullah Noonari <fidaullah.noonari@emumba.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2022-06-23 13:40:50 +02:00
Stephen Hemminger
0efcd352e2 eal/unix: make stack dump signal safe
rte_dump_stack() needs to be usable in situations when a bug is
encountered and from signal handlers (such as SEGV).

Glibc backtrace_symbols() calls malloc which makes it
dangerous in a signal handler that is handling errors that maybe
due to memory corruption. Additionally, rte_log() is unsafe because
syslog() is not signal safe; printf() is also documented as
not being safe.

This version formats message and uses writev for each line in a manner
similar to what glibc version of backtrace_symbols_fd() does. The
FreeBSD version of backtrace_symbols_fd() is not signal safe.

Sample output:

0: ./build/app/dpdk-testpmd (rte_dump_stack+0x2b) [560a6e9c002b]
1: ./build/app/dpdk-testpmd (main+0xad) [560a6decd5ad]
2: /lib/x86_64-linux-gnu/libc.so.6 (__libc_start_main+0xcd) [7fd43d3e27fd]
3: ./build/app/dpdk-testpmd (_start+0x2a) [560a6e83628a]

Bugzilla ID: 929

Acked-by: Morten Brørup <mb@smartsharesystems.com>
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2022-06-23 13:40:50 +02:00
David Marchand
2fbada9154 vhost/crypto: fix descriptor processing
copy_data was returning a pointer to an increased (off by one) descriptor.
Subsequent calls to copy_data in the library were then failing.
Fix this by incrementing the descriptor only if there is some left data
to copy.

Fixes: 4414bb67010d ("vhost/crypto: fix build with GCC 12")
Cc: stable@dpdk.org

Reported-by: Jakub Poczatek <jakub.poczatek@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Tested-by: Jakub Poczatek <jakub.poczatek@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2022-06-22 18:58:31 +02:00
Yuan Wang
5729407fa4 net/virtio: unmap PCI device in secondary process
In multi-process, the secondary process will remap PCI during
initialization, but the mapping is not removed in the uninit path,
the device is not closed, and the device busy error will be reported
when the device is hotplugged.

This patch unmaps PCI device at secondary process uninitialization
based on virtio_rempa_pci.

Fixes: 36a7a2e7a53f ("net/virtio: move PCI device init in dedicated file")
Cc: stable@dpdk.org

Signed-off-by: Yuan Wang <yuanx.wang@intel.com>
Tested-by: Wei Ling <weix.ling@intel.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2022-06-21 11:24:15 +02:00
David Marchand
4414bb6701 vhost/crypto: fix build with GCC 12
GCC 12 raises the following warning:

In file included from ../lib/mempool/rte_mempool.h:46,
                 from ../lib/mbuf/rte_mbuf.h:38,
                 from ../lib/vhost/vhost_crypto.c:7:
../lib/vhost/vhost_crypto.c: In function ‘rte_vhost_crypto_fetch_requests’:
../lib/eal/x86/include/rte_memcpy.h:371:9: warning: array subscript 1 is
     outside array bounds of ‘struct virtio_crypto_op_data_req[1]’
     [-Warray-bounds]
  371 | rte_mov32((uint8_t *)dst + 3 * 32, (const uint8_t *)src + 3 * 32);
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../lib/vhost/vhost_crypto.c:1178:42: note: while referencing ‘req’
 1178 |         struct virtio_crypto_op_data_req req;
      |                                          ^~~

Split this function and separate the per descriptor copy.
This makes the code clearer, and the compiler happier.

Note: logs for errors have been moved to callers to avoid duplicates.

Fixes: 3c79609fda7c ("vhost/crypto: handle virtually non-contiguous buffers")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:20:58 +02:00
Li Zhang
cac75b2d2a vdpa/mlx5: prepare virtqueue resource creation
Split the virtqs virt-queue resource between
the configuration threads.
Also need pre-created virt-queue resource
after virtq destruction.
This accelerates the LM process and reduces its time by 30%.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:18:16 +02:00
Li Zhang
91edbbfbb4 vdpa/mlx5: add virtq sub-resources creation
pre-created virt-queue sub-resource in device probe stage
and then modify virtqueue in device config stage.
Steer table also need to support dummy virt-queue.
This accelerates the LM process and reduces its time by 40%.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Signed-off-by: Yajun Wu <yajunw@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:18:16 +02:00
Li Zhang
6ebb02b44b vdpa/mlx5: add device close task
Split the virtqs device close tasks after
stopping virt-queue between the configuration threads.
This accelerates the LM process and
reduces its time by 50%.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:18:15 +02:00
Li Zhang
0d9d28974d vdpa/mlx5: add virtq live migration log task
Split the virtqs LM log between the configuration threads.
This accelerates the LM process and reduces its time by 20%.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:18:15 +02:00
Li Zhang
8e72e6bded vdpa/mlx5: add virtq creation task
The virtq object and all its sub-resources use a lot of
FW commands and can be accelerated by the MT management.
Split the virtqs creation between the configuration threads.
This accelerates the LM process and reduces its time by 20%.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:18:15 +02:00
Li Zhang
06ebaaea20 vdpa/mlx5: add VM memory registration task
The driver creates a direct MR object of
the HW for each VM memory region,
which maps the VM physical address to
the actual physical address.

Later, after all the MRs are ready,
the driver creates an indirect MR to group all the direct MRs
into one virtual space from the HW perspective.

Create direct MRs in parallel using the MT mechanism.
After completion, the primary thread creates the indirect MR
needed for the following virtqs configurations.

This optimization accelerrate the LM process and
reduce its time by 5%.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:18:15 +02:00
Li Zhang
69e07f43a2 vdpa/mlx5: add task ring for multi-thread management
The configuration threads tasks need a container to
support multiple tasks assigned to a thread in parallel.
Use rte_ring container per thread to manage
the thread tasks without locks.
The caller thread from the user context opens a task to
a thread and enqueue it to the thread ring.
The thread polls its ring and dequeue tasks.
That’s why the ring should be in multi-producer
and single consumer mode.
Anatomic counter manages the tasks completion notification.
The threads report errors to the caller by
a dedicated error counter per task.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:18:15 +02:00
Li Zhang
67b070936d vdpa/mlx5: add multi-thread management for configuration
The LM process includes a lot of objects creations and
destructions in the source and the destination servers.
As much as LM time increases, the packet drop of the VM increases.
To improve LM time need to parallel the configurations for mlx5 FW.
Add internal multi-thread management in the driver for it.

A new devarg defines the number of threads and their CPU.
The management is shared between all the devices of the driver.
Since the event_core also affects the datapath events thread,
reduce the priority of the datapath event thread to
allow fast configuration of the devices doing the LM.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:18:15 +02:00
Li Zhang
057f7d2084 vdpa/mlx5: optimize datapath-control synchronization
The driver used a single global lock for any synchronization
needed for the datapath and control path.
It is better to group the critical sections with
the other ones that should be synchronized.

Replace the global lock with the following locks:

1.virtq locks(per virtq) synchronize datapath polling and
  parallel configurations on the same virtq.
2.A doorbell lock synchronizes doorbell update,
  which is shared for all the virtqs in the device.
3.A steering lock for the shared steering objects updates.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:18:15 +02:00
Li Zhang
7f2de21244 vdpa/mlx5: pre-create virtq at probing time
dev_config operation is called in LM progress.
LM time is very critical because all
the VM packets are dropped directly at that time.

Move the virtq creation to probe time and
only modify the configuration later in
the dev_config stage using the new ability
to modify virtq.

This optimization accelerates the LM process and
reduces its time by 70%.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:18:15 +02:00
Li Zhang
2ac90aec21 common/mlx5: extend virtq modifiable fields
A virtq configuration can be modified after the virtq creation.
Added the following modifiable fields:
1.address fields: desc_addr/used_addr/available_addr
2.hw_available_index
3.hw_used_index
4.virtio_q_type
5.version type
6.queue mkey
7.feature bit mask: tso_ipv4/tso_ipv6/tx_csum/rx_csum
8.event mode: event_mode/event_qpn_or_msix

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2022-06-21 11:17:41 +02:00