5709 Commits

Author SHA1 Message Date
Pablo de Lara
1b529b0141 app/test: remove unnecessary conditional for crypto
Regardless the result of the conditional, the true and false
statements were the same, so the conditional can be removed.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Fan Zhang
60a94afefc examples/ipsec-secgw: add sample configuration files
This patch adds two sample configuration files to ipsec-secgw sample
application. The sample configuration files show how to setup
back-to-back systems that would forward traffic through an IPsec
tunnel.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2016-10-04 20:41:09 +02:00
Fan Zhang
0d547ed037 examples/ipsec-secgw: support configuration file
This patch adds the configuration file support to ipsec_secgw
sample application. Instead of hard-coded rules, the users can
specify their own SP, SA, and routing rules in the configuration
file. A command line option "-f" is added to pass the
configuration file location to the application.

Configuration item formats:

SP rule format:
sp <ip_ver> <dir> esp <action> <priority> <src_ip> <dst_ip> \
<proto> <sport> <dport>

SA rule format:
sa <dir> <spi> <cipher_algo> <cipher_key> <auth_algo> <auth_key> \
<mode> <src_ip> <dst_ip>

Routing rule format:
rt <ip_ver> <src_ip> <dst_ip> <port>

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
77debbbfdf app/test: fix verification of digest for GCM
This patch fixes verification of digest in test_cryptodev.c file
for AES GCM test cases.

Fixes: eec136f3c54f ("aesni_gcm: add driver for AES-GCM crypto operations")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
b2bb359747 crypto/aesni_gcm: move pre-counter block to driver
This patch moves computing of pre-counter block into the AESNI-GCM
driver so it can be moved from test files.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Fiona Trahe
e1b7f509e6 crypto/qat: add 3DES cipher algorithm
3DES support added to QuickAssist PMD with CTR and CBC mode.
Both cipher-only and chained with HMAC_SHAx.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Fiona Trahe
0fad384df0 crypto/qat: cleanup code
Cleanup of unused code.
Rename and simplify a badly named struct element, was aes, but
used for all types of ciphers.
Print correct error msg (Unsupported rather than Undefined)
for all ciphers not supported by QAT PMD.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Eoin Breen
cb4a1d14bf tools: bind crypto devices
Adding the support to bind/unbind crypto devices with
dpdk-devbind.py script, as now it is not restricted
to network devices anymore.

Signed-off-by: Eoin Breen <eoin.breen@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Pablo de Lara
af9f6afb14 crypto: rename all KASUMI references
KASUMI algorithm has all uppercase letters,
but some references of it had some lowercase letters.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Pablo de Lara
6aef763816 crypto: rename some SNOW 3G references
SNOW 3G algorithm has all uppercase letters in its name
and a space between SNOW and 3G, but some references of it
had some lowercase letters or no space.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
05175ec459 crypto/qat: fix FreeBSD build
Using sys/types.h instead of linux/types.h
so as to compile QAT_PMD on FreeBSD.

Fixes: 1703e94ac5ce ("qat: add driver for QuickAssist devices")

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
2508c30912 cryptodev: update GMAC API comments
In file rte_crypto_sym.h, GMAC API comments need to be changed
to comply with the GMAC specification. Main areas of change are
aad pointer and aad len, which now will be used to
provide plaintext.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
84baeeb267 app/test: add GMAC for qat
Added Galois Message Authentication Code (GMAC) tests to cryptodev tests.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
2fa64f840d crypto/qat: add GMAC capability
Added Galois Message Authentication Code (GMAC) capability to
QuickAssist Technology symmetric cryptographic driver.
GMAC is authentication only variant of Galois Counter Mode (GCM)
where all plaintext is provided with AAD pointer only.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
f2f639c6e0 crypto/qat: add C3xxx device
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
ae20c0735c crypto/qat: add C62x device
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
73d648b888 app/test: add KASUMI for qat
This patch adds KASUMI tests in the QAT testsuite.
Alg-Chaining tests have also been added in the KASUMI
SW PMD.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
d4f2745300 crypto/qat: add KASUMI
This patch add kasumi support in Intel(R)
QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
e66917150e app/test: rename some SNOW 3G functions
Renamed authenticated encryption and encrypted authentication
tests with easily recognized names.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
dac3985e7c app/test: cleanup crypto code
Cleanup the code for code design consistency.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
fddf380404 doc: fix names of supported crypto algorithms
Update documentation with correct names of supported algorithms.

Fixes: 1703e94ac5cee ("qat: add driver for QuickAssist devices")
Fixes: 3aafc423cf4d ("snow3g: add driver for SNOW 3G library")
Fixes: 924e84f87306 ("aesni_mb: add driver for multi buffer based crypto")
Fixes: 2773c86d061a ("crypto/kasumi: add driver for KASUMI library")

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Eoin Breen
d6740135f0 doc: add instructions to enable qat
Signed-off-by: Eoin Breen <eoin.breen@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
6bc4300318 crypto/null: fix key size increment value
This patch fixes the values of increment in key size.

Fixes: 94b0ad8e0aa5 ("null_crypto: add driver for null crypto operations")

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
50914e6c18 app/test: add NULL operation for qat
Added NULL algorithm to test file for Intel(R) QuickAssist
Technology Driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
db0e952a5c crypto/qat: add NULL capability
Enabled NULL crypto for Intel(R) QuickAssist Technology.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
0cde3f55c9 app/test: add aes-sha384-hmac for qat
Added aes-sha384-hmac algorithm to test file for Intel(R) QuickAssist
Technology Driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
d905ee32d0 crypto/qat: add aes-sha384-hmac capability
Enable support of aes-sha384-hmac in Intel(R) QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
a8f21164cb app/test: add aes-sha224-hmac for qat
Added aes-sha224-hmac algorithm to test file for Intel(R) QuickAssist
Technology Driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
ebdbe12fbf crypto/qat: add aes-sha224-hmac capability
Added support of aes-sha224-hmac in Intel(R) QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
4a38d46e44 app/test: add MD5 HMAC for qat
Added MD5 HMAC hash algorithm to test file for Intel QuickAssist
Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
61ec518162 crypto/qat: add MD5 HMAC capability
Added posibility to compute MD5 HMAC digest with Intel QuickAssist
Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Fiona Trahe
1bb14aab6d crypto/qat: optimize request copy
using rte_mov128 instead of structure assignment to copy
template request from session context into request

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: John Griffin <john.griffin@intel.com>
2016-10-04 20:41:09 +02:00
John Griffin
10b49880e3 crypto/qat: make the session struct variable in size
This patch changes the qat firmware session data structure from a fixed
size to a variable size which is dependent on the size of the chosen
algorithm.
This reduces the amount of bytes which are transferred across
PCIe and thus helps to increase qat performance when the
accelerator is bound by PCIe.

Signed-off-by: John Griffin <john.griffin@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Shreyansh Jain
50a3345fa9 vdev: rename init/uninit ops to probe/remove
Inline with PCI probe and remove, VDEV probe and remove hooks provide
a uniform naming.
PCI probe represents scan and driver initialization. For VDEV, it will
represent argument parsing and initialization.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2016-10-06 16:02:14 +02:00
Olivier Matz
11fd19f764 mem: fix build with -O1
When compiled with EXTRA_CFLAGS="-O1", the compiler is not
able to detect that size is always initialized when used, and
issues a wrong warning:

  eal_memory.c: In function ‘rte_eal_hugepage_attach’:
  eal_memory.c:1684:3: error: ‘size’ may be used uninitialized in this
                       function [-Werror=maybe-uninitialized]
     munmap(hp, size);
     ^

Workaround this issue by initializing size to 0.
Seen on gcc (Debian 5.4.1-1) 5.4.1 20160803.

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
2016-10-06 15:23:53 +02:00
Ajit Khaparde
595f302296 net/bnxt: update struct definitions for 1.5.1 HWRM API
Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different auto generated
file.

Structures updated:
hwrm_stat_ctx_alloc_input, hwrm_stat_ctx_alloc_output,
hwrm_stat_ctx_free_input, hwrm_stat_ctx_free_output,
hwrm_stat_ctx_clr_stats_input, hwrm_stat_ctx_clr_stats_output,
hwrm_exec_fwd_resp_input, hwrm_exec_fwd_resp_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
92a5359ef4 net/bnxt: update HWRM filter related structures
Update the PMD to use packet filtering related structures as per the
1.5.1 version of the HWRM API. Most of the changes in the patch are
white spaces and rearrangement of the lines - a onetime change owing to
the usage of a different auto generated file.

Structures being updated:
hwrm_cfa_l2_filter_cfg_input, hwrm_cfa_l2_filter_cfg_output,
hwrm_cfa_l2_set_rx_mask_input, hwrm_cfa_l2_set_rx_mask_output,
hwrm_cfa_l2_filter_alloc_input, hwrm_cfa_l2_filter_alloc_output,
hwrm_cfa_l2_filter_free_input, hwrm_cfa_l2_filter_free_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
c50af701a8 net/bnxt: update HWRM ring related structures
Update the PMD to use HWRM ring related structures as per the 1.5.1
version of the HWRM API.  Most of the changes in the patch are white
spaces and rearrangement of the lines - a onetime change owing to the
usage of a different auto generated file.

Structures being updated:
hwrm_ring_alloc_input, hwrm_ring_alloc_output, hwrm_ring_free_input,
hwrm_ring_free_output, hwrm_ring_grp_alloc_input,
hwrm_ring_grp_alloc_output, hwrm_ring_grp_free_input,
hwrm_ring_grp_free_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
62534d3aa4 net/bnxt: update VNIC related structures
Update the PMD to use VNIC related structures as per the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different
auto generated file.

Structures being updated:
hwrm_vnic_alloc_input, hwrm_vnic_alloc_output, hwrm_vnic_free_input,
hwrm_vnic_free_output, hwrm_vnic_cfg_input, hwrm_vnic_cfg_output,
hwrm_vnic_rss_cfg_input, hwrm_vnic_rss_cfg_output,
hwrm_vnic_rss_cos_lb_ctx_alloc_input,
hwrm_vnic_rss_cos_lb_ctx_alloc_output,
hwrm_vnic_rss_cos_lb_ctx_free_input,
hwrm_vnic_rss_cos_lb_ctx_free_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
5c6a5bc88c net/bnxt: update structures for 1.5.1 HWRM API
Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different
auto generated file.

Structures updated:
hwrm_func_qcfg_input, hwrm_func_qcfg_output, hwrm_func_drv_rgtr_input,
hwrm_func_drv_rgtr_output, hwrm_func_drv_unrgtr_input,
hwrm_func_drv_unrgtr_output, hwrm_queue_qportcfg_input,
hwrm_queue_qportcfg_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
9e2ab5744d net/bnxt: update structures for 1.5.1 HWRM API
Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different
auto generated file.

Structures being updated in this patch:
input, output, hwrm_ver_get_input, hwrm_ver_get_output,
hwrm_func_reset_input, hwrm_func_reset_output, hwrm_func_qcaps_input,
hwrm_func_qcaps_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
b98145d6b0 net/bnxt: update completion descriptors
Update the PMD to use structures as per the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - hopefully a onetime change owing to the usage of a different
auto generated file.

Structures updated:
cmpl_base, tx_cmpl, rx_pkt_cmpl, rx_pkt_cmpl_hi, hwrm_fwd_req_cmpl,
hwrm_async_event_cmpl

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
76fc6a5938 net/bnxt: update buffer descriptor definitions
Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - hopefully a onetime change owing to the usage of a different
auto generated file.

Structures updated in this patch:
tx_bd_short, tx_bd_long, tx_bd_long_hi, rx_prod_pkt_bd

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
eba852e23e net/bnxt: refactor for 1.5.1 HWRM API
Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in this patch and the following patches are
white spaces and rearrangement of the lines - hopefully a onetime change
owing to the usage of a different auto generated file.

Other than that, the following fields have been renamed:
1) rx_err_pkts and tx_err_pkts are now rx_discard_pkts and tx_discard_pkts
in struct ctx_hw_stats64
2) the perm_mac_addr field in the response of bnxt_hwrm_func_qcaps has
changed to mac_addr.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
6ca3a5e722 net/bnxt: support hotplug
This patch adds support for port hotplug framework.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
f86febfb46 net/bnxt: support VF
Add support to the bnxt PMD to load on a PCI VF.
1) VF cannot change parameters like - speed, autoneg and pause
2) If the VF MAC address shows up as all 0's it has to be provisioned
by the PF in the hypervisor.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: David Christensen <david.christensen@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
5c4b2e43c6 net/bnxt: update guide
Update doc/guides/nics/bnxt.rst to indicate that the bnxt PMD driver
supports Broadcom NetXtreme-C/NetXtreme-E BCM5730X/BCM5740X family of
network controllers and Broadcom StrataGX BCM5871X family of
communications processors.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
9dcf8c7d6e net/bnxt: add new device IDs
More PCI Device IDs for Cumulus, Cumulus+ and Whitney, Whitney+ SKUs.

The NPAR model supported by firmware has been altered. It now allocates a
unique Device ID for each NPAR partition for each device.  In addition,
ASIC's that are capable of supporting dual media have a unique DID
depending whether they are configured in copper or fiber mode.
This patch adds the necessary DIDs.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: David Christensen <david.christensen@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
5cd0e2889c net/bnxt: support NIC Partitioning
Adding code to enable support for NIC Partitioning or NPAR 1.0
As a part of NPAR, we don't allow port settings like speed or flow
control to be changed.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Stephen Hurd <stephen.hurd@broadcom.com>
Reviewed-by: David Christensen <david.christensen@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
1fe1aaf207 net/bnxt: support Broadcom StrataGX
This patch adds support for the Broadcom StrataGX® BCM5871X
series of Communications Processors.

These ARM based processors target a broad range of networking
applications including virtual CPE (vCPE) and NFV appliances,
10G service routers and gateways, control plane processing for
Ethernet switches, and network attached storage (NAS).

Other than adding the PCI Id for supporting the device,
the patch also adds a memory barrier before the Tx doorbell
and Completing ring doorbell is written to. Since ARM has a
weakly ordered memory model this enforces a strict ordering
of the descriptor writes before the doorbell writes happen.

Signed-off-by: John Carney <john.carney@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00