86 Commits

Author SHA1 Message Date
Tejasree Kondoj
b9765e96c2 crypto/octeontx2: register security operations
This patch registers security operations with cryptodev.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-18 23:09:02 +02:00
Arek Kusztal
faa57df0b4 crypto/qat: support ChaCha20-Poly1305
This patchset adds ChaCha20-Poly1305 implementation to Intel
QuickAssist Technology pmd.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2020-07-08 18:16:40 +02:00
Tejasree Kondoj
cb7842f23e crypto/octeontx2: support ChaCha20-Poly1305
Add ChaCha20-Poly1305 AEAD algorithm support in crypto_octeontx2 PMD

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
2020-07-08 18:16:17 +02:00
Ankur Dwivedi
cec2f173a9 crypto/octeontx2: revert non-byte aligned data feature
This reverts commit 51f3e107aca23a1cbc1a5ad9fdce7921340307b5.

For SNOW and ZUC algos the offset value for enryption and decryption
is converted to bytes. Hence RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA
feature is not supported by the octeontx2 crypto pmd.

Fixes: 51f3e107aca2 ("crypto/octeontx2: enable non-byte aligned data")
Cc: stable@dpdk.org

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2020-07-08 18:16:16 +02:00
Ankur Dwivedi
371dbd5751 crypto/octeontx: revert non-byte aligned data feature
This reverts commit 32b8f26adf8b26a55230408ff6adffd4b2327e52.

For SNOW and ZUC algos the offset value for enryption and decryption
is converted to bytes. Hence RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA
feature is not supported by the octeontx crypto pmd.

Fixes: 32b8f26adf8b ("crypto/octeontx: enable non-byte aligned data")
Cc: stable@dpdk.org

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2020-07-08 18:16:16 +02:00
David Coyle
6f0ef23740 crypto/qat: support DOCSIS protocol
Add support to the QAT SYM PMD for the DOCSIS protocol, through the
rte_security API. This, therefore, includes adding support for the
rte_security API to this PMD.

Signed-off-by: David Coyle <david.coyle@intel.com>
Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
2020-07-08 18:16:13 +02:00
David Coyle
fda5216fba crypto/aesni_mb: support DOCSIS protocol
Add support to the AESNI-MB PMD for the DOCSIS protocol, through the
rte_security API. This, therefore, includes adding support for the
rte_security API to this PMD.

Signed-off-by: David Coyle <david.coyle@intel.com>
Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2020-07-08 00:15:35 +02:00
Pablo de Lara
cd346367f8 drivers/crypto: add missing OOP feature flag
ZUC, SNOW3G and KASUMI PMDs support Out-of-place operations,
but their feature flags did not reflect this.

Fixes: 2717246ecd7d ("cryptodev: replace mbuf scatter gather flag")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2020-07-08 00:15:35 +02:00
Jay Zhou
b7aa3b5b88 crypto/virtio: enable OOP feature flag
Since it will check the feature mask before running out-of-place
test cases and the virtio-crypto device supports OOP_LB_IN_LB_OUT mode.

Signed-off-by: Jay Zhou <jianjay.zhou@huawei.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-05-17 16:10:44 +02:00
Ankur Dwivedi
32b8f26adf crypto/octeontx: enable non-byte aligned data
The OCTEON TX crypto PMD supports non-byte aligned data as
input for SNOW and ZUC algos. Adding the same to the feature list.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2020-05-17 16:10:44 +02:00
Ankur Dwivedi
51f3e107ac crypto/octeontx2: enable non-byte aligned data
The OCTEON TX2 crypto PMD supports non-byte aligned data as
input for SNOW and ZUC algos. Adding the same to the feature list.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2020-05-17 16:10:44 +02:00
Arek Kusztal
b922dbd38c cryptodev: add ChaCha20-Poly1305 AEAD algorithm
This patch adds Chacha20-Poly1305 AEAD algorithm to Cryptodev.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-05-11 13:17:43 +02:00
Akhil Goyal
e11bdd3774 cryptodev: add feature flag for non-byte aligned data
Some wireless algos like SNOW, ZUC may support input
data in bits which are not byte aligned. However, not
all PMDs can support this requirement. Hence added a
new feature flag RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA
to identify which all PMDs can support non-byte aligned
data.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2020-05-11 13:17:43 +02:00
Adam Dybkowski
6e21c1a532 crypto/qat: support plain SHA1..SHA512 hashes
This patch adds support for plain SHA-1, SHA-224, SHA-256,
SHA-384 and SHA-512 hashes to QAT PMD.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-04-19 22:45:11 +02:00
Pablo de Lara
b3aaf24de5 cryptodev: add session-less feature flag
Add feature flag for symmetric sessionless support,
so it can be checked by applications.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Tested-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-04-19 22:45:11 +02:00
Konstantin Ananyev
a2c6d3f34f crypto/aesni_mb: support CPU crypto
Add support for CPU crypto mode by introducing required handler.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2020-04-19 17:15:14 +02:00
Nagadheeraj Rottela
2a41db7589 crypto/nitrox: support 3DES-CBC
This patch adds 3DES CBC mode cipher algorithm.

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
2020-04-05 18:40:34 +02:00
Marcin Smoczynski
d6946fe9d4 crypto/aesni_gcm: support CPU crypto
Add support for CPU crypto mode by introducing required handler.
Authenticated encryption and decryption are supported with tag
generation/verification.

CPU crypto support include both AES-GCM and GMAC algorithms.

Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Tested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2020-02-05 15:29:14 +01:00
Marcin Smoczynski
7adf992fb9 cryptodev: introduce CPU crypto API
Add new API allowing to process crypto operations in a synchronous
manner. Operations are performed on a set of SG arrays.

Cryptodevs which allows CPU crypto operation mode have to
use RTE_CRYPTODEV_FF_SYM_CPU_CRYPTO capability.

Add a helper method to easily convert mbufs to a SGL form.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Marcin Smoczynski <marcinx.smoczynski@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:29:14 +01:00
Thomas Monjalon
f5862ae99e cryptodev: revert Chacha20-Poly1305 AEAD algorithm
API makes think that rte_cryptodev_info_get() cannot return
a value >= 3 (RTE_CRYPTO_AEAD_LIST_END in 19.11).
20.02-rc1 was returning 3 (RTE_CRYPTO_AEAD_CHACHA20_POLY1305).
So the ABI compatibility contract was broken.

It could be solved with some function versioning,
but because a lack of time, the feature is reverted for now.

This reverts following commits:
- 6c9f3b347e21 ("cryptodev: add Chacha20-Poly1305 AEAD algorithm")
- 2c512e64d600 ("crypto/qat: support Chacha Poly")
- d55e01f579e1 ("test/crypto: add Chacha Poly cases")

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-02-05 15:14:46 +01:00
Arek Kusztal
2c512e64d6 crypto/qat: support Chacha Poly
This patchset adds Chacha20-Poly1305 implementation to Intel
QuickAssist Technology pmd.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-01-16 17:10:36 +01:00
Sunila Sahu
40726a9ad5 crypto/octeontx2: support ECPM
Add support asymmetric operation EC Point MUltiplication,
in crypto_octeontx2 PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
2020-01-15 15:01:55 +01:00
Sunila Sahu
99faef8325 crypto/octeontx: support ECPM
Add support for asymmetric operation EC Point Multiplication,
in crypto_octeontx PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
2020-01-15 15:01:55 +01:00
Balakrishna Bhamidipati
e98dc331e9 cryptodev: support ECPM
Asymmetric crypto library is extended to add ECPM (Elliptic Curve Point
Multiplication). The required xform type and op parameters are
introduced.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-01-15 15:01:55 +01:00
Sunila Sahu
2e12bd06fe crypto/octeontx2: support ECDSA
Adding support for ECDSA asymmetric crypto
operations in crypto_octeontx2 PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
2020-01-15 15:01:55 +01:00
Sunila Sahu
aa2cbd32e9 crypto/octeontx: support ECDSA
Adding support for ECDSA asymmetric crypto operations
in crypto_octeontx PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
2020-01-15 15:01:55 +01:00
Ayuj Verma
7bb4ea3246 cryptodev: support ECDSA
Asymmetric crypto library is extended to add ECDSA. Elliptic curve
xform and ECDSA op params are introduced.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-01-15 15:01:56 +01:00
Arek Kusztal
6c9f3b347e cryptodev: add Chacha20-Poly1305 AEAD algorithm
This patch adds Chacha20-Poly1305 AEAD algorithm to Cryptodev.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-01-15 13:34:02 +01:00
Akhil Goyal
b795e127e8 crypto/openssl: support in-place scatter gather
As per current support, Scatter Gather is only supported
for out of place input and output buffers.
This patch add support for Scatter Gather for in-place buffers.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2019-11-20 12:35:51 +01:00
Pablo de Lara
4b70152374 crypto/aesni_gcm: support in-place chained mbufs
IPSec Multi buffer library supports encryption on multiple segments.
When dealing with chained buffers (multiple segments), as long as
the operation is in-place, the destination buffer does not have to
be contiguous (unlike in the case of out-of-place operation).
Therefore, the limitation of not supporting in-place chained mbuf
can be removed.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2019-11-08 13:51:16 +01:00
Arek Kusztal
539a3216e1 crypto/qat: support RSA CRT in asym
This commit extends RSA implementation by CRT option

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-23 16:57:06 +02:00
Arek Kusztal
e2c5f4ea99 crypto/qat: support RSA in asym
This commit adds RSA algorithm to asymmetric pmd
using pair (n, d) private key

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-23 16:57:06 +02:00
Arek Kusztal
e1ed5a73cd crypto/qat: support session-less for asym ops
This patch adds option to use asymmetric crypto pmd with
session-less support.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-23 16:57:06 +02:00
Kanaka Durga Kotamarthy
364b9bfc81 crypto/octeontx2: add asymmetric session
This patch adds asymmetric session setup and free routines.
RSA and modexp operations are supported.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Kanaka Durga Kotamarthy <kkotamarthy@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Anoob Joseph
6aa9ceaddf crypto/octeontx2: add symmetric capabilities
This patch adds the symmetric capabilities
for OCTEON TX2 crypto PMD.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Anoob Joseph
2f8a1b963e crypto/octeontx2: add PMD skeleton
Adding OCTEON TX2 crypto PMD skeleton.
Enabling the driver by default in common_base.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Kanaka Durga Kotamarthy
33bcaae5f8 crypto/octeontx: add asymmetric session operations
Add asymmetric session setup and free functions. RSA and modexp
operations are supported.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Kanaka Durga Kotamarthy <kkotamarthy@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Hemant Agrawal
c5788a1097 crypto/dpaa_sec: support SNOW3G and ZUC
This patch add support for ZUC and SNOW 3G in
non-PDCP offload mode.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Arek Kusztal
f2b2a44971 cryptodev: add asymmetric session-less
This commit adds asymmetric session-less option to
rte_crypto_asym_op. Feature flag for session-less is added
to rte_cryptodev.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Nagadheeraj Rottela
9282bdee5c crypto/nitrox: add cipher auth chain processing
Add cipher auth crypto chain processing functionality in symmetric
request manager. Update the release notes.

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Hemant Agrawal
b69ee13859 crypto/dpaa2_sec: support ZUC ciphering/integrity
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Hemant Agrawal
9ecbe824af crypto/dpaa2_sec: support SNOW3G cipher/integrity
Adding basic framework to use snow3g f8 and f9 based
ciphering or integrity with direct crypto apis.
This patch does not support any combo usages yet.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Damian Nowak
40002f6c2a crypto/qat: extend support for digest-encrypted auth-cipher
This patch adds condition to be met when using
out-of-place auth-cipher operations. It checks
if the digest location overlaps with the data to
be encrypted or decrypted and if so, treats as a
digest-encrypted case.
Patch adds checking, if the digest is being
encrypted or decrypted partially and extends PMD
buffers accordingly.
It also adds feature flag for QuickAssist
Technology to emphasize it's support for digest
appended auth-cipher operations.

Signed-off-by: Damian Nowak <damianx.nowak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-07-05 15:28:14 +02:00
Damian Nowak
90197eb094 cryptodev: add digest encrypted feature flag
Some PMDs can only support digest being
encrypted separately in auth-cipher operations.
Thus it is required to add feature flag in PMD
to reflect if it does support digest-appended
both: digest generation with encryption and
decryption with digest verification.
This patch also adds information about new
feature flag to the release notes.

Signed-off-by: Damian Nowak <damianx.nowak@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-07-05 15:28:14 +02:00
Arek Kusztal
bfd84d7e7f doc: update guide and release notes for QAT crypto
This patch adds release notes to 19.05 release document, and more
detailed description to Intel QuickAssist Technology driver
documentation files for asymmmetric crypto PMD.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2019-05-01 16:12:47 +02:00
Fiona Trahe
7df9d02e68 doc: fix missing asymmetric crypto table
Fixes: 11e5ba72cf67 ("doc: add crypto asymmetric feature list")
Cc: stable@dpdk.org

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-18 16:01:28 +02:00
Pablo de Lara
81fe96a0ce crypto/aesni_gcm: use architecture independent API
IPSec Multi-buffer library has recently added API
that sets pointers depending on the architecture, at initiliazation,
in version 0.52.

AESNI MB PMD was updated with these changes, but not
the AESNI GCM PMD, which also uses the same library.

This makes the PMD to be only compatible with version 0.52,
but makes both PMD consistent on version compatibility,
plus adds support for AVX512.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2019-04-18 16:01:28 +02:00
Pablo de Lara
5ecb687a56 doc: add missing algorithms for AESNI-MB PMD
The supported algorithm tables for AESNI MB PMD were
missing some supported algorithms.

Fixes: 0e9f8507afcb ("crypto/aesni_mb: support AES-GCM algorithm")
Fixes: e5eecd3dc838 ("crypto/aesni_mb: support AES-GMAC")
Fixes: 11fdbf1b7866 ("crypto/aesni_mb: support plain SHA")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-18 16:01:28 +02:00
Ayuj Verma
378e08eba8 crypto/openssl: set RSA private op feature flag
openssl PMD support RSA private key operation
using both qt and exp key type.
Set rsa key type feature flag

Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Shally Verma <shallyv@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Ayuj Verma
398ba4c13f cryptodev: add RSA private key feature flag
Add feature flag to reflect RSA private key
operation support using quintuple (crt) or
exponent type key. if PMD support both,
then it should set both.

App should query cryptodev feature flag to check
if Sign and Decryt with CRT keys or exponent is
supported, thus call operation with relevant
key type.

Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Shally Verma <shallyv@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00