NPA object needs to initialize memory for queue interrupts context,
pool resource management, etc. This patch adds support for initializing
and finalizing the NPA object.
This patch also updates the otx2_npa_lf definition to meet the init/fini
requirements.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Upon receiving FLR request from VF, It is PF responsibly
forward to AF and enable FLR for VFs.
This patch adds support for VF FLR support in PF.
This patch also add otx2_dev_active_vfs() API to find
the number of active VF for given PF.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
The events like PHY link status change by AF or PHY configuration
change by PF would call for the uplink message.
The AF initiated uplink would land it in PF and PF would further
forward to VF(if it is intended for that specific VF)
The PF initiated uplink would be distributed to all active VFs.
This patch adds support for the same.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
PF has additional responsibility being server for VF messages
and forward to AF and once AF process it then forward
the response back to VF.
otx2_vf_pf_mbox_irq() will process the VF mailbox request and
af_pf_wait_msg() will until getting a response back from AF.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
This patch adds support for AF to PF mailbox interrupt and message
handling. PF writes the message on mapped mailbox region
followed by writing the mailbox doorbell register. Upon receiving,
the mailbox request in AF(In Linux kernel), It processes the messages
and update the counter memory and update the AF mbox doorbell
register. That would trigger a VFIO interrupt to userspace and
otx2_process_msgs() will handle it.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
The mempool device(NPA) may be provisioned as a standalone device or
it can be part of ethdev/eventdev device. In order to address
mempool as standalone or integrated with ethdev/eventdev device,
An intra device structure being introduced.
When the _first_ ethdev/eventdev PCIe device or standalone mempool(NPA)
devices get probed by the eal PCI subsystem,
The NPA object(struct otx2_npa_lf) stored in otx2_dev base class.
Once it is accomplished, the other consumer drivers like
ethdev driver or eventdev driver use otx2_npa_* API to operate on
shared NPA object.
The similar concept followed for SSO object, Which needs to share between
PCIe devices.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
All PCIe drivers(ethdev, mempool, cryptodev and eventdev) in octeontx2,
needs to handle interrupt for mailbox and error handling.
Create a helper function over rte interrupt API to register,
unregister, disable interrupts.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Introduce otx2_dev class to hold octeontx2 PCIe device specific
information and operations.
All PCIe drivers(ethdev, mempool, cryptodev and eventdev) in octeontx2,
inherits this base object to avail the common functionalities such
as mailbox creation, interrupt registration, etc of the PCIe device.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Each RVU device has a dedicated 64KB mailbox region
shared with its peer for communication. RVU AF has
a separate mailbox region shared with each of RVU PFs
and an RVU PF has a separate region shared with each of
it's VF.
This patch add use 64KB memory and implemented mailbox
send and receive support.
These set of APIs are used by this driver (RVU AF) and
other RVU PF/VF drivers eg ethdev, cryptodev e.t.c.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
This patch adds mailbox init and fini support.
Each RVU device has a dedicated 64KB mailbox region
shared with its peer for communication. RVU AF has
a separate mailbox region shared with each of RVU PFs
and an RVU PF has a separate region shared with
each of it's VF.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
The admin function driver sits in Linux kernel as mailbox
server. The DPDK AF mailbox client, send the message to mailbox
server to complete the administrative task such as get mac
address.
This patch adds mailbox request and response definition of
existing mailbox defined between AF driver and DPDK driver.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Vivek Sharma <viveksharma@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Signed-off-by: Zyta Szpak <zyta@marvell.com>
Various octeontx2 drivers use IO handling API, added octeontx2
specific IO handling routines in the common code.
Since some of those implementations are based on arm64 instructions
added the stub to compile the code on non arm64 ISA.
The non arm64 ISA stub is possible due to the fact that
it is an integrated controller i.e runs only on Marvell HW.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add the make and meson based build infrastructure along with
HW definition header file.
This patch adds skeleton otx2_mbox.c file to make sure
all header files are intact, subsequent patches add content
to otx2_mbox.c
This patch also updates CONFIG_RTE_MAX_VFIO_GROUPS
value to 128 as the system can have up to 128 PFs/VFs.
For octeontx2 meson build target, CONFIG_RTE_MAX_VFIO_GROUPS
defined as 128 so no additional changes required.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
