It may happen that DPDK application gets killed while having
acquired locks on the ethernet hardware, causing these locks to
be never released. On next restart of the application, DPDK
skip those ports because it can not acquire the lock,
this may cause some ports (or even complete board if SMBI is locked)
to be inaccessible from DPDK application until reboot of the
hardware.
This patch release locks that are supposed to be locked due to
an improper exit of the application.
Signed-off-by: Didier Pallard <didier.pallard@6wind.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Flow director in X540 uses the same registers as in 82599.
So it just has to be enabled in the 82599 implementation.
Signed-off-by: Mauro Annarumma <mauroannarumma@hotmail.it>
Acked-by: Maxime Leroy <maxime.leroy@6wind.com>
No need to keep residues of a fix which is replaced by another one.
This reverts commit 5a6d9897f9
(residual fix about resetting big Tx queues).
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Add into the `rte_eth_stats` data structure 4 (64-bit) counters
of XOFF/XON pause frames received and sent on a given port.
Update em, igb, and ixgbe drivers to return the value of the 4 XOFF/XON
counters through the `rte_eth_stats_get` function exported by the DPDK
API.
Display the value of the 4 XOFF/XON counters in the `testpmd` application.
Signed-off-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
1) Make device RX and TX offload capabilities to be returned in the
rte_eth_dev_info data structure by the function rte_eth_dev_info_get
The following initial set of RX offload capabilities are defined:
- VLAN header stripping
- IPv4 header checksum check
- UDP checksum check
- TCP checksum check
- TCP large receive offload (LRO)
The following initial set of TX offload capabilities are defined:
- VLAN header insertion
- IPv4 header checksum computation
- UDP checksum computation
- TCP checksum computation
- SCTP checksum computation
- TCP segmentation offload (Transmit Segmentation Offload)
- UDP segmentation offload
2) Update the eth_dev_infos_get() function of the igb and ixgbe PMDs
to return the offload capabilities which are supported by the
device and that are effectively managed by the driver.
Signed-off-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Since DPDK 1.4, if RTE_EAL_UNBIND_PORTS is disabled, igb_uio mapping is
done for all devices (commit eee16c964c), breaking some non-Intel drivers.
But pci_uio_map_resource() should only be called for Intel devices
(using igb_uio kernel module).
The flag RTE_PCI_DRV_NEED_IGB_UIO is set for all those devices, even when
RTE_EAL_UNBIND_PORTS is disabled (fixes commit a22f5ce8fc).
Signed-off-by: David Marchand <david.marchand@6wind.com>
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Damien Millescamps <damien.millescamps@6wind.com>
The following changes are included in this patch for ixgbe:
* Support for a separate Vector Poll-Mode Driver component
* Refactoring to extract out definitions from .c file to separate .h
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
This is a fix for the ixgbe hardware offload flags not being set
when bulk alloc RX is used. The issue was caused by masking off
the bits that store the hardware offload values in the status_error
field to retrieve the done bit for the descriptor.
Commit 7431041062 in DPDK-1.3.0
introduced bulk dequeue, which included the bug.
Signed-off-by: Bryan Benson <bmbenson@amazon.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Physical Function assignes Tx/Rx queues to each Virtual Function
according to different schemes[1]. By querying through mailbox,
VF is able to get number of Tx/Rx queues assigned to it.
Note that current Intel ixgbe driver ixgbe-3.18.7 does not fully
support mailbox message IXGBE_VF_GET_QUEUES. The service routine
for IXGBE_VF_GET_QUEUES must be fixed, otherwise PF always return
1 as Tx/Rx queue number.
[1] See section 7.2.1.2.1, 7.1.2.2 and 7.10.2.7.2 of Intel 82599 10
Gbe Controller Datasheet.
Signed-off-by: Qinglai Xiao <jigsaw@gmail.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Following introduction of loopback mode, this mode should be explicitely
disabled in ixgbe_dev_rx_init() if not enabled.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: David Marchand <david.marchand@6wind.com>
82599 has two loopback operation modes, Tx->Rx and Rx->Tx.
For the time being only Tx->Rx is supported.
The new field lpbk_mode added in struct rte_eth_conf defines loopback
operation mode for certain ethernet controller. By default the value
of lpbk_mode is 0, meaning loopback mode disabled.
Since each ethernet controller has its own definition of loopback modes,
API user has to check both datasheet and implementation of certain driver
so as to understand what are valid values to be set, and what are the
expected behaviors.
Check IXGBE_LPBK_82599_XXX which are defined in ixgbe_ethdev.h
for valid values of 82599 loopback mode.
Signed-off-by: Qinglai Xiao <jigsaw@gmail.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Venky Venkatesan <venky.venkatesan@intel.com>
It should be possible to enable RSS with one Rx queue.
RSS hash can be useful independently of the number of Rx queues.
Applications can use RSS hash to identify different IP flows.
Signed-off-by: Maxime Leroy <maxime.leroy@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
As explained in rte_ethdev.h, ETH_MQ_RX_NONE allows to not choose RSS, DCB
or VMDQ mode.
But the igb/ixgbe code always silently select the RSS mode with ETH_MQ_RX_NONE.
This patch fixes this incoherence between the API and the implementation.
Signed-off-by: Maxime Leroy <maxime.leroy@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
Core support for using the Intel DPDK with Xen Dom0 - including EAL
changes and mempool changes. These changes encompass how memory mapping
is done, including support for initializing a memory pool inside an
already-allocated block of memory.
KNI sample app updated to use KNI close function when used with Xen.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Index overflow when resetting big queues was partially fixed in
bcf457f8c0 (ixgbe: fix index overflow when resetting big Tx queues)
and better fixed in
e8ae856140 (igb/ixgbe: fix index overflow when resetting big queues)
But this version (1.5.2r0) has residues of the initial fix from 1.5.1r0.
Signed-off-by: Intel
ICC requires an initializer be given for the static variables,
so adding one in cases where one wasn't previously given.
This problem was introduced in commit e8ae856140
(fix index overflow when resetting big queues).
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Rings are resetted with a loop because memset cannot be used without
issuing a warning about volatile casting.
The index of the loop was a 16-bit variable which is sufficient for
ring entries number but not for the byte size of the whole ring.
The overflow happens when rings are configured for 4096 entries
(descriptor size is 16 bytes). The result is an endless loop.
It is fixed by indexing ring entries and resetting all bytes of the entry
with a simple assignment.
The descriptor initializer is zeroed thanks to its static declaration.
There already was a fix for ixgbe Tx only
(commit bcf457f8c0).
It is reverted to use the same fix everywhere (Rx/Tx for igb/ixgbe).
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Ivan Boule <ivan.boule@6wind.com>
The index of the loop was a 16-bit variable which is sufficient for
ring entries number but not for the byte size of the whole ring.
The overflow happens when queue rings are configured for 4096 entries
(descriptor size is 16 bytes). The result is an endless loop.
Signed-off-by: Intel
In case of multi-process application, the secondary process can initialize
the driver without configuring queues. In this case the Rx/Tx functions
were not initialized because it was only done in queue setup.
Fix by reproducing the same behaviour as in eth_ixgbe_dev_init().
Signed-off-by: Intel
Need to change PCI code to support multiple I/O regions on a single device.
Some devices like VMXNET3 have multiple PCI memory regions, and some
have none.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: Intel
