Add probe to initialize VF devices. Separate init/de-init paths
for PF and VF. Do firmware state initialization wrt VF and retrieve
various operational parameters by querying firmware. Finally configure
and initialize ports.
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Add firmware mailbox communication support for VF. Add is_pf4()
to check if driver is attached to PF4. Use is_pf4() to determine
whether to use PF or VF mailbox communication.
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Add minimal VF driver. Declare functions common to both PF and VF
functionality in separate header file and import the header file.
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
The new code uses the new 32-bit Port Capabilities exclusively and
only translates to/from the old 16-bit Port Capabilities at the last
point possible when talking to older Firmware.
For the old versus new Firmware issue, we use the new FW_PARAMS_CMD[PFVF,
CAPS32] command to tell the Firmware that we want Asynchronous Port Status
updates to use the new 32-bit version of the Port Information message. If
we get an error, we know we're dealing with older Firmware, and if not,
we'll start getting th new 32-bit Port Capability message formats.
Also, refactor t4_handle_fw_rpl() to handle new 32-bit Port Capability
replies from firmware in t4_handle_get_port_info().
Original work by Surendra Mobiya <surendra@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Update link configuration API to prepare for 32-bit port capability
support. Continue using 16-bit port capability for older firmware.
Original work by Surendra Mobiya <surendra@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Normally, firmware reads various Forward Error Correction parameters
from a Transceiver Module i2c EPROM and uses a couple of IEEE Standards
(802.3bj for 100Gb/s and 802.3by for 25Gb/s) to interpret those
parameters and come up with supported and default FEC settings.
Firmware then sends these FEC parameters to the Host Driver which gives
the Host Administrator an opportunity to change them if necessary in
order to establish a Link with a Switch which may have made a
non-standard FEC decision.
This commit recognizes "auto" as a discrete FEC mode which can be
used to explicitly select the IEEE 802.3 standard based FEC selection.
Original work by Surendra Mobiya <surendra@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Original work by Surendra Mobiya <surendra@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Add firmware API for updating RSS hash configuration and key. Move
RSS hash configuration from cxgb4_write_rss() to a separate function
cxgbe_write_rss_conf().
Also, rename cxgb4_write_rss() to cxgbe_write_rss() for consistency.
Original work by Surendra Mobiya <surendra@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Attach to rte_eth_dev devices allocated by Primary process for
Ports other than Port-0 in the secondary process.
Save the Primary rte_eth_dev device eth_dev_data as part of txq
structure needed for tx path.
Fixes: 8318984927ff ("cxgbe: add pmd skeleton")
Cc: stable@dpdk.org
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Rework rte_eth_dev allocation for other ports under same PF.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Create a rte_ethdev_driver.h file and move PMD specific APIs here.
Drivers updated to include this new header file.
There is no update in header content and since ethdev.h included by
ethdev_driver.h, nothing changed from driver point of view, only
logically grouping of APIs. From applications point of view they can't
access to driver specific APIs anymore and they shouldn't.
More PMD specific data structures still remain in ethdev.h because of
inline functions in header use them. Those will be handled separately.
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Rename buf_physaddr to buf_iova.
Keep the deprecated name in an anonymous union to avoid breaking
the API.
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Reviewed-by: Anatoly Burakov <anatoly.burakov@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
The struct rte_memzone field .phys_addr is renamed to .iova.
The deprecated name is kept in an anonymous union to avoid breaking
the API.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
The memzone header is often included without good reason.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
The PCI lib defines the types and methods allowing to use PCI elements.
The PCI bus implements a bus driver for PCI devices by constructing
rte_bus elements using the PCI lib.
Move the relevant code out of the EAL to its expected place.
Libraries, drivers, unit tests and applications are updated to use the
new rte_bus_pci.h header when necessary.
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
PKT_RX_VLAN_PKT and PKT_RX_QINQ_PKT are deprecated for a while.
As explained in [1], these flags were kept to let the applications and
PMDs move to the new flag. There is also a need to support Rx vlan
offload without vlan strip (at least for the ixgbe driver).
This patch renames the old flags for this feature, knowing that some
PMDs were using PKT_RX_VLAN_PKT and PKT_RX_QINQ_PKT to indicate that
the vlan tci has been saved in the mbuf structure.
It is likely that some PMDs do not set the proper flags when doing vlan
offload, and it would be worth making a pass on all of them.
Link: [1] http://dpdk.org/ml/archives/dev/2017-June/067712.html
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
The list of libraries in LDLIBS was generated from the DEPDIRS-xyz
variable. This is valid when the subdirectory name match the library
name, but it's not always the case, especially for PMDs.
The patches removes this feature and explicitly adds the proper
libraries in LDLIBS.
Some DEPDIRS-xyz variables become useless, remove them.
Reported-by: Gage Eads <gage.eads@intel.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
In order to achieve reproducible builds, always use the same
order when listing files for compilation.
Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>
The stats_get dev op API doesn't include return value, so PMD cannot
return an error in case of failure at stats getting process time.
Since PCI devices can be removed and there is a time between the
physical removal to the RMV interrupt, the user may get invalid stats
without any indication.
This patch changes the stats_get API return value to be int instead of
void.
All the net PMDs stats_get dev ops are adjusted by this patch.
Signed-off-by: Matan Azrad <matan@mellanox.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
In function t4_wr_mbox_meat_timeout(), dynamic memory stored
in 'temp' variable and it is not freed when the function return,
this is a possible memory leak.
Fixes: 3bd122eef2cc ("cxgbe/base: add hardware API for Chelsio T5 series adapters")
Cc: stable@dpdk.org
Signed-off-by: Congwen Zhang <zhang.congwen@zte.com.cn>
Acked-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Use port type to determine the supported speed capabilities.
Fixes: e274f5732225 ("ethdev: add speed capabilities")
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Fixing typos across dpdk source code using codespell utility.
Skipped the ethdev driver's base code fixes to keep the base
code intact.
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
rte_driver->name has the driver name and all physical and virtual
devices has access to it.
Previously it was not possible for virtual ethernet devices to access
rte_driver->name field (because eth_dev used to keep only pci_dev),
and it was required to save driver name in the device private struct.
After re-works on bus and vdev, it is possible for all bus types to
access rte_driver.
It is able to remove the driver name from ethdev device private data and
use eth_dev->device->driver->name.
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Jan Blunck <jblunck@infradead.org>
Add support to configure minimum and maximum PCIe extended tag.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
rmb before determining rsp_type is a bottleneck.
Once we determine rsp-type is FL, we can directly go ahead and read
packets based on q->stat->pidx and budget_left.
This removes bottleneck of rmb once per every RX packet.
Now, rmb exists once per RX batch.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Enabling rx queues with default interrupt parameters doesn't happen
for other ports under same PF due to FULL_INIT_DONE flag being set
by the first port.
Fix is to to allow each port to enable its own rx queues with default
parameters.
Fixes: 0462d115441d ("cxgbe: add device related operations")
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
TX coalescing waits for ETH_COALESCE_PKT_NUM packets to be coalesced
across bursts before transmitting them. For slow traffic, such as
100 PPS, this approach increases latency since packets are received
one at a time and tx coalescing has to wait for ETH_COALESCE_PKT
number of packets to arrive before transmitting.
To fix this:
- Update rx path to use status page instead and only receive packets
when either the ingress interrupt timer threshold (5 us) or
the ingress interrupt packet count threshold (32 packets) fires.
(i.e. whichever happens first).
- If number of packets coalesced is <= number of packets sent
by tx burst function, stop coalescing and transmit these packets
immediately.
Also added compile time option to favor throughput over latency by
default.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Remove RTE_PCI_DRV_INTR_LSC from driver flags, since LSC interrupts
are currently not supported.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Do not count pause frames as part of normal TX/RX Frame/Byte counts.
Also, switch to using software counters rather than hardware for RX
stats.
Fixes: 856505d303f4 ("cxgbe: add port statistics")
Cc: stable@dpdk.org
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Add support for compressed error vector available in cpl_rx_pkt for
Chelsio T6.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Update RX path to reflect Chelsio T6 register value changes.
Update ingress pack boundary value based on maximum payload size
that can be accommodated by underlying PCI. Update ingress pad
boundary value based on smallest memory controller bus width
possible. Enforce alignment for free list pointer start address.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Update informational prints pertaining to underlying hardware.
Add bootstrap firmware version and expansion ROM version prints.
Move the prints to a single function.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Add 25G and 100G link speeds and update supported port modules.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Move code to get the available ports from the firmware after it had
been reset. This ensures that driver uses the latest info on available
ports after firmware reset.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Update flash part identification and decoding to accommodate new
flash parts.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Add code to detect and run T6 devices. Update PCI ID Device table
with Chelsio T6 device ids and update documentation.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Instead of many PMD define their own macro, define a generic one in
ethdev and use that in PMDs.
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Allain Legacy <allain.legacy@windriver.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
vfio is the kernel framework used by the vfio-pci kernel driver.
DPDK drivers do not rely solely on vfio, but rather on vfio-pci to gain
access to pci resources.
Fixes: 0880c40113ef ("drivers: advertise kmod dependencies in pmdinfo")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@6wind.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
The PCI code will move to the bus drivers directory.
Rename functions from rte_eal_pci_ to rte_pci_
to prepare the move of the driver out of EAL.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Check return value of malloc.
Fixes: 3bd122eef2cc ("cxgbe/base: add hardware API for Chelsio T5 series adapters")
Cc: stable@dpdk.org
Signed-off-by: Henry Cai <caihe@huawei.com>
Acked-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
