Delete 'case I40E_VIRTCHNL_OP_FCOE', as it is not necessary. The
default case reports on all unsupported commands included this one.
This also prevents warnings about a missing "break" at the end of the
"case" block.
Coverity issue: 13265
Fixes: 4861cde461 ("i40e: new poll mode driver")
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
This patch fixes the issues reported by Coverity of 'Dereference
before null check', by deleting unnecessary null checks, or moving
null checks to before the offending use of the pointer.
Coverity issue: 13298, 13299, 13294, 13301, 119267
Fixes: 8e109464c0 ("i40e: allow vector Rx and Tx usage")
Fixes: a778a1fa2e ("i40e: set up and initialize flow director")
Fixes: a778a1fa2e ("i40e: set up and initialize flow director")
Fixes: 4861cde461 ("i40e: new poll mode driver")
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
enic_alloc_consistent() allocated memory, but enic_free_consistent()
was an empty function, so allocated memory was never freed.
This commit adds a list and lock to the enic structure to keep track
of the memzones allocated in enic_alloc_consistent(), and
enic_free_consistent() uses that information to properly free memory.
Fixes: fefed3d1e6 ("enic: new driver")
Signed-off-by: Nelson Escobar <neescoba@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
The enic_clsf_init() function is called once per enic instance, but it
used a static name to create the hash table. Consequently when using
more than one enic instance, there was a name collision which caused
errors:
EAL: memzone_reserve_aligned_thread_unsafe():
memzone<RG_HT_enicpmd_clsf_hash> already exists
RING: Cannot reserve memory
HASH: memory allocation failed
PMD: rte_enic_pmd: Init of hash table for clsf failed.
Flow director feature will not work
This patch changes the name to be unique per enic instance.
Fixes: fefed3d1e6 ("enic: new driver")
Signed-off-by: Nelson Escobar <neescoba@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
Compilation errors:
mlx4:
drivers/net/mlx4/mlx4.c(5409): error #188:
enumerated type mixed with another type
priv->intr_handle.type = 0;
^
mlx5:
drivers/net/mlx5/mlx5_rxq.c(282): error #188:
enumerated type mixed with another type
enum hash_rxq_type type = 0;
^
and more same type of error.
Fix these by assigning enum values rather than integer values to the enum
variables
Fixes: c4da6caa42 ("mlx4: handle link status interrupts")
Fixes: 198a3c339a ("mlx5: handle link status interrupts")
Fixes: 0d2186743d ("mlx5: manage all special flow types at once")
Fixes: 612ad38209 ("mlx5: fix hash Rx queue type in RSS mode")
Fixes: 083c2dd317 ("mlx5: refactor special flows handling")
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
The "end" variable is assigned and then two lines later is assigned a
different value, making the first assignment useless. Remove it.
Coverity issue: 13335
Fixes: cf4b4708a8 ("ixgbe: improve slow-path perf with vector scattered Rx")
Signed-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Add the missing braces to the 'if' statements to fix the misleading
identation. This also fixes the following build errors when building
with gcc >= 6:
drivers/net/e1000/base/e1000_phy.c:4156:2:
error: this 'if' clause does not guard... [-Werror=misleading-indentation]
if (locked)
drivers/net/e1000/base/e1000_phy.c:4158:3:
note: ...this statement, but the latter is misleadingly indented as if
it is guarded by the 'if'
if (!ready)
drivers/net/e1000/base/e1000_phy.c:4221:2:
error: this 'if' clause does not guard... [-Werror=misleading-indentation]
if (locked)
drivers/net/e1000/base/e1000_phy.c:4223:3:
note: ...this statement, but the latter is misleadingly indented as if
it is guarded by the 'if'
if (!ready)
Signed-off-by: Markos Chandras <mchandras@suse.de>
The ixgbe base driver was updated to version
cid-10g-shared-code.2016.04.12
The changes include:
Added sgmii link for X550.
Added mac link setup for X550a SFP and SFP+.
Added KR support for X550em_a.
Added new phy definitions for M88E1500.
Added support for the VLVF to be bypassed when adding/removing
a VFTA entry.
Added X550a flow control auto negotiation support.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
A work around for a new crosstalk erratum that causes link flap in
entry cages has been introduced. So this patch defines the bit in
NVM that will tell software if this work around is needed.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch adds X550a flow control auto negotiation support.
ixgbe_setup_fc_x550a and ixgbe_fc_autoneg_X550a functions are
added to setup and enable flow control. MAC ops function pointer
fc_autoneg was added so that hardware specific fc autoneg functions
can be called from ixgbe_fc_enable_generic.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Make ixgbe_set_mac_anti_spoofing() consistent with the other
functions that deal with setting VLAN and Ethertype spoofing by
changing the prototype to accept a VF parameter.
Also change the logic for writing the PFVFSPOOF register to be similar
to the MAC and Ethertype functions.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Since PCIe standard defines maximum of 8 functions per device lan_id
is a value 0..7. Because of that, lan_id don't need to be u16.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch changes static keyword to STATIC definition, which can be
redefined depending on the compiler used.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch adds support for the VLAN pool filter (VLVF) to be
bypassed when adding or removing a VLAN filter table array (VFTA) entry.
The PF can utilize the default pool while preserving the VLVF for the
VFs use.
Meanwhile, update the VF operations and drivers where corresponding
functionality is invoked.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch simplifies the adding and removing VLANs from
VFTA/VLVF/VLVFB registers. The logic to determine the registers to use
has been simplified to (vid / 32) and (1 - vid / 32). Many conditional
paths and checks are no longer needed with this patch.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch limits getting and putting the PHY Token to PHY MDIO
access only by adding ixgbe_read_phy_reg_x550a and
ixgbe_write_phy_reg_x550a. The PHY Token is only needed to
synchronize access to the MDIO shared between the two MAC instance.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch corrects the FLA/GSCL/GSCN access offset values according
to the datasheet.
Fixes: 0790adeb56 ("ixgbe/base: support X550em_a device")
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch fixes a possible race issue between ports, when issuing host
interface commands, by acquiring/releasing the management host interface
semaphore in ixgbe_host_interface_command.
Fixes: 36f43e8679 ("ixgbe/base: refactor manageability block communication")
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
For X540 onwards it is possible if a system reset occurs at the
right time to leave the SWFW semaphore high. This new function will
attempt to grab and release the semaphore. If the grab times out it
will still release the semaphore placing it in a known good state.
The idea is to call this when you know no one should be holding the
semaphore (i.e. probe time)
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
There are two device IDs changed from 15C6/15C7 to 15E4/15E5 because of
PHY info changes. 15C6/15C7 IDs are now used for the backplane
SGMII versions.
Also, clean up some discovery kludges from the previous shared ID,
and also add 15C6/15C7 to ixgbe_set_mdio_speed just for paranoia
to control MDIO speed even though nothing should be attached.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
NW_MNG_IF_SEL register is a PHY link configuration register.
Add ixgbe_read_mng_if_sel_x550em to read NW_MNG_IF_SEL, validate
register values and save fields such as PHY MDIO address. This
centralises the reading and checking of the register in one place
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
The ixgbe_vf.h file did not use _<FILENAME>_ and instead used
__<FILENAME>__ which is not the standard used in every other file.
Fixes: af75078fec ("first public release")
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
When there is an error getting the PHY token, the error path
fails to release the locks that it has taken. Release those
locks in that failure case.
Fixes: 86b8fb293f ("ixgbe/base: add sw-firmware sync for resource sharing on X550em_a")
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch renames IXGBE_PVFTTDLEN to IXGBE_PVFTDLEN according to
abbreviation of Transmit Descriptor Length in datasheet.
Fixes: d2e72774e5 ("ixgbe/base: support X550")
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch adds clearing the pool mappings when configuring default
MAC addresses for the interface. Without this there will be the risk
of leaking an address into pool 0 which really belongs to VF 0 when
SR-IOV is enabled.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch updates ixgbe_setup_mac_link_sfp_x550a for X550 SFP+.
ixgbe_set_lan_id_multi_port_pcie has been updated to set the MAC
instance(0/1) which is needed when configuring the external PHY,
since X550a has two instances of MGPK. The MAC instance is read
from the EEPROM.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Use the method pointers instead of direct function calls for IOSF
access so that the right functions can be called on X550EM_a,
compared to other devices using the driver.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Break ixgbe_setup_eee_X550 down to better handle a change from if
statements to switch statements needed to add X550em_a KR support.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
When software sends commands to firmware using the host
slave command interface, firmware fails to receive the
command due to a checksum failed error, as the checksum is
not being correctly set by the driver software.
This patch sets command checksum to the default value of
0xFF, as per the datasheet, therefore the checksum won't
be checked by firmware.
Fixes: 86b8fb293f ("ixgbe/base: add sw-firmware sync for resource sharing on X550em_a")
Fixes: 0790adeb56 ("ixgbe/base: support X550em_a device")
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
An error code indicating that the PF rejects the MAC address change
should be returned, in case that the PF has already assigned a MAC
for the VF.
Fixes: af75078fec ("first public release")
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch adds new phy type and media type to support
SGMII link for X550, and add ixgbe_setup_sgmii to support
SGMII link setup.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This patch adds two new VF requests of IXGBE_VF_GET_RETA and
IXGBE_VF_GET_RSS_KEY to the mailbox API.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
This commit brings back Rx scatter and related support by the MTU update
function. The maximum number of segments per packet is not a fixed value
anymore (previously MLX5_PMD_SGE_WR_N, set to 4 by default) as it caused
performance issues when fewer segments were actually needed as well as
limitations on the maximum packet size that could be received with the
default mbuf size (supporting at most 8576 bytes).
These limitations are now lifted as the number of SGEs is derived from the
MTU (which implies MRU) at queue initialization and during MTU update.
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Vasily Philipov <vasilyf@mellanox.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
The primary purpose of rxq_rehash() function is to stop and restart
reception on a queue after re-posting buffers. This may fail if the array
that temporarily stores existing buffers for reuse cannot be allocated.
Update rxq_rehash() to work on the target queue directly (not through a
template copy) and avoid this allocation.
rxq_alloc_elts() is modified accordingly to take buffers from an existing
queue directly and update their refcount.
Unlike rxq_rehash(), rxq_setup() must work on a temporary structure but
should not allocate new mbufs from the pool while reinitializing an
existing queue. This is achieved by using the refcount-aware
rxq_alloc_elts() before overwriting queue data.
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Vasily Philipov <vasilyf@mellanox.com>
Toggling RX checksum offloads is already done at initialization time. This
code does not belong in rxq_rehash().
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Compared to its previous incarnation, the software limit on the number of
mbuf segments is no more (previously MLX5_PMD_SGE_WR_N, set to 4 by
default) hence no need for linearization code and related buffers that
permanently consumed a non negligible amount of memory to handle oversized
mbufs.
The resulting code is both lighter and faster.
With the addition of this code, older GCC versions (such
as 4.8.5) may complain about 'wqe' variable being uninitialized, so
initialize it preemptively, even though it is not necessary to do so.
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
The space necessary to store segmented packets cannot be known in advance
and must be verified for each of them.
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
This feature enables the TX burst function to emit up to 5 packets using
only two work queue entries (WQEs) on devices that support it. Saves PCI
bandwidth and improves performance.
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Olga Shern <olgas@mellanox.com>
Implement send inline feature which copies packet data directly into
work queue entries (WQEs) for improved latency. The maximum packet
size and the minimum number of Tx queues to qualify for inline send
are user-configurable.
This feature is effective when HW causes a performance bottleneck.
Signed-off-by: Yaacov Hazan <yaacovh@mellanox.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Replacing the variable countdown (which depends on the number of
descriptors) with a fixed relative threshold known at compile time improves
performance by reducing the TX queue structure footprint and the amount of
code to manage completions during a burst.
Completions are now requested at most once per burst after threshold is
reached.
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Vasily Philipov <vasilyf@mellanox.com>
Mini (compressed) completion queue entries (CQEs) are returned by the
NIC when PCI back pressure is detected, in which case the first CQE64
contains common packet information followed by a number of CQE8
providing the rest, followed by a matching number of empty CQE64
entries to be used by software for decompression.
Before decompression:
0 1 2 6 7 8
+-------+ +---------+ +-------+ +-------+ +-------+ +-------+
| CQE64 | | CQE64 | | CQE64 | | CQE64 | | CQE64 | | CQE64 |
|-------| |---------| |-------| |-------| |-------| |-------|
| ..... | | cqe8[0] | | | . | | | | | ..... |
| ..... | | cqe8[1] | | | . | | | | | ..... |
| ..... | | ....... | | | . | | | | | ..... |
| ..... | | cqe8[7] | | | | | | | | ..... |
+-------+ +---------+ +-------+ +-------+ +-------+ +-------+
After decompression:
0 1 ... 8
+-------+ +-------+ +-------+
| CQE64 | | CQE64 | | CQE64 |
|-------| |-------| |-------|
| ..... | | ..... | . | ..... |
| ..... | | ..... | . | ..... |
| ..... | | ..... | . | ..... |
| ..... | | ..... | | ..... |
+-------+ +-------+ +-------+
This patch does not perform the entire decompression step as it would be
really expensive, instead the first CQE64 is consumed and an internal
context is maintained to interpret the following CQE8 entries directly.
Intermediate empty CQE64 entries are handed back to HW without further
processing.
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Olga Shern <olgas@mellanox.com>
Signed-off-by: Vasily Philipov <vasilyf@mellanox.com>
The intent is to replace the remaining compile-time options and environment
variables with a common mean of runtime configuration. This commit only
adds the kvargs handling code, subsequent commits will update the rest.
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
