The ice_memdup doesn't check the new allocated memory pointer, it calls
the rte_memcpy directly. It should check it.
Fixes: 5f0978e96220 ("net/ice/base: add OS specific implementation")
Cc: stable@dpdk.org
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Add support for PFCP, L2TP, ESP and AH RSS enabling.
Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Take network order for gtpu fdir filter.
Fixes: b5c274f4e2ad ("net/ice/base: support FDIR for GTPU QFI field")
Cc: stable@dpdk.org
Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Change ice_set_fd_desc_val to static, since it only be used
internally.
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
This patch add support switch rule for PFCP and NAT-T
packet base on profile rule, PFCP and NAT-T packet will not
be matched on any packet fields, but instead matches
the profile that the packet hits in the switch block.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Move some macro from ice_switch.c to ice_switch.h. Currently this
is only required by kernel driver, DPDK just to sync the code.
Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
ICE_BLK_FD and ICE_BLK_RSS are executing the same code so group the case
statements together instead of duplicating code for each block.
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
A race condition between FW and SW can occur between admin queue setup
and the first command sent. A link event may occur and FW attempts to
notify a non-existent queue. FW will set the critical error bit and
disable the queue. When this happens retry queue setup.
Signed-off-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
A GTPU header can stack with a extend header or not, while
current implementation does not allow HDR bit sets like below:
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_EH
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_UP
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_DWN
Which is not convenient for upper layer flow parser to
generate correct HDR bit.
but it could be if we have below assumptions:
ICE_FLOW_SEG_HDR_GTPU_DWN -- for GTPU with extend header down link
ICE_FLOW_SEG_HDR_GTPU_UP -- for GTPU with extend header up link
ICE_FLOW_SEG_HDR_GTPU_EH -- for GTPU with any extend header
ICE_FLOW_SEG_HDR_GTPU_IP -- for any GTPU header, but when it combined
with any above it downgrade to a dummy one.
And handle from specific case to generic case will hit all the cases
as expected.
if else (hdr & ICE_FLOW_SEG_HDR_GTPU_DWN) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_UP) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_EH) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_IP {
...
}
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Switch rules usually match packet fields to take actions. Add capability
to add a switch rule that does not match any packet fields, but instead
matches the profile that the packet hits in the switch block.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Added new value for cmd_flag:
Persistently set the DCB configuration mode for the current port.
Added new value for valid_flags: represent bit#1 of command flag
Signed-off-by: Sharon Haroni <sharon.haroni@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Add new API function to allow user to choose port
on which mac vlan rule going to be added.
Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
We will remove the logic of configuring the flow control out of the
ice_set_fc(...) function. The goal is to enable any driver to combine
all PHY related flow logic, without repeatedly call ice_aq_set_phy_cfg.
Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
In order to support switch rule for ethertype filter
with ipv6 ethertype id, it has to check ethertype
then find a proper dummy packet.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
When setting the PHY cfg (CQ cmd 0x0601), if the firmware responds
with an EMODE error, software will ignore the error as it simply
means that manageability (ex: BMC) is in control of the link and that
the new setting may not be applied.
Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
The scope of these variables can be reduced, so do so. This also
eliminates the need for the extra wrapping/braces.
Also, compact a line since it can fit within 80 columns
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Add macro for FDID priority 0 and 3, also adjust the
fdid_prio position to sync with kernel driver.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
In order to support switch rule for PPPOE packet
with ipv6 payload, it has to use a new dummy packet
with ipv6 format.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Add a lock for protecting the tunnel table while adding, removing
and searching tunnels.
Add reference counting to tunnels so that multiple instances
of the same tunnel port can be created. Only physically
destroy the tunnel when all instances of that tunnel have been
destroyed.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
In order to support switch rule for NVGRE packets,
it need to check ipv4 next protocol number, if it is 0x2F,
which means next payload is NVGRE, we need to use NVGRE
format dummy packet.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Cleanup some things found while doing code review:
- Remove unnecessary initializations, parenthesis, and braces
- Fix a couple of function headers
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
The manage MAC write command was implemented in an overly complex way
that actually didn't work, as it wasn't symmetric to the manage MAC
read command, and was feeding bytes out of order to the firmware. Fix
the implementation by just using a simple array to represent the MAC
address when it is being written via firmware command.
Fixes: a90fae1d0755 ("net/ice/base: add admin queue structures and commands")
Cc: stable@dpdk.org
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Check the OS and NVM package versions before downloading the package.
If the OS package version is not compatible with NVM then return an
appropriate error.
Split the 32-byte segment name into a 28-byte segment name and
a 4-byte Track-ID. Older packages will still work with this change
because no package has a name that will take up more than 28 bytes;
in this case the Track-ID will be 0.
Note that the driver will store the segment name as 32-bytes in the
ice_hw structure, in order to normalize the length of the various
package name strings that it uses.
Also add section ID and structure for the segment metadata section.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
When reading from the NVM using a flat address, it is useful to know the
upper bound on the size of the flash contents. This value is not stored
within the NVM.
We can determine the size by performing a bisection between upper and
lower bounds. It is known that the size cannot exceed 16 MB (offset of
0xFFFFFF).
Use a while loop to bisect the upper and lower bounds by reading one
byte at a time. On a failed read, lower the maximum bound. On
a successful read, increase the lower bound.
Save this as the flash_size in the ice_nvm_info structure that contains
data related to the NVM.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
The ice_get_pfa_module_tlv and ice_read_pba_string functions primarily
deal with reading from the Shadow RAM portion of the NVM contents. As
these functions are NVM focused, move them into the ice_nvm.c file.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
DCF runs as a VF so it can't access PF registers. And export the filter
management list static functions as public for make DCF initialization.
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Add the hook to send the PF's AdminQ command in another path, like not
directly to the firmware.
If the AdminQ command is sent through the hook path, it needs to save
the AQ error codes from firmware as the last status for admin control
queue, so that the AdminQ command function can use it to do exception
handling like the buffer size is not enough according to error ENOMEM.
And convert explicitly the hook path result to the ice_status type.
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Update copyright date to 2020.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Add all ACL related code.
Signed-off-by: Real Valiquette <real.valiquette@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Currently the NVM and Option ROM version information is stored in
a minimal format. The ice_get_nvm_version function exists to extract
this information for display.
This needlessly complicates using these fields as the extraction
function must be called to parse the NVM and Option ROM data. Further
confusion occurs because the prefix of "oem_" is used for the Option
ROM version. This appears to have been done because the Option ROM data
was requested for display by OEMs.
Refactor this code so that the NVM version and Option ROM version
components are extracted immediately.
Introduce a new struct ice_orom_info which will store the Option ROM
major, build, and patch numbers. Introduce the new major_ver and
minor_ver fields to store the NVM version in its high and low byte
components.
Remove the ice_get_nvm_version function. Instead, use the same logic to
convert the fields read from the NVM into the extracted format.
This simplifies use of these fields as they will be stored already
parsed, without needing to use the bit masks or call
ice_get_nvm_version.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
In this patch, we will modify the ice_copy_phy_caps_to_cfg(...) function
to conditionally fill up the
ice_aqc_set_phy_cfg_data.module_compliance_enforcement with correct
value, based on the PHY persistent feature.
Apply the ice_copy_phy_caps_to_cfg() function inside ice_set_fc()
Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Adjust variable size between u8 and u16 to fix casting issues
Also fix couple coding style issues
Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Remove the ice_read_sr_aq function and implement ice_read_sr_word_aq
directly in terms of the new ice_read_flat_nvm function. This simplifies
the code by reducing a now unnecessary reading function.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
The ice_aq_read_nvm function uses a somewhat weird construction for
verifying that the incoming offset is valid. Replace this construction
with a simple greater-than expression, and define the maximum value
(24bits) in the ice_adminq_cmd.h
By providing a macro, the check becomes more clear. Additionally the
maximum offset can be used in other locations.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
The ice_read_sr_buf_aq function implements logic to correctly break
apart NVM reads into 4Kb chunks. Additionally, it ensures that each read
never crosses a Shadow RAM sector boundary. This logic is useful when
reading the flat NVM as a byte-addressable stream.
Extract that logic in terms of bytes and implement it as
ice_read_flat_nvm. Use this new function to implement ice_read_sr_buf_aq
function.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Adds masks indicating AN clauses to the Get PHY Capabilities
command. Changes the name of the low_power_ctrl field to be
properly descriptive of it being an AN field.
Signed-off-by: Lev Faerman <lev.faerman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Adds the Driver Shared Parameters (0x0C90) AQ command.
Signed-off-by: Lev Faerman <lev.faerman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
As title.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Fix abbreviations as found by abbrevcheck
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Add a new MAC type ICE_MAC_E810 to distinguish E810 devices from other
devices. MAC types for all other devices will be ICE_MAC_GENERIC till
there's a need to distinguish further between devices.
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Adds functions to check for link override firmware support and get
the override settings for a port. Link override allows a user to force
link settings that are not normally supported.
Firmware support is version dependent so a function to check support has
been added.
The link FC settings will use the override if available.
Signed-off-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Enable GTPU uplink and downlink flag usage.
TCAM with different GTPU extend header flag can be separated.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
This is a collection of minor fixes that were found during code review.
Changes are:
- Call ice_hweight8() instead of calculating it ourselves in
ice_bits_max_set().
- Call ice_test_and_clear_bit() over calling ice_is_bit_set() then
ice_clear_bit() in ice_rem_vsi_rss_list().
- Remove 'chrs' variable in ice_add_prof_id_flow() as it's not being
used for anything.
- Return result directly instead of assigning to variable then
returning the variable in ice_rem_vsig().
- Reduce scope, and don't initialize, 'or_vsig' in
ice_add_prof_id_flow().
- Return error immediately in ice_add_prof_id_vsig(). Since the memory
wasn't allocated, there is no need to goto and attempt to free memory.
- Show that values 37-38 are reserved in ice_flow_avf_hdr_field as the
other reserved values are shown.
- Fix RCT ordering
- Remove initialization of values that aren't needed
- Fix function headers to match function names
- Use offsetof instead of calculating ourselves in ice_pkg_buf_alloc()
- In ice_rem_prof(), do not set status to ICE_SUCCESS as, due to code
flow, this will always be ICE_SUCCESS.
- Remove unnecessary semicolon in ice_prof_gen_key()
- Remove unnecessary initializations
- correct bw_alloc type in ice_sched_add_root_node
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
As title, these macros are added for future use.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Refactor function ice_prof_bld_xlt2, a switch statement is better suited
for this situation and eliminates the need for the "found" variable.
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
The variable name 'type' is not very descriptive. Replace instances of
those with a variable name that is more descriptive or replace it if not
needed.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
For structures using the common C "struct hack" technique to create a
flexible length structure member at the end of the structure, use the
ice_struct_size macro to determine the length of the structure instead
of open coding the calculation.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Use enum ice_flow_field directly so no need to be converted
from u16 for ice_flow_xtract_fld
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Add new API function which allow user to choose port on which
VLAN and ethertype rule going to be added.
Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Read the GLGEN_CLKSTAT_SRC register to determine which PSM clock
frequency is selected. This ensures that the rate limiter profile
calculations will be correct.
Fixes: 453d087ccaff ("net/ice/base: add common functions")
Cc: stable@dpdk.org
Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
