Commit Graph

21963 Commits

Author SHA1 Message Date
Bing Zhao
c42f44bd1b net/mlx5: reorganize flow structures
Common structures used for mlx5 flow creating and destroying are
reorganized in order to separating the parts only for destroying
from all the items.
The "mlx5_flow" will contain the common items of DV and Verbs flow,
specific items for DV / Verbs only. These items will only be used
when creating a flow.
At the end of "mlx5_flow", a nested structure "mlx5_flow_handle"
located. It contains all the items used both for creating and
destroying a flow. Also, it consists of common items, and DV / Verbs
specific items.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:05 +02:00
Bing Zhao
8db7e3b698 net/mlx5: change operations for non-cached flows
When stopping a mlx5 device, all the flows inserted will be flushed
since they are with non-cached mode. And no more action will be done
for these flows in the device closing stage.
If the device restarts after stopped, no flow with non-cached mode
will be re-inserted.
The flush operation through rte interface will remain the same, and
all the flows will be flushed actively.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:05 +02:00
Wisam Jaddo
dac98e8780 net/mlx5: fix zero value validation for metadata
MARK and META items are interrelated with datapath -
they might move from/to the applications in mbuf.

zero value for these items has the special meaning -
it means "no metadata are provided", not zero values
are treated by applications and PMD as valid ones.

Moreover in the flow engine domain the value zero is
acceptable to match and set, and we should allow to
specify zero values as rte_flow parameters for the
META and MARK items and actions. In the same time
zero mask has no meaning and should be rejected
on validation stage.

Fixes: fcc8d2f716 ("net/mlx5: extend flow metadata support")
Fixes: e554b672aa ("net/mlx5: support flow tag")
Fixes: 55deee1715 ("net/mlx5: extend flow mark support")
Cc: stable@dpdk.org

Signed-off-by: Wisam Jaddo <wisamm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-04-21 13:57:05 +02:00
Asaf Penso
7c2062c451 net/mlx5: fix call to modify action without init item
The item is being set according to the attribute value, whether it is
udp/tcp or ipv4/6.
Also, there are two condition calls.

If the attribute is neither udp/tcp or ipv4/6 the item is not
initialized at all, but the call to the flow_dv_convert_modify_action is
still being done.
Also, even if the attribute is tcp/udp or ipv4/6, we still have two
conditions.

This patch changes the conditions, so the item will always be set.
By doing this, there is also a save in the number of condition calls.

Fixes: 4bb14c83df ("net/mlx5: support modify header using Direct Verbs")
Cc: stable@dpdk.org

Signed-off-by: Asaf Penso <asafp@mellanox.com>
Reviewed-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:05 +02:00
Dekel Peled
9c4971e523 net/mlx5: update VLAN and encap actions validation
Flow rule in NIC table on VF representor should not contain VLAN pop
or push actions, and encap or decap actions. Using these actions in
NIC table on VF representor is not a valid use case.
This patch updates the various validation functions to reject such
rules.

Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Jack Min <jackmin@mellanox.com>
2020-04-21 13:57:05 +02:00
Alexander Kozyrev
28a4b96321 net/mlx5: prefetch CQEs for a faster decompression
Invalidation of consumed CQEs incurs a performance penalty
due to many cache misses caused by a non-sequential CQEs access.
Prefetch CQEs to get a better data locality and speed up the
decompression of CQEs. Prefetching reduces CPI rate of the
rxq_cq_decompress_v() function from 1 to 0.85 in my environment,
resulting in 2% boost in mpps for 64B frames single core test.

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:05 +02:00
Viacheslav Ovsiienko
70fa0b4ed0 net/mlx5: fix metadata for compressed Rx CQEs
If packets with the same metadata are received with compressed CQE
the metadata value is not copied from the title packet in vectorized
rx_burst routines, it causes wrong metadata values seeing by
applications.

Fixes: a18ac61133 ("net/mlx5: add metadata support to Rx datapath")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:05 +02:00
Shiri Kuzin
53ac93f71a net/mlx5: create relaxed ordering memory regions
In the current state, when preforming read/write
transactions we must wait for a completion in order
to run the next transaction, and all transactions are
performed by order.

Relaxed Ordering is a PCI optimization which by enabling it
we allow the system to perform read/writes in a different
order without having to wait for completion and improve
the performance in that matter.

This commit introduces the creation of relaxed ordering
memory regions in mlx5.
As relaxed ordering is an optimization, drivers that
do not support it can simply ignore it and therefore
it is enabled by default.

Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:05 +02:00
Dekel Peled
a386116c20 doc: update mlx5 firmware configuration guidelines
This patch updates the MLX5 PMD documentations, adding Flex parser
settings and correcting minimal versions numbers.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:05 +02:00
Raslan Darawsheh
c79ab350a8 net/mlx5: fix validation of VXLAN/VXLAN-GPE specs
Trying to create zero spec for vni wasn't allowed, to
avoid matching all packets from previous layer (udp).
This behavior is incorrect, since VXLAN is being identified
through the outer UDP destination port.

Currently, if the user didn't specify outer UDP destination
port the PMD will automatically match only on  outer
UDP port of 4798, and if the user want to match on some none
standard port he need to specify it explicitly in the rule.

This removes the limitation of vni spec to be able to match any
vni.

Fixes: 23c1d42c71 ("net/mlx5: split flow validation to dedicated function")
Cc: stable@dpdk.org

Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-04-21 13:57:05 +02:00
Wei Zhao
2278754485 net/ixgbe: fix e-tag definition
e_tag_ether_type has been wrongly defined as bool type which introduces
a bug for etag/etag_strip for x550 NIC. Fixes it by defining it as
uint16_t.

Fixes: ad43b7bce9 ("net/ixgbe: avoid multiple definitions of bool")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-04-21 13:57:05 +02:00
Tao Zhu
efa8c72f1e net/ixgbe: fix link status inconsistencies
Setting LINK UP or LINK DOWN is divided into two parts, with
the main task done in a separate thread, which can take up
to 9 seconds. If cancel the thread in execution, may cause state
inconsistencies. Therefore, must wait for the previous setting
to exit normally before setting the new state.

Note: before using threads, use alarm to handle main tasks.
When canceling alarm, the execution of alarm will not be interrupted.

Fixes: 819d0d1d57 ("net/ixgbe: fix blocking system events")
Cc: stable@dpdk.org

Signed-off-by: Tao Zhu <taox.zhu@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Tested-by: Yu Jiang <yux.jiang@intel.com>
2020-04-21 13:57:05 +02:00
Haiyue Wang
3b3757bda3 net/ice: get VF hardware index in DCF
The DCF (Device Config Function) needs the hardware index of the VFs to
control the flow setting. And also if the VF resets, the index may be
changed, so it should handle this in VF reset event.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-04-21 13:57:05 +02:00
Haiyue Wang
0b02c95194 net/ice: handle PF initialization by DCF
The DCF (Device Config Function) works at the user PF level, it can't
access the real PF hardware directly. So it will pass through the PF's
AdminQ command by the DCF's mailbox.

And the DCF is mainly used to control the flow setting of other VFs, so
it only needs to initialize some core functions related to the flow.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-04-21 13:57:05 +02:00
Haiyue Wang
3bde63e792 net/ice: export DDP definition symbols
A new DCF PMD will be introduced, which runs on Intel VF hardware, and
it is a pure software design to control the advance functionality (such
as switch, ACL) for rest of the VFs.

The DCF (Device Config Function) feature shares the core functions of
the ICE PMD, like it needs to export the DDP definition symbols for the
new DCF PMD use.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-04-21 13:57:05 +02:00
Haiyue Wang
daa714d55c net/ice: handle AdminQ command by DCF
The DCF (Device Config Function) splits the AdminQ command into two
parts: one is the descriptor of AdminQ command, the other is the buffer
of AdminQ command (the descriptor has BUF flag set). When both of them
are received by the PF, the PF will handle them as one command.

And also, the filled descriptor and buffer of the response will be sent
back to DCF one by one through the virtchnl from PF.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-04-21 13:57:05 +02:00
Haiyue Wang
cf5cad3bc7 net/ice: acquire and disable DCF capability
Since the DCF (Device Config Function) controls the flow setting of
other VFs by the mailbox with PF, for security, it needs to acquire
the DCF capability from PF when starts, and disable it when exits.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-04-21 13:57:05 +02:00
Haiyue Wang
7564d55096 net/ice: add DCF hardware initialization
Introduce the DCF (Device Config Function) feature in the ice PMD, it
works as a standalone PMD which doesn't handle the packet Rx/Tx related
things. Its hardware entity is the VF.

Add the basic DCF hardware initialization, this is specified by devarg
'cap=dcf'.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-04-21 13:57:05 +02:00
Haiyue Wang
4cce7422dd net/iavf: stop PCI probe in DCF mode
A new DCF PMD will be introduced, which runs on Intel VF hardware, and
it is a pure software design to control the advance functionality (such
as switch, ACL) for rest of the VFs.

So if the DCF (Device Config Function) mode is specified by the devarg
'cap=dcf', then it will stop the PCI probe in the iavf PMD.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-04-21 13:57:05 +02:00
Shougang Wang
040b44551f net/iavf: unify Rx packet type table
This patch unified the Rx ptype table.

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Acked-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
109e2abb43 common/iavf: support VSI mapping table
Add an opcode for getting VSI mapping table.
Add an virtchnl event code for VF reset done.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
ddfd1f9b70 common/iavf: support DCF capability negotiation
Add DCF capability flag for VF.
Add an opcode for disabling DCF capability.
Add an virtchnl event code for AVF resetting completion.

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
4831dfa1bd common/iavf: add two opcodes to send AdminQ command
Add two virtchnl opcodes to send the AdminQ command, one is used to
send the descriptor, the other is used to send the buffer payload if
the AdminQ command has BUF flag set.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
72390691c8 common/iavf: update copyright date
Update copyright date to 2020.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
55d61fb27a net/ice/base: add PPPoE IPv6 dummy packet
In order to support switch rule for PPPOE packet
with ipv6 payload, it has to use a new dummy packet
with ipv6 format.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
85351ff53e net/ice/base: add reference count to tunnels
Add a lock for protecting the tunnel table while adding, removing
and searching tunnels.

Add reference counting to tunnels so that multiple instances
of the same tunnel port can be created. Only physically
destroy the tunnel when all instances of that tunnel have been
destroyed.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
47fb3f91d8 net/ice/base: add check to IPv4 next protocol
In order to support switch rule for NVGRE packets,
it need to check ipv4 next protocol number, if it is 0x2F,
which means next payload is NVGRE, we need to use NVGRE
format dummy packet.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
72839bbc80 net/ice/base: cleanup flow director functions
Cleanup some things found while doing code review:

- Remove unnecessary initializations, parenthesis, and braces
- Fix a couple of function headers

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
97ac817f43 net/ice/base: fix MAC write command
The manage MAC write command was implemented in an overly complex way
that actually didn't work, as it wasn't symmetric to the manage MAC
read command, and was feeding bytes out of order to the firmware. Fix
the implementation by just using a simple array to represent the MAC
address when it is being written via firmware command.

Fixes: a90fae1d07 ("net/ice/base: add admin queue structures and commands")
Cc: stable@dpdk.org

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
c4afa96e4d net/ice/base: check DDP package compatibility
Check the OS and NVM package versions before downloading the package.
If the OS package version is not compatible with NVM then return an
appropriate error.

Split the 32-byte segment name into a 28-byte segment name and
a 4-byte Track-ID. Older packages will still work with this change
because no package has a name that will take up more than 28 bytes;
in this case the Track-ID will be 0.

Note that the driver will store the segment name as 32-bytes in the
ice_hw structure, in order to normalize the length of the various
package name strings that it uses.

Also add section ID and structure for the segment metadata section.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
864f74271e net/ice/base: discover and store size of available flash
When reading from the NVM using a flat address, it is useful to know the
upper bound on the size of the flash contents. This value is not stored
within the NVM.

We can determine the size by performing a bisection between upper and
lower bounds. It is known that the size cannot exceed 16 MB (offset of
0xFFFFFF).

Use a while loop to bisect the upper and lower bounds by reading one
byte at a time. On a failed read, lower the maximum bound. On
a successful read, increase the lower bound.

Save this as the flash_size in the ice_nvm_info structure that contains
data related to the NVM.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
77a6499990 net/ice/base: move functions from common to NVM module
The ice_get_pfa_module_tlv and ice_read_pba_string functions primarily
deal with reading from the Shadow RAM portion of the NVM contents. As
these functions are NVM focused, move them into the ice_nvm.c file.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
ed56a562af net/ice/base: do not access some hardware registers in DCF
DCF runs as a VF so it can't access PF registers. And export the filter
management list static functions as public for make DCF initialization.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
c5dccda9f2 net/ice/base: add hook to send AdminQ command
Add the hook to send the PF's AdminQ command in another path, like not
directly to the firmware.

If the AdminQ command is sent through the hook path, it needs to save
the AQ error codes from firmware as the last status for admin control
queue, so that the AdminQ command function can use it to do exception
handling like the buffer size is not enough according to error ENOMEM.

And convert explicitly the hook path result to the ice_status type.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
e0b977dddb net/ice/base: update copyright date
Update copyright date to 2020.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
f3202a097f net/ice/base: add ACL module
Add all ACL related code.

Signed-off-by: Real Valiquette <real.valiquette@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
ac882a0eda net/ice/base: store NVM version in extracted format
Currently the NVM and Option ROM version information is stored in
a minimal format. The ice_get_nvm_version function exists to extract
this information for display.

This needlessly complicates using these fields as the extraction
function must be called to parse the NVM and Option ROM data. Further
confusion occurs because the prefix of "oem_" is used for the Option
ROM version. This appears to have been done because the Option ROM data
was requested for display by OEMs.

Refactor this code so that the NVM version and Option ROM version
components are extracted immediately.

Introduce a new struct ice_orom_info which will store the Option ROM
major, build, and patch numbers. Introduce the new major_ver and
minor_ver fields to store the NVM version in its high and low byte
components.

Remove the ice_get_nvm_version function. Instead, use the same logic to
convert the fields read from the NVM into the extracted format.

This simplifies use of these fields as they will be stored already
parsed, without needing to use the bit masks or call
ice_get_nvm_version.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
2a28af0217 net/ice/base: support PHY persistent feature
In this patch, we will modify the ice_copy_phy_caps_to_cfg(...) function
to conditionally fill up the
ice_aqc_set_phy_cfg_data.module_compliance_enforcement with correct
value, based on the PHY persistent feature.

Apply the ice_copy_phy_caps_to_cfg() function inside ice_set_fc()

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
0aa1ab2fb4 net/ice/base: fix a couple of casting
Adjust variable size between u8 and u16 to fix casting issues
Also fix couple coding style issues

Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
bbed2226fd net/ice/base: implement new shadow RAM read
Remove the ice_read_sr_aq function and implement ice_read_sr_word_aq
directly in terms of the new ice_read_flat_nvm function. This simplifies
the code by reducing a now unnecessary reading function.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
9f041a7214 net/ice/base: add macro specifying max NVM offset
The ice_aq_read_nvm function uses a somewhat weird construction for
verifying that the incoming offset is valid. Replace this construction
with a simple greater-than expression, and define the maximum value
(24bits) in the ice_adminq_cmd.h

By providing a macro, the check becomes more clear. Additionally the
maximum offset can be used in other locations.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
2516684aed net/ice/base: extract logic of flat NVM read to function
The ice_read_sr_buf_aq function implements logic to correctly break
apart NVM reads into 4Kb chunks. Additionally, it ensures that each read
never crosses a Shadow RAM sector boundary. This logic is useful when
reading the flat NVM as a byte-addressable stream.

Extract that logic in terms of bytes and implement it as
ice_read_flat_nvm. Use this new function to implement ice_read_sr_buf_aq
function.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
84551c9565 net/ice/base: add AN masks to get PHY capabilities
Adds masks indicating AN clauses to the Get PHY Capabilities
command. Changes the name of the low_power_ctrl field to be
properly descriptive of it being an AN field.

Signed-off-by: Lev Faerman <lev.faerman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
87e1f7f3d8 net/ice/base: add shared driver parameter command
Adds the Driver Shared Parameters (0x0C90) AQ command.

Signed-off-by: Lev Faerman <lev.faerman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
1d6cf7df2a net/ice/base: add PHY number definition values
As title.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
6cfacf7d71 net/ice/base: capitalize abbreviations
Fix abbreviations as found by abbrevcheck

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
486d29fda5 net/ice/base: add dedicate MAC type for E810
Add a new MAC type ICE_MAC_E810 to distinguish E810 devices from other
devices. MAC types for all other devices will be ICE_MAC_GENERIC till
there's a need to distinguish further between devices.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
6cad4aa1a5 net/ice/base: support link default override
Adds functions to check for link override firmware support and get
the override settings for a port. Link override allows a user to force
link settings that are not normally supported.

Firmware support is version dependent so a function to check support has
been added.

The link FC settings will use the override if available.

Signed-off-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
762e946d59 net/ice/base: support GTPU uplink and downlink
Enable GTPU uplink and downlink flag usage.
TCAM with different GTPU extend header flag can be separated.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
ceb2f4c387 net/ice/base: minor fixes
This is a collection of minor fixes that were found during code review.
Changes are:
- Call ice_hweight8() instead of calculating it ourselves in
  ice_bits_max_set().
- Call ice_test_and_clear_bit() over calling ice_is_bit_set() then
  ice_clear_bit() in ice_rem_vsi_rss_list().
- Remove 'chrs' variable in ice_add_prof_id_flow() as it's not being
  used for anything.
- Return result directly instead of assigning to variable then
  returning the variable in ice_rem_vsig().
- Reduce scope, and don't initialize, 'or_vsig' in
  ice_add_prof_id_flow().
- Return error immediately in ice_add_prof_id_vsig(). Since the memory
  wasn't allocated, there is no need to goto and attempt to free memory.
- Show that values 37-38 are reserved in ice_flow_avf_hdr_field as the
  other reserved values are shown.
- Fix RCT ordering
- Remove initialization of values that aren't needed
- Fix function headers to match function names
- Use offsetof instead of calculating ourselves in ice_pkg_buf_alloc()
- In ice_rem_prof(), do not set status to ICE_SUCCESS as, due to code
  flow, this will always be ICE_SUCCESS.
- Remove unnecessary semicolon in ice_prof_gen_key()
- Remove unnecessary initializations
- correct bw_alloc type in ice_sched_add_root_node

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00