Expand vector PMD support to aarch32.
Enable ixgbe PMD by default for armv7 make build.
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
New cn98xx SOC comes up with two NIX blocks wrt
cn96xx, cn93xx, to achieve higher performance.
Also the no of cores increased to 36 from 24.
Adding support for cn98xx where need a logic to
detect if the LF is attached to NIX0 or NIX1 and
then accordingly use the respective NIX block.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
The Meson cross file is renamed from meson_mingw.txt to cross-mingw,
and is added to test-meson-builds.sh.
The only example supported on Windows so far is "helloworld",
that's why the default list of examples is overridden.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Add cross-compilation support of a PPC target in the build test matrix.
The CPU is defined as Power8, running as little endian.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
Support the debug functions in eal_common_debug.c for Windows.
Implementation of rte_dump_stack to get a backtrace similarly to Unix
and of rte_eal_cleanup in eal.c.
Signed-off-by: Tal Shnaiderman <talshn@mellanox.com>
Tested-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Even if pthread is provided by the toolchain, it is not needed for DPDK
on Windows, because internal shim is used. As a side-effect, this
enables cross-build with MinGW configured with non-POSIX thread library,
e.g. mcfgthread, which is the default on some distributions.
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Pallavi Kadam <pallavi.kadam@intel.com>
Basic memory management supports core libraries and PMDs operating in
IOVA as PA mode. It uses a kernel-mode driver, virt2phys, to obtain
IOVAs of hugepages allocated from user-mode. Multi-process mode is not
implemented and is forcefully disabled at startup. Assign myself as a
maintainer for Windows file and memory management implementation.
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Add hugepages discovery ("large pages" in Windows terminology)
and update documentation for required privilege setup. Only 2MB
hugepages are supported and their number is estimated roughly
due to the lack or unstable status of suitable OS APIs.
Assign myself as maintainer for the implementation file.
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
gcc 10 issues warnings about the use of rearm_data marker
from struct rte_mbuf.
e.g.
../drivers/net/enic/enic_rxtx_vec_avx2.c: In function ‘rx_one’:
../drivers/net/enic/enic_rxtx_vec_avx2.c:21:2:
warning:
array subscript 0 is outside the bounds of an interior zero-length array
‘RTE_MARKER64’ {aka ‘long unsigned int[0]’} [-Wzero-length-bounds]
21 | *(uint64_t *)&mb->rearm_data = enic->mbuf_initializer;
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../lib/librte_mbuf/rte_mbuf.h:45,
from ../drivers/net/enic/enic_rxtx_vec_avx2.c:6:
../lib/librte_mbuf/rte_mbuf_core.h:484:15:
note: while referencing ‘rearm_data’
484 | RTE_MARKER64 rearm_data;
|
Disable this warning for gcc 10 in order to allow v20.05 to build
without changes to struct rte_mbuf.
Bugzilla ID: 396
Cc: stable@dpdk.org
Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
This patch moves telemetry further down the build, and adds it as a
dependency for EAL. Telemetry V2 is now configured to build by default,
and the legacy support is built when the telemetry config flag is set.
Telemetry now has EAL flags, shown below:
"--telemetry" = Enables telemetry (this is default if no flags given)
"--no-telemetry" = Disables telemetry
When telemetry is enabled, it will attempt to open the new socket
version, and also the legacy support socket (this will depend on Jansson
external dependency and telemetry config flag, as before).
Signed-off-by: Ciara Power <ciara.power@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Keith Wiles <keith.wiles@intel.com>
The global include path, which is used by anything built before EAL,
points to the EAL header files so they utility macros etc. can be used
anywhere in DPDK. This path included the OS-specific EAL header files,
but not the architecture-specific ones. This patch moves the selection
of target architecture to the top-level meson.build file so that the
global include can reference that.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Keith Wiles <keith.wiles@intel.com>
Add log infra for node specific logging.
Also, add null rte_node that just ignores all the objects
directed to it.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Graph architecture abstracts the data processing functions as
"node" and "link" them together to create a complex "graph" to enable
reusable/modular data processing functions.
These APIs enables graph framework operations such as create, lookup,
dump and destroy on graph and node operations such as clone,
edge update, and edge shrink, etc. The API also allows creating the
stats cluster to monitor per graph and per node stats.
This patch defines the public API for graph support.
This patch also adds support for the build infrastructure and
update the MAINTAINERS file for the graph subsystem.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Define the public API for trace support.
This patch also adds support for the build infrastructure and
update the MAINTAINERS file for the trace subsystem.
The 8 bytes tracepoint object is a global variable, and can be used in
fast path. Created a new __rte_trace_point section to store the
tracepoint objects as,
- It is a mostly read-only data and not to mix with other "write"
global variables.
- Chances that the same subsystem fast path variables come in the same
fast path cache line. i.e, it will enable a more predictable
performance number from build to build.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: David Marchand <david.marchand@redhat.com>
Add stubs for the FPGA 5GNR FEC PMD
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Acked-by: Dave Burley <dave.burley@accelercomm.com>
Acked-by: Niall Power <niall.power@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Add libatomic as a global dependency when compiling for 32-bit using
clang. As we need libatomic for 64-bit atomic ops.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
The arch-specific directories arm, ppc and x86 in common/include/arch/
are moved as include/ sub-directories of respective arch directories:
- arm/include/
- ppc/include/
- x86/include/
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
Acked-by: David Marchand <david.marchand@redhat.com>
The directories ppc_64 are renamed as ppc in
- config/
- lib/librte_eal/common/arch/
- lib/librte_eal/common/include/arch/
The EAL directories are not really renamed, but symbolically linked,
because they will be moved with their new name in the next commits.
If ppc_32 needs to be supported, it can be in the same directory.
The arch directories arm and x86 are already covering both 32 and 64-bit
sub-architectures.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
Acked-by: David Marchand <david.marchand@redhat.com>
Remove CONFIG_RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC with below
consideration:
1. A default Rx path can always be selected by setting a proper
rx_free_thresh value at runtime, see
ice_check_rx_burst_bulk_alloc_preconditions.
2. Its not a big deal to always reserve more space for desc ring.
"ring_size = (uint16_t)(rxq->nb_rx_desc + ICE_RX_MAX_BURST);"
3. Fixes a potential invalid memory access in ice_reset_rx_queue.
If CONFIG_RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC is turned on while
ice_check_rx_burst_bulk_alloc_preconditions return fail.
Below code will have problem.
for (i = 0; i < ICE_RX_MAX_BURST; ++i)
rxq->sw_ring[rxq->nb_rx_desc + i].mbuf = &rxq->fake_mbuf;
Fixes: 50370662b7 ("net/ice: support device and queue ops")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Clang on Windows doesn't use pthread for now, while MinGW does. Removing
`-pthread` option with MS linker fixes the following warning:
clang: warning: argument unused during compilation: '-pthread'
[-Wunused-command-line-argument]
Option `--no-as-needed` is meaningless for PE output. Disabling it on
Windows fixes the following warning:
LINK : warning LNK4044: unrecognized option '/-no-as-needed'; ignored
Fixes: 98edcbb5a ("eal/windows: introduce Windows support")
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: William Tu <u9012063@gmail.com>
Tested-by: Pallavi Kadam <pallavi.kadam@intel.com>
Acked-by: Pallavi Kadam <pallavi.kadam@intel.com>
Add Meson configuration to cross-compile for Windows using MinGW-w64.
It may require adjustments in some cases, but at least it provides
the foundation.
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: William Tu <u9012063@gmail.com>
Tested-by: Pallavi Kadam <pallavi.kadam@intel.com>
MinGW-w64 linker does not mimic MS linker options, so the build system
must differentiate between linkers on Windows. Use GNU linker options
with GCC and MS linker options with Clang.
MinGW-w64 by default uses MSVCRT stdio, which does not comply to ANSI,
most notably its formatting and string handling functions. MinGW-w64
support for the Universal CRT (UCRT) is ongoing, but the toolchain
provides its own standard-complying implementation of stdio. The latter
is used in the patch to support formatting in DPDK.
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Tested-by: William Tu <u9012063@gmail.com>
Tested-by: Pallavi Kadam <pallavi.kadam@intel.com>
The devices of the family ConnectX may have two letters as suffix.
Such suffix is preceded with a space and the second x is lowercase:
- ConnectX-4 Lx
- ConnectX-5 Ex
- ConnectX-6 Dx
Uppercase of the device family name BlueField is also fixed.
The lists of supported devices are fixed.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
The problem occurred when workaround that makes soname two digits
applied. With this change for the ABI version "20.0.1" the experimental
library version become ".so.2001".
After workaround removed in ABI version 21.0, the experimental library
version will become ".so.210".
"2001" is bigger value than "201" although it is a previous version of
the library version, this can break the version comparisons.
To fix this, introducing a temporary sub level versioning for the
experimental libraries, so that minor version comparison will continue
to work.
After change experimental libraries will follow below versioning:
DPDK version ABI version soname library name
------------ ----------- ------ ------------
DPDK 19.11 20.0 .so.0.200 .so.0.200
DPDK 20.02 20.0.1 .so.0.200.1 .so.0.200.1
DPDK 20.05 20.0.2 .so.0.200.2 .so.0.200.2
DPDK 20.11 21.0 .so.0.210 .so.0.210
DPDK 21.02 21.1 .so.0.211 .so.0.211
Note: After workaround removed in DPDK 20.11 and soname switch back to
single digit this patch won't work and needs to be updated.
Fixes: f26c2b39b2 ("build: fix soname info for 19.11 compatibility")
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Ray Kinsella <ray.kinsella@intel.com>
Some config options are overwritten with the same value
as the one inherited from its template parent.
Such duplicates which have no meaningful comments are removed.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: David Marchand <david.marchand@redhat.com>
Broadcom Stingray is armv8 CPU having cortex-a72. The implementor ID is
0x41 (arm) and the primary part number is 0xd08 (cortex-a72).
Signed-off-by: Qingmin Liu <qingmin.liu@broadcom.com>
While icc builds without the "werror" setting build successfully, there are
a lot of warnings. To make the output cleaner, and to allow building with
warnings enabled, we can add a list of warning ids to ignore.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Add a new driver to support vDPA operations by Mellanox devices.
The first Mellanox devices which support vDPA operations are
ConnectX-6 Dx and Bluefield1 HCA for their PF ports and VF ports.
This driver is depending on rdma-core like the mlx5 PMD, also it is
going to use mlx5 DevX to create HW objects directly by the FW.
Hence, the common/mlx5 library is linked to the mlx5_vdpa driver.
This driver will not be compiled by default due to the above
dependencies.
Register a new log type for this driver.
Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Add makefile and config file options to compile the Pensando ionic PMD.
Add feature and version map file.
Update maintainers file.
Signed-off-by: Alfredo Cardigliano <cardigliano@ntop.org>
Reviewed-by: Shannon Nelson <snelson@pensando.io>
Add the OCTEON TX2 SDP EP device probe along with the
build infrastructure for Make and meson builds.
Signed-off-by: Mahipal Challa <mchalla@marvell.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
CONFIG_RTE_IXGBE_INC_VECTOR is enabled by default, so remove
it and use architecture specific flags.
Signed-off-by: Reshma Pattan <reshma.pattan@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
The rte_wait_until_equal_xx APIs abstract the functionality of
'polling for a memory location to become equal to a given value'.
Add the RTE_ARM_USE_WFE configuration entry for aarch64, disabled
by default. When it is enabled, the above APIs will call WFE instruction
to save CPU cycles and power.
From a VM, when calling this API on aarch64, it may trap in and out to
release vCPUs whereas cause high exit latency. Since kernel 4.18.20 an
adaptive trapping mechanism is introduced to balance the latency and
workload.
Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Using version 0.47.1, meson is unable to find the math library in Travis
for the 32bits job.
Quite surprisingly, this problem is not seen with the 64bits jobs.
Switching to 0.48.0, the problem disappears.
But we should pass 'm' to find_library instead of 'libm' anyway.
Fixes: 98edcbb5ab ("eal/windows: introduce Windows support")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
If the compiler does not recognise the specific CPU when building with the
default "native" machine type, sse4.2 instructions can be missing, causing
a build error. Rather than advising the user to change the machine type,
we can just turn on SSE4.2 directly. This can prevent issues with running
automated tests with older compilers/distros on newer hardware.
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
The soname for each stable ABI version should be just the ABI version major
number without the minor number. Unfortunately both major and minor were
used causing version 20.1 to be incompatible with 20.0.
This patch fixes the issue by switching from 2-part to 3-part ABI version
numbers so that we can keep 20.0 as soname and using the final digits to
identify the 20.x releases which are ABI compatible. This requires changes
to both make and meson builds to handle the three-digit version and shrink
it to 2-digit for soname.
The final fix needed in this patch is to adjust the library version number
for the ethtool example library, which needs to be upped to 2-digits, as
external libraries using the DPDK build system also use the logic in this
file.
Fixes: cba806e07d ("build: change ABI versioning to global")
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
Tested-by: Ray Kinsella <mdr@ashroe.eu>
Tested-by: Ferruh Yigit <ferruh.yigit@intel.com>
Tested-by: Kevin Laatz <kevin.laatz@intel.com>
Tested-by: David Marchand <david.marchand@redhat.com>
Meson fails to find a pkg-config executable if pkgconfig
isn't set for aarch64. The environment variable `PKG_CONFIG_PATH`
is useless in this case, and meson fails to locate dependencies
that are built in non-standard paths.
Signed-off-by: Ali Alnubani <alialnu@mellanox.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Remove trailing blank lines. They serve no purpose and are just
editor leftovers.
These can cause git to complain about whitespace errors during merges.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
While most windows apps can handle both "\" and "/" as path separators,
"more" is treating the "/" as the start of a command-line flag in this
case, causing errors.
Fixes: cba806e07d ("build: change ABI versioning to global")
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Tested-by: Pallavi Kadam <pallavi.kadam@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Add the make and meson based build infrastructure for the eMAG platform
from Ampere Computing corp., which is a 64-bit ARM processor with 32
Armv8 64-bit CPU cores. For more information, refer to:
https://amperecomputing.com/product/
Signed-off-by: Jerry Hao OS <jerryhao@os.amperecomputing.com>
Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
To make the list complete and consistent, add cortex-a76 configuration.
Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Arm N1 SDP is an infrastructure segment development platform
based on armv8.2-a Neoverse N1 CPU. For more information, refer to:
https://community.arm.com/developer/tools-software/oss-platforms/w/
docs/440/neoverse-n1-sdp
Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
As per new ABI policy [1], all of the libraries are now versioned using
one global ABI version. Stable libraries use the MAJOR.MINOR ABI
version for their shared objects, while experimental libraries
use the 0.MAJORMINOR convention for their versioning.
Experimental library versioning is managed globally. Changes in this
patch implement the necessary steps to enable that.
The CONFIG_RTE_MAJOR_ABI option was introduced to permit multiple
DPDK versions installed side by side. The problem is now addressed
through the new ABI policy, and thus can be removed.
[David] For external libraries relying on Makefile, LIBABIVER is
preserved to avoid using DPDK global ABI version.
[1] https://doc.dpdk.org/guides/contributing/abi_policy.html
Signed-off-by: Marcin Baran <marcinx.baran@intel.com>
Signed-off-by: Pawel Modrak <pawelx.modrak@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
In PAC N3000 card, this is a BMC chip which using MAX10 FPGA
to manage the board configuration, like sensors, flash controller,
QSFP, powers. And this is a SPI bus connected between A10 FPGA and
MAX10, we can access the MAX10 registers over this SPI bus.
In BMC, there are about 19 sensors in MAX10 chip, including the FPGA
core temperature, Board temperature, board current, voltage and so on.
We use DTB (Device tree table) to describe it. This DTB file is store
in nor flash partition, which will flashed in Factory when the boards
delivery to customers. And the same time, the customers can easy to
customize the BMC configuration like change the sensors.
Add device tree support by using libfdt library in Linux distribution.
The end-user should pre-install the libfdt and libfdt-devel package
before use DPDK on PAC N3000 Card.
For Centos 7.x: sudo yum install libfdt libfdt-devel
For Ubuntu 18.04: sudo apt install libfdt-dev libfdt1
To eliminate build error, we currently do not compile raw/ifpga
and net/ipn3ke. User should install libfdt and libfdt-devel first,
modify config/common_linux, CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=n
to CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=y, modify config/common_base,
CONFIG_RTE_LIBRTE_IPN3KE_PMD=n to CONFIG_RTE_LIBRTE_IPN3KE_PMD=y.
Then this function can work.
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Signed-off-by: Andy Pei <andy.pei@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Add IRQ support for ifpga FME global error, port error and unit.
We implemented this feature by vfio interrupt mechanism.
To build this feature, CONFIG_RTE_EAL_VFIO should be enabled.
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Signed-off-by: Andy Pei <andy.pei@intel.com>
This patch adds an option to enable link time optimization. In addition
to LTO option itself (-flto) fat-lto-objects are being used. This is
because during the build pmdinfogen scans the generated ELF objects to
find this_pmd_name* symbol in symbol table. Without fat-lto-objects gcc
produces ELF only with extra symbols for internal use during linking.
Signed-off-by: Andrzej Ostruszka <aostruszka@marvell.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
