1611 Commits

Author SHA1 Message Date
Jason Wang
7a75276ef5 net/virtio: support IOMMU platform
Negotiate VIRTIO_F_IOMMU_PLATFORM to have IOMMU support.

Signed-off-by: Jason Wang <jasowang@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2016-10-11 10:28:34 +02:00
Jason Wang
4c7903658f net/virtio: support modern device id
Add modern device id and rename VIRTIO_PCI_DEVICEID_MIN to
VIRTIO_PCI_LEGACY_DEVICEID_NET. While at it, remove unused macros too.

Signed-off-by: Jason Wang <jasowang@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2016-10-11 10:28:34 +02:00
David Marchand
cd433ce57a net/virtio: add missing driver name
The driver name has been lost with the eal rework.
Restore it.

Fixes: c830cb295411 ("drivers: use PCI registration macro")

Signed-off-by: David Marchand <david.marchand@6wind.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2016-10-11 10:28:34 +02:00
Souvik Dey
4ec2424a61 net/virtio: set MTU
Virtio interfaces do not currently allow the user to specify a particular
Maximum Transmission Unit (MTU). Consequently, the MTU of Virtio interfaces
is typically set to the Ethernet default value of 1500.
This is problematic in the case of cloud deployments, in which a specific
(and potentially non-standard) MTU needs to be set by a DHCP server, which
needs to be honored by all interfaces across the traffic path.To acheive
this Virtio interfaces should support setting of MTU.
In case when GRE/VXLAN tunneling is used for internal communication, there
will be an overhead added by the infrastructure in the packet over and
above the ETHER MTU of 1518. So to take care of this overhead in these
cases the DHCP server corrects the L3 MTU to 1454. But since virtio
interfaces was not having the MTU set functionality that MTU sent by the
DHCP server was ignored and the instance will still send packets with 1500
MTU which after encapsulation will become more than 1518 and eventually
gets dropped in the infrastructure.
By adding an additional 'set_mtu' function to the Virtio driver, we can
honor the MTU sent by the DHCP server. The dhcp server/controller can
then leverage this 'set_mtu' functionality to resolve the above
mentioned issue of packets getting dropped due to incorrect size.

Signed-off-by: Souvik Dey <sodey@sonusnet.com>
Reviewed-by: Mark Kavanagh <mark.b.kavanagh@intel.com>
Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2016-10-11 10:28:13 +02:00
Jianfeng Tan
c59faf3fe8 net/i40e: support TSO on tunneling packet
To enable Tx side offload on tunneling packet, driver should set
correct tunneling parameters: (1) EIPT, External IP header type;
(2) EIPLEN, External IP; (3) L4TUNT; (4) L4TUNLEN. This parsing
behavior is based on (ol_flag & PKT_TX_TUNNEL_MASK). And when
it's a tunneling packet, MACLEN defines the outer L2 header.

Also, we define TSO on each kind of tunneling type as a capabilities.
Now only i40e declares to support them.

Signed-off-by: Zhe Tao <zhe.tao@intel.com>
Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2016-10-09 23:19:15 +02:00
Fiona Trahe
a831c318c5 crypto/aesni_mb: free ring memory on queue release
Free ring memory on queue_pair release, else
releasing and setting up queue-pair of a different size fails.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-08 17:54:38 +02:00
Slawomir Mrozowicz
d61f70b4c9 crypto/libcrypto: add driver for OpenSSL library
This code provides the initial implementation of the libcrypto
poll mode driver. All cryptography operations are using Openssl
library crypto API. Each algorithm uses EVP_ interface from
openssl API - which is recommended by Openssl maintainers.

This patch adds libcrypto poll mode driver support to librte_cryptodev
library.

Signed-off-by: Slawomir Mrozowicz <slawomirx.mrozowicz@intel.com>
Signed-off-by: Michal Kobylinski <michalx.kobylinski@intel.com>
Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Signed-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-10-08 17:54:37 +02:00
Pablo de Lara
cf7685d68f crypto/zuc: add driver for ZUC library
Added new SW PMD which makes use of the libsso SW library,
which provides wireless algorithms ZUC EEA3 and EIA3
in software.

This PMD supports cipher-only, hash-only and chained operations
("cipher then hash" and "hash then cipher") of the following
algorithms:
- RTE_CRYPTO_SYM_CIPHER_ZUC_EEA3
- RTE_CRYPTO_SYM_AUTH_ZUC_EIA3

The ZUC hash and cipher algorithms, which are enabled
by this crypto PMD are implemented by Intel's libsso software
library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-08 17:53:10 +02:00
Pablo de Lara
94831f8f1d crypto: fix build with icc
This commit fixes a compilation error on icc,
due to unallowed conversion from int to enum:

drivers/crypto/snow3g/rte_snow3g_pmd.c(155):
    error #188: enumerated type mixed with another type
        sess->op = mode;
                 ^
drivers/crypto/kasumi/rte_kasumi_pmd.c(155):
    error #188: enumerated type mixed with another type
        sess->op = mode;
                 ^

Fixes: 3aafc423cf4d ("snow3g: add driver for SNOW 3G library")
Fixes: 2773c86d061a ("crypto/kasumi: add driver for KASUMI library")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
b2bb359747 crypto/aesni_gcm: move pre-counter block to driver
This patch moves computing of pre-counter block into the AESNI-GCM
driver so it can be moved from test files.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Fiona Trahe
e1b7f509e6 crypto/qat: add 3DES cipher algorithm
3DES support added to QuickAssist PMD with CTR and CBC mode.
Both cipher-only and chained with HMAC_SHAx.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Fiona Trahe
0fad384df0 crypto/qat: cleanup code
Cleanup of unused code.
Rename and simplify a badly named struct element, was aes, but
used for all types of ciphers.
Print correct error msg (Unsupported rather than Undefined)
for all ciphers not supported by QAT PMD.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Pablo de Lara
af9f6afb14 crypto: rename all KASUMI references
KASUMI algorithm has all uppercase letters,
but some references of it had some lowercase letters.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Pablo de Lara
6aef763816 crypto: rename some SNOW 3G references
SNOW 3G algorithm has all uppercase letters in its name
and a space between SNOW and 3G, but some references of it
had some lowercase letters or no space.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
05175ec459 crypto/qat: fix FreeBSD build
Using sys/types.h instead of linux/types.h
so as to compile QAT_PMD on FreeBSD.

Fixes: 1703e94ac5ce ("qat: add driver for QuickAssist devices")

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
2fa64f840d crypto/qat: add GMAC capability
Added Galois Message Authentication Code (GMAC) capability to
QuickAssist Technology symmetric cryptographic driver.
GMAC is authentication only variant of Galois Counter Mode (GCM)
where all plaintext is provided with AAD pointer only.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
f2f639c6e0 crypto/qat: add C3xxx device
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
ae20c0735c crypto/qat: add C62x device
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
d4f2745300 crypto/qat: add KASUMI
This patch add kasumi support in Intel(R)
QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
6bc4300318 crypto/null: fix key size increment value
This patch fixes the values of increment in key size.

Fixes: 94b0ad8e0aa5 ("null_crypto: add driver for null crypto operations")

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
db0e952a5c crypto/qat: add NULL capability
Enabled NULL crypto for Intel(R) QuickAssist Technology.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
d905ee32d0 crypto/qat: add aes-sha384-hmac capability
Enable support of aes-sha384-hmac in Intel(R) QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
ebdbe12fbf crypto/qat: add aes-sha224-hmac capability
Added support of aes-sha224-hmac in Intel(R) QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
61ec518162 crypto/qat: add MD5 HMAC capability
Added posibility to compute MD5 HMAC digest with Intel QuickAssist
Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Fiona Trahe
1bb14aab6d crypto/qat: optimize request copy
using rte_mov128 instead of structure assignment to copy
template request from session context into request

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: John Griffin <john.griffin@intel.com>
2016-10-04 20:41:09 +02:00
John Griffin
10b49880e3 crypto/qat: make the session struct variable in size
This patch changes the qat firmware session data structure from a fixed
size to a variable size which is dependent on the size of the chosen
algorithm.
This reduces the amount of bytes which are transferred across
PCIe and thus helps to increase qat performance when the
accelerator is bound by PCIe.

Signed-off-by: John Griffin <john.griffin@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Shreyansh Jain
50a3345fa9 vdev: rename init/uninit ops to probe/remove
Inline with PCI probe and remove, VDEV probe and remove hooks provide
a uniform naming.
PCI probe represents scan and driver initialization. For VDEV, it will
represent argument parsing and initialization.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2016-10-06 16:02:14 +02:00
Ajit Khaparde
595f302296 net/bnxt: update struct definitions for 1.5.1 HWRM API
Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different auto generated
file.

Structures updated:
hwrm_stat_ctx_alloc_input, hwrm_stat_ctx_alloc_output,
hwrm_stat_ctx_free_input, hwrm_stat_ctx_free_output,
hwrm_stat_ctx_clr_stats_input, hwrm_stat_ctx_clr_stats_output,
hwrm_exec_fwd_resp_input, hwrm_exec_fwd_resp_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
92a5359ef4 net/bnxt: update HWRM filter related structures
Update the PMD to use packet filtering related structures as per the
1.5.1 version of the HWRM API. Most of the changes in the patch are
white spaces and rearrangement of the lines - a onetime change owing to
the usage of a different auto generated file.

Structures being updated:
hwrm_cfa_l2_filter_cfg_input, hwrm_cfa_l2_filter_cfg_output,
hwrm_cfa_l2_set_rx_mask_input, hwrm_cfa_l2_set_rx_mask_output,
hwrm_cfa_l2_filter_alloc_input, hwrm_cfa_l2_filter_alloc_output,
hwrm_cfa_l2_filter_free_input, hwrm_cfa_l2_filter_free_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
c50af701a8 net/bnxt: update HWRM ring related structures
Update the PMD to use HWRM ring related structures as per the 1.5.1
version of the HWRM API.  Most of the changes in the patch are white
spaces and rearrangement of the lines - a onetime change owing to the
usage of a different auto generated file.

Structures being updated:
hwrm_ring_alloc_input, hwrm_ring_alloc_output, hwrm_ring_free_input,
hwrm_ring_free_output, hwrm_ring_grp_alloc_input,
hwrm_ring_grp_alloc_output, hwrm_ring_grp_free_input,
hwrm_ring_grp_free_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
62534d3aa4 net/bnxt: update VNIC related structures
Update the PMD to use VNIC related structures as per the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different
auto generated file.

Structures being updated:
hwrm_vnic_alloc_input, hwrm_vnic_alloc_output, hwrm_vnic_free_input,
hwrm_vnic_free_output, hwrm_vnic_cfg_input, hwrm_vnic_cfg_output,
hwrm_vnic_rss_cfg_input, hwrm_vnic_rss_cfg_output,
hwrm_vnic_rss_cos_lb_ctx_alloc_input,
hwrm_vnic_rss_cos_lb_ctx_alloc_output,
hwrm_vnic_rss_cos_lb_ctx_free_input,
hwrm_vnic_rss_cos_lb_ctx_free_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
5c6a5bc88c net/bnxt: update structures for 1.5.1 HWRM API
Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different
auto generated file.

Structures updated:
hwrm_func_qcfg_input, hwrm_func_qcfg_output, hwrm_func_drv_rgtr_input,
hwrm_func_drv_rgtr_output, hwrm_func_drv_unrgtr_input,
hwrm_func_drv_unrgtr_output, hwrm_queue_qportcfg_input,
hwrm_queue_qportcfg_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
9e2ab5744d net/bnxt: update structures for 1.5.1 HWRM API
Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different
auto generated file.

Structures being updated in this patch:
input, output, hwrm_ver_get_input, hwrm_ver_get_output,
hwrm_func_reset_input, hwrm_func_reset_output, hwrm_func_qcaps_input,
hwrm_func_qcaps_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
b98145d6b0 net/bnxt: update completion descriptors
Update the PMD to use structures as per the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - hopefully a onetime change owing to the usage of a different
auto generated file.

Structures updated:
cmpl_base, tx_cmpl, rx_pkt_cmpl, rx_pkt_cmpl_hi, hwrm_fwd_req_cmpl,
hwrm_async_event_cmpl

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
76fc6a5938 net/bnxt: update buffer descriptor definitions
Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - hopefully a onetime change owing to the usage of a different
auto generated file.

Structures updated in this patch:
tx_bd_short, tx_bd_long, tx_bd_long_hi, rx_prod_pkt_bd

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
eba852e23e net/bnxt: refactor for 1.5.1 HWRM API
Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in this patch and the following patches are
white spaces and rearrangement of the lines - hopefully a onetime change
owing to the usage of a different auto generated file.

Other than that, the following fields have been renamed:
1) rx_err_pkts and tx_err_pkts are now rx_discard_pkts and tx_discard_pkts
in struct ctx_hw_stats64
2) the perm_mac_addr field in the response of bnxt_hwrm_func_qcaps has
changed to mac_addr.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
6ca3a5e722 net/bnxt: support hotplug
This patch adds support for port hotplug framework.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
f86febfb46 net/bnxt: support VF
Add support to the bnxt PMD to load on a PCI VF.
1) VF cannot change parameters like - speed, autoneg and pause
2) If the VF MAC address shows up as all 0's it has to be provisioned
by the PF in the hypervisor.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: David Christensen <david.christensen@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
9dcf8c7d6e net/bnxt: add new device IDs
More PCI Device IDs for Cumulus, Cumulus+ and Whitney, Whitney+ SKUs.

The NPAR model supported by firmware has been altered. It now allocates a
unique Device ID for each NPAR partition for each device.  In addition,
ASIC's that are capable of supporting dual media have a unique DID
depending whether they are configured in copper or fiber mode.
This patch adds the necessary DIDs.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: David Christensen <david.christensen@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
5cd0e2889c net/bnxt: support NIC Partitioning
Adding code to enable support for NIC Partitioning or NPAR 1.0
As a part of NPAR, we don't allow port settings like speed or flow
control to be changed.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Stephen Hurd <stephen.hurd@broadcom.com>
Reviewed-by: David Christensen <david.christensen@broadcom.com>
2016-09-30 12:27:18 +02:00
Ajit Khaparde
1fe1aaf207 net/bnxt: support Broadcom StrataGX
This patch adds support for the Broadcom StrataGX® BCM5871X
series of Communications Processors.

These ARM based processors target a broad range of networking
applications including virtual CPE (vCPE) and NFV appliances,
10G service routers and gateways, control plane processing for
Ethernet switches, and network attached storage (NAS).

Other than adding the PCI Id for supporting the device,
the patch also adds a memory barrier before the Tx doorbell
and Completing ring doorbell is written to. Since ARM has a
weakly ordered memory model this enforces a strict ordering
of the descriptor writes before the doorbell writes happen.

Signed-off-by: John Carney <john.carney@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-09-30 12:27:18 +02:00
Xiao Wang
f8c8cc9980 net/ixgbe/base: add base driver update brief
The ixgbe base driver was updated to version
cid-10g-shared-code.2016.04.12.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-09-30 12:27:18 +02:00
Xiao Wang
4f7c34f1ee net/ixgbe/base: clean up
Change the parameter bypass_vlvf to vlvf_bypass for consistency
with ixgbe_common.c.

Clean up some whitespace and misalignment.

Change variable type of secrxreg from int to u32 as it's used
to store register value.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-09-30 12:27:18 +02:00
Xiao Wang
7834b63510 net/ixgbe/base: fix skipping PHY config
By exiting early we could skip the PHY configuration and as such
the driver may not configure the PHY correctly for SFP+.

This patch removes the logic which would previously skip the PHY
configuration in the case where we are already at the requested
speed in ixgbe_setup_mac_link_multispeed_fiber().

Fixes: f3430431abaf ("ixgbe/base: add SFP+ dual-speed support")

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-09-30 12:27:18 +02:00
Xiao Wang
bd9cd76382 net/ixgbe/base: remove unneeded flow control code
Support for flow control auto negotiation is defeatured from X550em_a
fiber when connected to speeds lower than 10Gbps. This patch cleans up
the code path which is mostly dead to begin with.

- add device IDs check in ixgbe_device_supports_autoneg_fc().
- ixgbe_fc_autoneg_fiber_x550em_a() is now used only to pass the user
  settings to ixgbe_fc_enable_generic().
- make sure that start_hw does not fail when setup_fc is not implemented.
- small fix in the debug message when ixgbe_device_supports_autoneg_fc()
  returns false.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-09-30 12:27:18 +02:00
Xiao Wang
377af5f38e net/ixgbe/base: update X550em_a backplane speed
Correct link flow for X550em_a backplane with ALEF.

Report the correct link capabilities:
   SKUs configured for 2.5G only support 2.5G.
   non-10G SKUs can only support 2.5 or 1G.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-09-30 12:27:18 +02:00
Xiao Wang
8709f63782 net/ixgbe/base: fix possible corruption of shadow RAM
Currently, not all shadow RAM accesses are being done under the
protection of a semaphore, which could result in corruption.

Refactor the code so that it is possible to hold the semaphore
around ixgbe_host_interface_command by introducing an unlocked form.
This patch also eliminates the function ixgbe_read_ee_hostif_data_X550
in favor of the function ixgbe_read_ee_hostif_X550.
The new arrangement is able to get both the management interface semaphore
and the EEPROM semaphore at the same time instead of separately.

Fixes: af75078fece3 ("first public release")

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-09-30 12:27:18 +02:00
Xiao Wang
7650af62b4 net/ixgbe/base: add two MAC ops for Hyper-V
This patch adds negotiate_api_version and set_rlpml into mac_ops. With the
introduction of Hyper-V functionality, we can have separate functions to
accommodate different implementations without have one break the other.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-09-30 12:27:18 +02:00
Xiao Wang
d4b4c68454 net/ixgbe/base: add X550em_a FW ALEF support
This patch adds X550em_a FW ALEF support. ALEF is the new unified FW.
The driver uses the KRM_PMD_RX_FLEX_PORT/FLX_MASK_ST20 registers to
configure the lane mode.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-09-30 12:27:18 +02:00
Xiao Wang
d5e7abb9b5 net/ixgbe/base: separate PHY ops init from PHY init
This patch moves PHY ops pointers initialization to
ixgbe_init_phy_ops_X550em and PHY identifying/initializing
to ixgbe_identify_phy_x550em.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-09-30 12:27:18 +02:00