Commit Graph

8891 Commits

Author SHA1 Message Date
Hemant Agrawal
7c8f4eedeb doc: add note for IPv4 multicast application
Add a note to indicate that only first four ports can be
tested with this application.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-07-10 00:46:38 +02:00
Reshma Pattan
99ad488b68 doc: add note for pdump initialization
Updated note to make users aware that the packet capture framework
is initialized by default only in testpmd. Other primary applications
need to explicitly modify the code to do this initialization.

Signed-off-by: Reshma Pattan <reshma.pattan@intel.com>
2017-07-10 00:46:38 +02:00
John McNamara
0667319395 doc: add libnuma as dependency
Add libnuma as a dependency to the Linux Getting Started Guide
since it is a new requirement in DPDK 17.08+.

Fixes: 1b72605d24 ("mem: balanced allocation of hugepages")

Signed-off-by: John McNamara <john.mcnamara@intel.com>
2017-07-10 00:46:38 +02:00
Tom Barbette
e6d902be09 ethdev: document VMDq Rx configuration
From documentation it is very unclear how VMDq configuration can be
tweaked, and online search offer very poor results.

This patch will ultimately spawn an online documentation page
for the rte_eth_vmdq_rx_conf struct which will eventually add a bit of
documentation about the rx_mode tag and how to allow e.g. VMDq pools
to receive packets without VLAN tags.

Signed-off-by: Tom Barbette <tom.barbette@ulg.ac.be>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-07-10 00:46:38 +02:00
Gaetan Rivet
4188620d02 ethdev: save VLAN filter setting
In order to be able to replicate a configuration onto a second port,
device configuration should be fully described and available.
Other configuration items (i.e. MAC addresses) are stored within
rte_eth_dev_data, but not this one.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-10 00:46:38 +02:00
Rami Rosen
2cb89ccd0a bus: remove wrong doxygen for dump function
This trivial patch removes wrong comments about
the return value of the rte_bus_dump(), as
this method does not return any value
(it's return type is void)

Fixes: a97725791e ("bus: introduce bus abstraction")

Signed-off-by: Rami Rosen <rami.rosen@intel.com>
2017-07-10 00:46:38 +02:00
Ferruh Yigit
9bf4901d1a bus/vdev: remove probe with driver name option
Virtual device/driver probing done via name.

A new alternative method introduced to probe the device with providing
driver name in devargs as "driver=<driver_name>".

This patch removes alternative method and fixes virtual device usages
with proper device names.

Fixes: 87c3bf29c6 ("test: do not short-circuit null device creation")
Fixes: d39670086a ("eal: parse driver argument before probing drivers")

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-07-10 00:46:38 +02:00
Stephen Hemminger
701a64622c net/virtio: do not claim to support LRO
The current virtio supports Transmit Segmentation Offload, but
does not really support Large Receive Offload. The driver was confusing
the two offloads.

Fixes: 86d59b2146 ("net/virtio: support LRO")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-07-09 18:39:11 +02:00
Stephen Hemminger
4dab342b75 net/virtio: do not falsely claim to do IP checksum
The virtio driver is confused about the meaning of the ip_checksum
flag.  In DPDK, ip_checksum means the hardware is capable of checking
the Layer 3 IP checksum.  But KVM/QEMU does not do that. The flag
VIRTIO_NET_F_GUEST_CSUM controls whether the receive side does
Layer 4 (TCP/UDP) checksum offload.

Fix by erroring out any requests to do IP checksum.

Fixes: 96cb671193 ("net/virtio: support Rx checksum offload")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-07-09 18:38:40 +02:00
Jiayu Hu
b40f8d782b app/testpmd: enable TCP/IPv4 GRO
This patch enables TCP/IPv4 GRO library in csum forwarding engine.
By default, GRO is turned off. Users can use command "gro (on|off)
(port_id)" to enable or disable GRO for a given port. If a port is
enabled GRO, all TCP/IPv4 packets received from the port are performed
GRO. Besides, users can set max flow number and packets number per-flow
by command "gro set (max_flow_num) (max_item_num_per_flow) (port_id)".

Signed-off-by: Jiayu Hu <jiayu.hu@intel.com>
Reviewed-by: Jingjing Wu <jingjing.wu@intel.com>
Tested-by: Lei Yao <lei.a.yao@intel.com>
2017-07-09 18:15:05 +02:00
Jiayu Hu
0d2cbe59b7 lib/gro: support TCP/IPv4
In this patch, we introduce five APIs to support TCP/IPv4 GRO.
- gro_tcp4_reassemble: reassemble an inputted TCP/IPv4 packet.
- gro_tcp4_tbl_create: create a TCP/IPv4 reassembly table, which is used
    to merge packets.
- gro_tcp4_tbl_destroy: free memory space of a TCP/IPv4 reassembly table.
- gro_tcp4_tbl_pkt_count: return the number of packets in a TCP/IPv4
    reassembly table.
- gro_tcp4_tbl_timeout_flush: flush timeout packets from a TCP/IPv4
    reassembly table.

TCP/IPv4 GRO API assumes all inputted packets are with correct IPv4
and TCP checksums. And TCP/IPv4 GRO API doesn't update IPv4 and TCP
checksums for merged packets. If inputted packets are IP fragmented,
TCP/IPv4 GRO API assumes they are complete packets (i.e. with L4
headers).

In TCP/IPv4 GRO, we use a table structure, called TCP/IPv4 reassembly
table, to reassemble packets. A TCP/IPv4 reassembly table includes a key
array and a item array, where the key array keeps the criteria to merge
packets and the item array keeps packet information.

One key in the key array points to an item group, which consists of
packets which have the same criteria value. If two packets are able to
merge, they must be in the same item group. Each key in the key array
includes two parts:
- criteria: the criteria of merging packets. If two packets can be
    merged, they must have the same criteria value.
- start_index: the index of the first incoming packet of the item group.

Each element in the item array keeps the information of one packet. It
mainly includes three parts:
- firstseg: the address of the first segment of the packet
- lastseg: the address of the last segment of the packet
- next_pkt_index: the index of the next packet in the same item group.
    All packets in the same item group are chained by next_pkt_index.
    With next_pkt_index, we can locate all packets in the same item
    group one by one.

To process an incoming packet needs three steps:
a. check if the packet should be processed. Packets with one of the
    following properties won't be processed:
	- FIN, SYN, RST, URG, PSH, ECE or CWR bit is set;
	- packet payload length is 0.
b. traverse the key array to find a key which has the same criteria
    value with the incoming packet. If find, goto step c. Otherwise,
    insert a new key and insert the packet into the item array.
c. locate the first packet in the item group via the start_index in the
    key. Then traverse all packets in the item group via next_pkt_index.
    If find one packet which can merge with the incoming one, merge them
    together. If can't find, insert the packet into this item group.

Signed-off-by: Jiayu Hu <jiayu.hu@intel.com>
Reviewed-by: Jianfeng Tan <jianfeng.tan@intel.com>
2017-07-09 18:14:54 +02:00
Jiayu Hu
e996506a1c lib/gro: add Generic Receive Offload API framework
Generic Receive Offload (GRO) is a widely used SW-based offloading
technique to reduce per-packet processing overhead. It gains
performance by reassembling small packets into large ones. This
patchset is to support GRO in DPDK. To support GRO, this patch
implements a GRO API framework.

To enable more flexibility to applications, DPDK GRO is implemented as
a user library. Applications explicitly use the GRO library to merge
small packets into large ones. DPDK GRO provides two reassembly modes.
One is called lightweight mode, the other is called heavyweight mode.
If applications want to merge packets in a simple way and the number
of packets is relatively small, they can use the lightweight mode.
If applications need more fine-grained controls, they can choose the
heavyweight mode.

rte_gro_reassemble_burst is the main reassembly API which is used in
lightweight mode and processes N packets at a time. For applications,
performing GRO in lightweight mode is simple. They just need to invoke
rte_gro_reassemble_burst. Applications can get GROed packets as soon as
rte_gro_reassemble_burst returns.

rte_gro_reassemble is the main reassembly API which is used in
heavyweight mode and tries to merge N inputted packets with the packets
in GRO reassembly tables. For applications, performing GRO in heavyweight
mode is relatively complicated. Before performing GRO, applications need
to create a GRO context object, which keeps reassembly tables of
desired GRO types, by rte_gro_ctx_create. Then applications can use
rte_gro_reassemble to merge packets. The GROed packets are in the
reassembly tables of the GRO context object. If applications want to get
them, applications need to manually flush them by flush API.

Signed-off-by: Jiayu Hu <jiayu.hu@intel.com>
Reviewed-by: Jianfeng Tan <jianfeng.tan@intel.com>
2017-07-09 18:14:46 +02:00
Jan Blunck
a76f6b1b09 crypto/scheduler: fix build with old gcc
Seen with gcc 4.9.2:
drivers/crypto/scheduler/scheduler_multicore.c:286:2: error:
'for' loop initial declarations are only allowed in C99 or C11 mode
  for (uint16_t i = 0; i < sched_ctx->nb_wc; i++)
  ^

Fixes: 4c07e0552f ("crypto/scheduler: add multicore scheduling mode")

Signed-off-by: Jan Blunck <jblunck@infradead.org>
2017-07-09 17:02:31 +02:00
Gaetan Rivet
4969f5914c devargs: introduce new parsing helper
Introduce a more versatile helper to parse device strings. This
helper expects a generic rte_devargs structure as storage in order not
to require API changes in the future, should this structure be
updated.

The old equivalent function is thus being deprecated, as its API does
not allow to accompany rte_devargs evolutions.

A deprecation notice is issued.

This new helper will parse bus information as well as device name and
device parameters. It does not allocate an rte_devargs structure and
expects one to be given as input.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:12:00 +02:00
Gaetan Rivet
bd279a7936 devargs: make device types generic
rte_devargs now represents any device from any bus.
The related devtypes do not identify a bus anymore, only which scan
policy the device subscribes to.

The bus itself is identified by a bus handle previously introduced.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:11:15 +02:00
Gaetan Rivet
2b0e39c183 net/virtio: remove device type reference
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:10:15 +02:00
Gaetan Rivet
f3a1188cee devargs: make device representation generic
Remove the dependency of this subsystem upon bus specific device
representation.

Devargs only validates that a device declaration is correct and handled
by a bus. The device interpretation is done afterward within the bus.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:09:16 +02:00
Gaetan Rivet
02823c1db0 devargs: parse bus policies
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:08:58 +02:00
Gaetan Rivet
98eb4b845c bus: introduce scan policies
Scan policies describe the way a bus should scan the system to search
for possible devices.

Three flags are introduced:
  RTE_BUS_SCAN_UNDEFINED: Configuration is irrelevant for this bus
  RTE_BUS_SCAN_WHITELIST: Scanning should be limited to declared devices
  RTE_BUS_SCAN_BLACKLIST: Scanning should exclude only declared devices

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:08:18 +02:00
Gaetan Rivet
3f86ca7f79 eal: move kernel driver enum out of PCI header
Device kernel module is a device attribute.
It is used in generic device structures and must not be tied to a bus.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:06:02 +02:00
Thomas Monjalon
17fd714e80 examples/ethtool: include PCI header directly
In devargs rework, rte_pci.h won't be included by rte_ethdev.h
(via rte_devargs.h) anymore.

rte_ethtool_get_drvinfo() could use rte_devargs.name instead of
creating equivalent bus specific name.
For now, it is workarounded by just including rte_pci.h.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2017-07-09 00:05:42 +02:00
Gaetan Rivet
9eda3a7c4e test: include PCI header directly
In devargs rework, rte_pci.h won't be included
via rte_devargs.h anymore.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:05:06 +02:00
Gaetan Rivet
85c18dcb5c app/testpmd: include PCI header directly
In devargs rework, rte_pci.h won't be included
via rte_devargs.h anymore.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:03:45 +02:00
Gaetan Rivet
4d3c6b2ae8 net/sfc: include PCI header directly
In devargs rework, rte_pci.h won't be included
via rte_devargs.h anymore.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:03:31 +02:00
Gaetan Rivet
4e6cc0eb1e net/ixgbe: include PCI header directly
In devargs rework, rte_pci.h won't be included
via rte_devargs.h anymore.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:03:23 +02:00
Gaetan Rivet
a8771d51bf net/e1000: include PCI header directly
In devargs rework, rte_pci.h won't be included
via rte_devargs.h anymore.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:03:09 +02:00
Gaetan Rivet
5f08883a36 net/mlx5: include PCI header directly
In devargs rework, rte_pci.h won't be included
via rte_devargs.h anymore.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:02:55 +02:00
Gaetan Rivet
6477966c15 net/bnxt: include PCI header directly
In devargs rework, rte_pci.h won't be included
via rte_devargs.h anymore.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-09 00:02:11 +02:00
Gaetan Rivet
7dac6d49ef net/bonding: include PCI header directly
In devargs rework, rte_pci.h won't be included
via rte_devargs.h anymore.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-07-08 23:57:07 +02:00
Gaetan Rivet
47828c5f3b devargs: parse bus info
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2017-07-08 22:29:38 +02:00
Gaetan Rivet
cfdbd65300 bus: add helper to find a bus from a device name
Find which bus should be able to parse this device name into an internal
device representation.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2017-07-08 22:29:29 +02:00
Gaetan Rivet
5958768369 bus/pci: implement parse bus operation
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2017-07-08 22:29:21 +02:00
Gaetan Rivet
fbee9d328b bus/vdev: implement parse bus operation
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2017-07-08 22:27:30 +02:00
Gaetan Rivet
609eb7dde6 bus: introduce parsing functionality
This operation can be used either to validate that a device
representation can be understood by a bus, as well as store the resulting
specialized device representation in any format determined by the bus.

Implementing this function allows EAL initialization routines to infer
which bus should handle a device. This is used as a way to respect
backward compatibility.

This API will disappear once this compatibility is not enforced anymore.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2017-07-08 22:27:14 +02:00
Thomas Monjalon
8d73e58f0b bus: fix driver registration
The bus name was stored with embedded double quotes.
Indeed the bus name is given with a string in a macro,
which is not used elsewhere.
These macros are useless because the buses are drivers,
so they must not have any API for the application writer.
The registration can be done with a hardcoded value without quotes.

There is another (small) benefit of not using macros for driver names:
it is to have a meaningful constructor function name.
For instance, it was businitfn_PCI_BUS_NAME instead of businitfn_pci.

The bus registration macro is also changed to use
the new RTE_INIT_PRIO macro, similar to RTE_INIT used for other drivers.
The priority is the highest (101) in order to be sure that the bus driver
is registered before its device drivers.

Fixes: 0fd1a0eaae ("pci: add bus driver")
Fixes: fea892e35f ("bus/vdev: use standard bus registration")
Fixes: 7e7df6d0a4 ("bus/fslmc: introduce fsl-mc bus driver")

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2017-07-08 22:27:01 +02:00
Stephen Hemminger
b17e432951 pci: fix spelling in comment
Minor spelling error in comment.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2017-07-08 19:29:12 +02:00
Stephen Hemminger
c7fe1eea8a bus: simplify finding starting point
A separate boolean variable is not necessary when searching for
starting point in find_device. Just use the passed argument
as its own flag value.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2017-07-08 19:28:58 +02:00
Mike Stolarchuk
61d04efc38 hash: fix lock release on add
When adding items to a hash table with multiple threads,
there is an spinlock used to prevent data corruption
(unless Transactional Memory is supported).

If there is a failure, the spinlock should be released,
but there were cases where that was not happening.

Fixes: be856325cb ("hash: add scalable multi-writer insertion with Intel TSX")
Cc: stable@dpdk.org

Signed-off-by: Mike Stolarchuk <mike.stolarchuk@bigswitch.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-07-08 19:00:22 +02:00
Roman Zhukov
60efb44f73 examples: adjust Rx and Tx descriptors to device limits
Signed-off-by: Roman Zhukov <roman.zhukov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2017-07-08 18:47:00 +02:00
Roman Zhukov
0f67fc3bae ethdev: add function to adjust number of descriptors
Check that numbers of Rx and Tx descriptors satisfy descriptors limits
from the Ethernet device information, otherwise adjust them to boundaries.

Signed-off-by: Roman Zhukov <roman.zhukov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2017-07-08 18:46:47 +02:00
Qi Zhang
92f4bf0396 ethdev: fix documentation for fuzzy match
Fix document for fuzzy match and GRE

Fixes: a3a2e2c8f7 ("ethdev: add fuzzy match in flow API")
Fixes: 7cd048321d ("ethdev: add MPLS and GRE flow API items")

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-07-08 18:13:10 +02:00
Gaetan Rivet
18da437b5f ethdev: add flow rule copy function
This allows PMDs and applications to save flow rules in their generic
format for later processing. This is useful when rules cannot be applied
immediately, such as when the device is not properly initialized.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-07-08 17:55:02 +02:00
Jerin Jacob
3abcd29f2d update Cavium Inc copyright headers
Replace the incorrect reference to "Cavium Networks", "Cavium Ltd"
company name with correct the "Cavium, Inc" company name in
copyright headers.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-07-08 17:43:49 +02:00
Jerin Jacob
b3d4e665ed doc: add perf all types queue test in eventdev test guide
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Guduri Prathyusha <gprathyusha@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-07-07 09:36:31 +02:00
Jerin Jacob
43bc2fef79 doc: add perf queue test in eventdev test guide
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Guduri Prathyusha <gprathyusha@caviumnetworks.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-07-07 09:36:20 +02:00
Jerin Jacob
dd37027f2b doc: add order all types queue test in eventdev test guide
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Guduri Prathyusha <gprathyusha@caviumnetworks.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-07-07 09:36:09 +02:00
Jerin Jacob
f6dda59153 doc: add order queue test in eventdev test guide
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Guduri Prathyusha <gprathyusha@caviumnetworks.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-07-07 09:35:58 +02:00
Guduri Prathyusha
64b20e7fb5 doc: describe the new eventdev test application
Add documentation to describe usage of eventdev test application and
supported command line arguments.

Signed-off-by: Guduri Prathyusha <gprathyusha@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-07-07 09:35:46 +02:00
Jerin Jacob
1eb10ad8db app/testeventdev: add perf all types queue worker
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-07-07 09:35:35 +02:00
Jerin Jacob
e605024355 app/testeventdev: add perf all types queue test
This is a performance test case that aims at testing the following:
1. Measure the number of events can be processed in a second.
2. Measure the latency to forward an event.

The atq queue test functions as same as "perf_queue" test.
The difference is, it uses, "all type queue" scheme instead of separate
queues for each stage and thus reduces the number of queues required to
realize the use case and enables flow pinning as the event does not
move to the next queue.

Example command to run perf "all types queue" test:

sudo build/app/dpdk-test-eventdev --vdev=event_octeontx --\
--test=perf_atq --plcores=2 --wlcore=3 --stlist=p --nb_pkts=1000000000

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-07-07 09:35:24 +02:00