22790 Commits

Author SHA1 Message Date
Qi Zhang
803373cc94 net/ice/base: add rate limiter profile bit mask check
Mask bits before accessing the rate limiting profile type field.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
12b8bb04b4 net/ice/base: reset capabilities before parsing
The capability flags used to report whether an NVM component has
a pending update are stored as simple booleans. If ice_parse_caps finds
the relevant capability then the boolean is set to true.

If the capability is not provided by firmware, then the boolean value
will be left alone. This works during initialization because the
capabilities structure is zero-initialized.

However, this does not work if capabilities are updated by calling
ice_get_caps again after driver load. For example, consider if firmware
had a pending update, and then an EMPR was triggered. The update will
complete, and firmware will no longer report these capabilities.

However, the device driver will have already set the pending flags.
After an EMPR, new capabilities are read. However, because the pending
flags in the dev_caps.common_cap structure have already been set, they
will remain true.

Fix this by clearing the capabilities structures in ice_parse_caps
before processing any capabilities.

This ensures that the capabilities structure will always be refreshed to
match the state of the device or function capabilities reported by
firmware.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
94c81be833 net/ice/base: fix advanced switch rule stale information
To avoid having stale information about "adv_rule" per recipe, when all
rules associated to a given recipe are deleted, reset the "adv_rule"
flag otherwise it causes problem later on when decisions about filter
rules being present or not are made based on "adv_rule" flag.

Removed setting "adv_rule = 1" when recipe is created. It is set
correctly when advanced switch rule is added referring to the recipe
which was created as a result of adding advanced switch rule.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
8a2989969a net/ice/base: support more PPPoE packet type
This patch add more dummy packet type for PPPoE packet,
it enable tcp/udp layer of IPv4/IPv6 for PPPoE payload,
so we can use L4 dst/src port as input set for switch
filter.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
0176d92a83 net/ice/base: remove unnecessary case branches
Remove unnecessary case branch, since the switch and pipeline stage is
not designed to be handled by the flow module.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
6bad5047be net/ice/base: return correct error code
Return ICE_ERR_DOES_NOT_EXIST return code if admin command error code is
ICE_AQ_RC_ENOENT (not exist). ice_aq_sw_rules is used when switch
rule is getting added/deleted/updated. In case of delete/update
switch rule, admin command can return ICE_AQ_RC_ENOENT error code
if such rule does not exist, hence return ICE_ERR_DOES_NOT_EXIST error
code from ice_aq_sw_rule, so that caller of this function can decide
how to handle ICE_ERR_DOES_NOT_EXIST.

Allow proper cleanup of internal data structures from ice_rem_adv_rule
function if ice_aq_sw_rules return error code ICE_ERR_DOES_NOT_EXIST
otherwise per recipe:rule list will never become empty.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
6dfe33fbe5 net/ice/base: add debug logs
Add debug logs for ice_aq_get_phy_caps(), and format
ice_aq_set_phy_cfg() and ice_aq_get_link_info() debug logs to make them
more readable.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
38f165b161 net/ice/base: use macro for sizeof
The definition of ICE_SW_RULE_RX_TX_ETH_HDR_SIZE open codes the size of
a structure field. Replace this with the use of FIELD_SIZEOF.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
09ada7c890 net/ice/base: support RSS IPv6 prefix
Some IPv6 prefix related fields are defined in this patch, so that we
can use prefixes instead of full IPv6 address for RSS. These prefixes
include the first 32, 48, 64 bits of both SRC and DST IPV6 address.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
b2d192fccd net/ice/base: adjust function signature style format
Where possible, cuddle multiple lines of function signatures to be
consistent throughout the code.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
06d1a56251 net/ice/base: remove unnecessary braces
This patch mainly does cleanups related to unnecessary braces.
There might be different opinion to keep braces if more than
single line, but the purpose here is trying to sync DPDK's base
code with kernel's copy and its more convenient for future update.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
9c99297895 net/ice/base: give time for package download after PF reset
To allow for resets during package download, increase the timeout period
after performing a PF Reset. The time waited is the global config lock
timeout plus the normal PFSWR timeout.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
10fb4bb74b net/ice/base: allow GENEVE and VXLAN rules with VLAN
When programming GENEVE and VXLAN switch rules, there are some instances
where both VLAN tagged packets plus non-VLAN tagged packets are needed
to match the rule.

In order to perform this action in one rule, the switch code needs
to setup the packet flag mask to ignore the VLAN packet flag. This
will allow the rule to match both VLAN and non-VLAN packets.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
f82d2874f8 net/ice/base: add NVM helper functions
Add couple functions that DPDK would like to use for accessing the
NVM.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:08 +02:00
Qi Zhang
89e27d5367 net/ice/base: initialize PHY configuration FEC fields
Currently the caller needs to initialize the ice_cfg_phy_fec() parameter
ice_aqc_set_phy_cfg_data FEC fields before calling. However, this is not
necessary since ice_cfg_phy_fec() calls Get PHY Capabilities.

Initialize ice_aqc_set_phy_cfg_data FEC capabilities and FEC option
fields from Get PHY Capabilities with media/topology in
ice_cfg_phy_fec().

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
aa95ac6c67 net/ice/base: add flow director completion report option
This patch introduces comp_report variable so that the called can
determine whether to report completion on error or on all cases.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
086a11c7eb net/ice/base: support FDIR for L2TPV3 ESP AH and PFCP
FDIR can forward:
- L2TPV3 packets with session id.
- IPSEC ESP packets with security parameter index.
- IPSEC AH packets with security parameter index.
- NAT_T ESP packets with security parameter index.
- PFCP packets with s field value.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
06dd554ac7 net/ice/base: cleanup comment formatting
Add missing space between end of comment text and comment terminator,
and remove unnecessary punctuation.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
4003b3d7af net/ice/base: group function prototypes together
There are some function prototypes at the beginning of the file and
some at the end, group them all together so that they are in one
consistent location.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
5ac2f0a768 net/ice/base: change IPv6 training packet
Add additional UDP payload to allow for additional headers such as ESP.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
e2540a5a93 net/ice/base: refactor flow director filter swap
Move the swap of flow director addresses and ports into training packet
generation. This reduces the code written for ACL.

Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
60ff6f5ce2 net/ice/base: consolidate VF promiscuous mode
Consolidate the Promiscuous rule for SMBM on the chosen logical port.

Signed-off-by: Shibin Koikkara Reeny <shibin.koikkara.reeny@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
0bfcca26c8 net/ice/base: update maximum PHY type high index
As currently, we are supporting only 5 PHY_SPEEDs for phy_type_high.
Thus, we should adjust the value of ICE_PHY_TYPE_HIGH_MAX_INDEX to 5.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
89f3389295 net/ice/base: fix ACL rules index
A u8 idx in ice_acl_add_entry  causes the code to truncate the values
greater than 255 to 255 or less when calling ice_aq_program_acl_entry()
resulting in the wrong TCAM index being programmed for the specified
rule. The result is that the rule action doesn't work correctly
(packets don't get routed to the correct queue or dropped if that
is the action). Fix the issue by changing the variable to be a u16
again.

Fixes: f3202a097f12 ("net/ice/base: add ACL module")
Cc: stable@dpdk.org

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
f982681d84 net/ice/base: add AUI media type
Add and report AUI PHY types as an AUI media type

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
4963c6ba97 net/ice/base: improve VSI filters rebuild
This change improve VSI filter configuration rebuild for
multiport configuration, ie. where 1 PF includes more than
one logical port. For some functions, association between
port and corresponding switch_info or port_info structure
has been lost because by default the pointer to the first
element of array (switch, port etc.) is passed as function
argument. With this change, pointer to proper element is
added an extra argument in relevant functions.

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
bc367c55cd net/ice/base: gate devices from FW link override
Currently, the FW link override feature is only permitted for E810
devices.  However, the ice_fw_supports_link_override() guards against FW
versions irrespective of the device. This assumes FW versions between
the families are aligned, which is not the case.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
493ea93077 net/ice/base: report AOC PHY types as fiber
Report AOC types as fiber instead of unknown

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
8cff0a866c net/ice/base: consolidate MAC config set
Consolidate implementation of ice_aq_set_mac_cfg for switch mode
and NIC mode. As per the specification, the driver needs to call
set_mac_cfg (opcode 0x0603) to be able to exercise jumbo frames.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
135ccbc6a7 net/ice/base: avoid undefined behavior
When writing the driver's struct ice_tlan_ctx structure, do not write
the 8-bit element int_q_state with the associated internal-to-hardware
field which is 122-bits, otherwise the helper function ice_write_byte()
will use undefined behavior when setting the mask used for that write.
This should not cause any functional change and will avoid use of
undefined behavior.  Also, update a comment to highlight this structure
element is not written.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
fba97b34e5 net/ice/base: disable profile merge for flow director
For Flow Director, we don't want to re-use an existed profile with the
same field vector and mask. Merging two different flow_type’s field
vector will also make them sharing trained rule and cause rule
interference.

For example:
issue rule A: IPV4_TCP matching tcp src&dst port 80  to queue 8
issue rule B: IPV6_TCP matching tcp src&dst port 200 to queue 20
Below behavior is found but not expected:
IPV4_TCP pkt with src&dst port 200 hits rule B and goes to queue 20
IPV6_TCP pkt with src&dst port 80  hits rule A and goes to queue 8

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
5c58a0874e net/ice/base: add macros to parse flow director Rx desc
Add descriptor field offset and mask definition. It is used to parse
FDIR Rx descriptor field value.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Qi Zhang
1f70fb3e95 net/ice/base: support flow director for non-IP packets
FDIR can forward Ethernet packets with non-IP ethertype.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-16 19:21:07 +02:00
Dong Zhou
eb10fe7fb1 net/mlx5: fix LRO checksum
The TCP checksum includes IPV4 pseudo-header checksum and L3
payload checksum which include TCP header and TCP payload.
When mlx5 LRO is enabled, HW will calculate the TCP payload
checksum, PMD need complete the IPV4 pseudo-header checksum
and the TCP header checksum.

The mlx5_lro_update_tcp_hdr function completes the TCP header
checksum, but this function using lower 4 bits of data-offset
field in TCP header to get the whole TCP header length, this
will cause TCP header checksum wrong calculation.

Update the code using higher 4 bits of data-offset field
instead of lower 4 bits.

Fixes: e4c2a16eb1de ("net/mlx5: handle LRO packets in Rx queue")
Cc: stable@dpdk.org

Signed-off-by: Dong Zhou <dongz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-16 19:21:07 +02:00
Alexander Kozyrev
e891b54a9e net/mlx5: fix descriptors number adjustment
The number of descriptors to configure in a Rx/Tx queue is passed to
the mlx5_tx/rx_queue_pre_setup() function by value. That means any
adjustments of this variable are local and cannot affect the actual
value that is used to allocate mbufs in the mlx5_txq/rxq_new()
functions. Pass the number as a reference to actually update it.

Fixes: 6218063b39a6 ("net/mlx5: refactor Rx data path")
Fixes: 1d88ba171942 ("net/mlx5: refactor Tx data path")
Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-16 19:21:07 +02:00
Alexander Kozyrev
a23d96ae59 net/mlx5: do not select legacy MPW implicitly
The Legacy MPW (multi-packet write) should not be engaged implicitly.
We should exclude this function from a Tx burst routine selection
process unless it is requested specifically by setting the txq_mpw_en
devarg.  Exclude this function from the selection process the same way
it is done for the Enhanced MPW in the mlx5_select_tx_function()
routine.

Fixes: eb8121ab9dac ("net/mlx5: introduce Tx burst routine template")
Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-06-16 19:21:07 +02:00
Ophir Munk
73bf9235e9 net/mlx5: refactor statistics
mlx5 statistics are calculated by several methods:
1. In software when packets go through datapath.
2. Calling ioctl with ETHTOOL command (Linux specific).
3. Reading counters from SYSFS device path (Linux specific).

The Linux related functions are moved to file linux/mlx5_os.c.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-16 19:21:07 +02:00
Ophir Munk
170572d8f9 common/mlx5: flag Verbs dependency in a DevX command
Function mlx5_devx_cmd_qp_query_tis_td() receives as parameter a pointer
to verbs QP returned by ibv_create_qp. Therefore support it only if
HAVE_IBV_FLOW_DV_SUPPORT is defined. Otherwise return an error ENOTSUP.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-16 19:21:07 +02:00
Ophir Munk
042f5c94fd net/mlx5: refactor device operations for Linux
There are three types of eth_dev_ops: primary, secondary and isolate.
Their function calls assignments are moved from common file
mlx5.c to the Linux specific file linux/mlx5_os.c.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-16 19:21:07 +02:00
Ophir Munk
1256805dd5 net/mlx5: move Linux-specific functions
File mlx5_ethdev.c is partially moved to linux/mlx5_ethdev_os.c for
functions which are Linux specific. Functions which are Linux agnostics
remain in mlx5_ethdev.c file.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-16 19:21:07 +02:00
Ophir Munk
f484ffa1b1 net/mlx5: move socket files in Linux directory
mlx5_socket.c file is using APIs which are Linux specifics.  Therefore
move it (including mlx5_socket.h) from net/mlx5 directory to
net/mlx5/linux directory. This commit also updates the Makefile and
the meson files.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
2020-06-16 19:21:07 +02:00
Ophir Munk
9138989036 net/mlx5: rename ib in names
Renames in this commit:
mlx5_ibv_list -> mlx5_dev_ctx_list
mlx5_alloc_shared_ibctx -> mlx5_alloc_shared_dev_ctx
mlx5_free_shared_ibctx -> mlx5_free_shared_dev_ctx
mlx5_ibv_shared_port -> mlx5_dev_shared_port
ibv_port -> dev_port

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-16 19:21:07 +02:00
Ophir Munk
21b7c452a6 net/mlx5: remove completion object dependency on DV
Replace 'struct mlx5dv_devx_cmd_comp *' with 'void *' in 'struct
mlx5_dev_ctx_shared'.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-16 19:21:07 +02:00
Gregory Etelson
5c76123810 net/mlx5: fix flow memory allocation size
In DV enabled MLX5 PMD build mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW].size
was initiated for DV structure. If RTE initialization encountered MLX5
PCI function with disabled DV support
mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW].size was reduced to match legacy
verbs flow size.  Since mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW] is a
global variable that change reflected on DV enabled MLX5 PCI functions
too.

Running flow with invalid ipool size crashes PMD.

The patch adjusts ipool flow size for each active PCI function.

Fixes: b88341ca35fc ("net/mlx5: convert flow dev handle to indexed")
Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-16 19:21:07 +02:00
Dekel Peled
7842dfeacd net/mlx5: fix GTP mask definition location
Recent patch added definition of mask MLX5_GTP_FLAGS_MASK, just
above function flow_dv_validate_item_gtp(), where it is used.

Patch was applied together with other patches which modified the same
file, so the mask was located further away from the function it is
used in.

This patch moves the mask definition to the proper location.

Fixes: 563ac307a46b ("net/mlx5: support match on GTP flags")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-16 19:21:07 +02:00
Vivien Didelot
a7d42145cc net/pcap: support Tx nanosecond timestamps
When capturing packets into a PCAP file, DPDK currently uses
microseconds for the timestamps. But libpcap supports interpreting
tv_usec as nanoseconds depending on the file timestamp precision,
as of commit ba89e4a18e8b ("Make timestamps precision configurable").

To support this, use PCAP_TSTAMP_PRECISION_NANO when creating the
empty PCAP file as specified by PCAP_OPEN_DEAD(3PCAP) and implement
nanosecond timeval addition. This also ensures that the precision
reported by capinfos is nanoseconds (9).

Note that NSEC_PER_SEC is defined as 1000000000L instead of 1e9 since
the latter might be interpreted as floating point.

Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-06-16 19:21:07 +02:00
Ali Alnubani
3efac8085e net/mlx5: fix typos in meter error messages
Fixes: 3bd26b23cefc ("net/mlx5: support meter profile operations")
Cc: stable@dpdk.org

Signed-off-by: Ali Alnubani <alialnu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-16 19:21:07 +02:00
Hongbo Zheng
5045e2b25a net/hns3: fix unintended sign extension in dump operation
There are coverity defects related "Unintended sign extension" in the
internal static function named hns3_get_regs_length used for dumping reg
operation.

This patch fixes them by replacing the data type of cmdq_lines,
common_lines, ring_lines and tqp_intr_lines with uint32_t in the inner
static function named hns3_get_regs_length of hns3 PMD driver.

Coverity issue: 349917, 349914
Fixes: 936eda25e8da ("net/hns3: support dump register")
Cc: stable@dpdk.org

Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-06-16 19:21:07 +02:00
Wei Hu (Xavier)
5c471cb581 net/hns3: fix unintended sign extension in fd operation
Currently, there are coverity defects warning as below:

CID 349937 (#1 of 1): Unintended sign extension (SIGN_EXTENSION)
sign_extension: Suspicious implicit sign extension: port_number with
type uint16_t (16 bits, unsigned) is promoted in port_number << cur_pos
to type int (32 bits, signed), then sign-extended to type unsigned long
(64 bits, unsigned). If port_number << cur_pos is greater than
0x7FFFFFFF, the upper bits of the result will all be 1.

CID 349893 (#1 of 1): Unintended sign extension (SIGN_EXTENSION)
sign_extension: Suspicious implicit sign extension: vlan_tag with type
uint8_t (8 bits, unsigned) is promoted in vlan_tag << cur_pos to type
int (32 bits, signed), then sign-extended to type unsigned long (64
bits, unsigned). If vlan_tag << cur_pos is greater than 0x7FFFFFFF, the
upper bits of the result will all be 1.

This patch fixes them by replacing the data type of port_number and
vlan_tag with uint32_t in the inner static function named
hns3_fd_convert_meta_data of hns3 PMD driver.

Coverity issue: 349937, 349893
Fixes: fcba820d9b9e ("net/hns3: support flow director")
Cc: stable@dpdk.org

Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-06-16 19:21:07 +02:00
Hongbo Zheng
80cd38e1b5 net/hns3: ignore function return on reset error path
There is a coverity defect related "Unchecked return value".

The internal static hns3_reset_err_handle function is reset error
process of hns3 PMD driver. If failure in reset process, it does not
mean that the network port is completely unavailable, so the command
interface between driver and firmware still needs to be initialized.
Regardless of whether the execution of the function named hns3_cmd_init
is successful or not, the next process after execution must be
continued, so there is no need to check the return value. If
hns3_cmd_init fails to execute, there will be corresponding log
information inside hns3_cmd_init.

This patch adds '(void)' Type conversion to avoid coverity warning.

Coverity issue: 349934
Fixes: 2790c6464725 ("net/hns3: support device reset")
Cc: stable@dpdk.org

Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-06-16 19:21:07 +02:00