28544 Commits

Author SHA1 Message Date
Satha Rao
6b7fcb7a5d common/cnxk: support locking NIX RQ contexts
This patch will consider device argument to lock RSS table
in NIX.

This patch also adds few misc fixes such as disabling NIX Tx
vlan insertion conf in SMQ, enabling SSO in NIX Tx SQ
for Tx completions and TM related stats API.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2021-06-29 20:12:25 +02:00
Olivier Matz
eb3fea3cde test/mbuf: fix virtual address conversion
Seen with address sanitizer.

rte_mempool_virt2iova() can only be used on mempool elements. In this case,
it is incorrect, and rte_mem_virt2iova() has to be used.

Bugzilla ID: 737
Fixes: 7b295dceea07 ("test/mbuf: add unit test cases")
Cc: stable@dpdk.org

Reported-by: Zhihong Peng <zhihongx.peng@intel.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-07-06 16:41:13 +02:00
David Marchand
09e640e35e test: remove hack for private header inclusion
This hack was needed with the make build system.
With meson, any private header from a library is visible as long as a
dependency to this library is expressed.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2021-07-06 13:28:35 +02:00
David Marchand
7c83a1e3c8 bus/pci: fix leak for unbound devices
For devices not bound to any Linux kernel module, we leak a pci object
since it is never added to the PCI bus device list.

Fixes: c79a1c67465d ("bus/pci: optimize bus scan")
Cc: stable@dpdk.org

Reported-by: Owen Hilyard <ohilyard@iol.unh.edu>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2021-07-06 11:27:55 +02:00
Thomas Monjalon
aa777f003a bus/pci: update files description
Some files were starting with some outdated introductions.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-07-06 11:27:55 +02:00
Tomasz Duszynski
82a153151f raw/cnxk_bphy: support BPHY self test
Add support for performing selftest.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:48 +02:00
Tomasz Duszynski
64fa1ebd7c raw/cnxk_bphy: support registering BPHY IRQ handlers
Custom IRQ handlers may be registered/removed on demand.
Since registration and removal are related they are in the
same patch.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:46 +02:00
Tomasz Duszynski
e50cb22331 raw/cnxk_bphy: support retrieving BPHY device memory
Allow user to retrieve baseband phy memory resources.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:44 +02:00
Tomasz Duszynski
61278bc794 raw/cnxk_bphy: support reading number of BPHY IRQs
Add support for retrieving maximum number of interrupts.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:40 +02:00
Tomasz Duszynski
7cf1976845 raw/cnxk_bphy: support interrupt init and cleanup
Add support for interrupt initialization and cleanup. Internally
interrupt initialization performs low level setup that allows
custom interrupt handler registration later on.

Interrupt initialization and cleanup are related hence they
are in the same patch.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:35 +02:00
Tomasz Duszynski
8ff3f5bd60 raw/cnxk_bphy: support BPHY dequeue operation
Add support for dequeueing responses to previously
enqueued messages.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:33 +02:00
Tomasz Duszynski
ca25655e49 raw/cnxk_bphy: support BPHY enqueue operation
Add preliminary support for enqueue operation.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:29 +02:00
Tomasz Duszynski
7e31ae5804 raw/cnxk_bphy: support reading BPHY queue count
Add support for reading number of available queues from baseband
phy. Currently only single queue is supported.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:25 +02:00
Tomasz Duszynski
4c33c6f5cd raw/cnxk_bphy: support reading BPHY queue configuration
Add support for reading baseband phy queue configuration.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:15 +02:00
Tomasz Duszynski
24d9c5d59d raw/cnxk_bphy: add baseband PHY skeleton driver
Add baseband phy skeleton driver. Baseband phy is a hardware subsystem
accelerating 5G/LTE related tasks. Note this driver isn't involved into
any sort baseband protocol processing. Instead it just provides means
for configuring hardware.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:11 +02:00
Tomasz Duszynski
603c65bfc9 common/cnxk: register BPHY IRQ
Add support for registering user supplied baseband PHY IRQ handler.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:08 +02:00
Tomasz Duszynski
b10c81ec7c common/cnxk: clear BPHY IRQ handler
Add support for clearing previously register baseband PHY IRQ handler.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:05 +02:00
Tomasz Duszynski
804c108b03 common/cnxk: set BPHY IRQ handler
Add support for setting custom baseband PHY IRQ handler.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:08:02 +02:00
Tomasz Duszynski
3a0abb7102 common/cnxk: remove BPHY IRQ stack
Add support for removing existing IRQ stack.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:59 +02:00
Tomasz Duszynski
1da18cb444 common/cnxk: retrieve BPHY IRQ stack
Add support for retrieving IRQ stack.
If stack does not exist then it gets created.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:56 +02:00
Tomasz Duszynski
c968c6188c common/cnxk: check BPHY IRQ availability
Add support for checking whether given IRQ is available.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:52 +02:00
Tomasz Duszynski
81c7f0e422 common/cnxk: add BPHY IRQ setup
Add support for initializing baseband PHY IRQs. While at it
also add support for reverting back to the default state.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:37 +02:00
Tomasz Duszynski
4ced2b04df common/cnxk: add BPHY device init and fini
Add support for device init and fini. It merely saves
baseband phy state container in a globally accessible
resource chest.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:33 +02:00
Tomasz Duszynski
4d2b226726 raw/cnxk_bphy: support CGX self test
Add support for performing selftest operation.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:32 +02:00
Tomasz Duszynski
ee9978857f raw/cnxk_bphy: support CGX dequeue operation
Add support for dequeueing responses to previously
enqueued messages.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:31 +02:00
Tomasz Duszynski
df39890f0c raw/cnxk_bphy: support CGX enqueue operation
Add support for enqueueing messages.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:29 +02:00
Tomasz Duszynski
8614a69195 raw/cnxk_bphy: support reading CGX queue count
Add support for reading number of available queues i.e number
of available logical macs (LMACs).

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:24 +02:00
Tomasz Duszynski
40458a1ec9 raw/cnxk_bphy: support reading CGX queue configuration
Add support for reading queue configuration. Single queue represents
a logical MAC available on RPM/CGX.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:20 +02:00
Tomasz Duszynski
3d27e49e07 raw/cnxk_bphy: add BPHY CGX/RPM skeleton driver
Add baseband PHY CGX/RPM skeleton driver which merely probes a matching
device. CGX/RPM are Ethernet MACs hardwired to baseband subsystem.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:16 +02:00
Tomasz Duszynski
2c19694c8e common/cnxk: start and stop BPHY LMAC
Add support for starting or stopping specific lmac.
Start enables Rx/Tx traffic while stop does the opposite.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:03 +02:00
Tomasz Duszynski
7fb5075a53 common/cnxk: set BPHY link state
Add support for setting link up or down.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:07:01 +02:00
Tomasz Duszynski
ba901d33e6 common/cnxk: set BPHY link mode
Add support for setting link mode.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:06:59 +02:00
Tomasz Duszynski
72096a4793 common/cnxk: enable and disable BPHY PTP mode
Add support for enabling or disablig PTP mode.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:06:57 +02:00
Tomasz Duszynski
6c870ee8f1 common/cnxk: enable and disable BPHY internal loopback
Add support for enabling or disabling internal loopback.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:06:50 +02:00
Tomasz Duszynski
1fa0045149 common/cnxk: get BPHY link information
Add support for retrieving link information.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:06:47 +02:00
Tomasz Duszynski
857721d62d common/cnxk: add BPHY communication with atf
Messages can be exchanged between userspace software and firmware
via set of two dedicated registers, namely scratch1 and scratch0.

scratch1 acts as a command register i.e message is sent to firmware,
while scratch0 holds response to previously sent message.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:06:45 +02:00
Tomasz Duszynski
0399ff9d2b common/cnxk: add BPHY CGX/RPM initialization and cleanup
Add support for low level initialization and cleanup of baseband
PHY CGX/RPM blocks.

Initialization and cleanup are related hence are in the same patch.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 23:06:44 +02:00
Xueming Li
1afce3086c bus/auxiliary: introduce auxiliary bus
Auxiliary bus [1] provides a way to split function into child-devices
representing sub-domains of functionality. Each auxiliary device
represents a part of its parent functionality.

Auxiliary device is identified by unique device name, sysfs path:
  /sys/bus/auxiliary/devices/<name>

Devargs legacy syntax of auxiliary device:
  -a auxiliary:<name>[,args...]
Devargs generic syntax of auxiliary device:
  -a bus=auxiliary,name=<name>/class=<class>/driver=<driver>[,args...]

[1] kernel auxiliary bus document:
https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-07-05 18:11:28 +02:00
Xueming Li
35d4f17b3d devargs: add common key definition
Add common devargs key definition for "bus", "class" and "driver".

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-07-05 16:33:18 +02:00
Thomas Monjalon
dbba7c9efb eal: save error in string copy
The string copy api rte_strscpy() did not set rte_errno during failures,
instead it just returned negative error number.

Set rte_errrno if the destination buffer is too small.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-07-05 15:11:30 +02:00
Chenglian Sun
487c582507 examples/l2fwd: remove mac-updating option
The "mac-updating" option can be removed since the associated mac_updating
variable is set to 1 by default.

Signed-off-by: Chenglian Sun <sunchenglian@loongson.cn>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-07-05 15:11:23 +02:00
Chenglian Sun
bbbe38a6d5 examples/l2fwd: fix [no-]mac-updating options
For l2fwd, --no-mac-updating and --mac-updating are treated as invalid
arguments. Rework long options parsing to let --no-mac-updating and
--mac-updating options work well.

Fixes: fa19eb20d212 ("examples/l2fwd: add forwarding port mapping option")
Cc: stable@dpdk.org

Signed-off-by: Chenglian Sun <sunchenglian@loongson.cn>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-07-05 15:11:12 +02:00
Ruifeng Wang
74fb854a3d examples/l3fwd: remove useless reloads in LPM main loop
Number of rx queue and number of rx port in lcore config are constants
during the period of l3 forward application running. But compiler has
no this information.

Copied values from lcore config to local variables and used the local
variables for iteration. Compiler can see that the local variables are
not changed, so qconf reloads at each iteration can be eliminated.

The change showed 1.8% performance uplift in single core, single port,
single queue test on N1SDP platform with MLX5 NIC.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 11:30:58 +02:00
Ruifeng Wang
d76d65060c examples/l3fwd: remove useless calculations in NEON LPM
Both L2 and L3 headers will be used in forward processing. And these
two headers are in the same cache line. It has the same effect for
prefetching with L2 header address and prefetching with L3 header
address.

Changed to use L2 header address for prefetching. The change showed
no measurable performance improvement, but it definitely removed
unnecessary instructions for address calculation.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-05 11:30:58 +02:00
Lance Richardson
a906371d27 app/test: fix IPv6 header initialization
Fix two issues found when writing PMD unit tests for HW ptype and
L4 checksum offload:

   - The version field in the IPv6 header was being set to zero,
     which prevented hardware from recognizing it as IPv6. The
     IP version field is now set to six.
   - The payload_len field was being initialized using host byte
     order, which (among other things) resulted in incorrect L4
     checksum computation. The payload_len field is now set using
     network (big-endian) byte order.

Fixes: 92073ef961ee ("bond: unit tests")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-07-05 11:30:58 +02:00
David Christensen
fc5bffb8b5 bus/pci: support IOVA as VA in PowerVM LPARs
Add IOMMU detection logic for PowerVM LPARs.

PowerNV $ cat /proc/cpuinfo
...
timebase     : 512000000
platform     : PowerNV
model        : 8335-GTW

PowerVM LPAR $ cat /proc/cpuinfo
...
timebase     : 512000000
platform     : pSeries
model        : IBM,9009-22A
machine      : CHRP IBM,9009-22A
MMU          : Hash

PowerNV KVM Guest $ cat /proc/cpuinfo
...
timebase     : 512000000
platform     : pSeries
model        : IBM pSeries (emulated by qemu)
machine      : CHRP IBM pSeries (emulated by qemu)
MMU          : Radix

Signed-off-by: David Christensen <drc@linux.vnet.ibm.com>
Reviewed-by: Thinh Tran <thinhtr@linux.vnet.ibm.com>
2021-07-05 11:30:58 +02:00
David Christensen
cc4219d1f0 bus/pci: fix IOVA as VA support for PowerNV
Fix the IOMMU detection logic that looks for the "platform" field of
/proc/cpuinfo on POWER systems.

Fixes: 905215731833 ("bus/pci: support IOVA as VA on PowerNV systems")
Cc: stable@dpdk.org

Signed-off-by: David Christensen <drc@linux.vnet.ibm.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-07-05 11:30:58 +02:00
Ruifeng Wang
18f0b28eec eal/arm: remove unused type
Data types Elf32_auxv_t and Elf64_auxv_t are used by OS Linux
auxiliary vector read, and not used by arch specific cpu flag
API implementations. Hence remove them from Arm file.

Reported-by: James Grant <j.grant@qub.ac.uk>
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2021-07-05 09:50:51 +02:00
David Marchand
5e2226f194 devtools: recommend new logtype helpers
Following commit eeded2044af5 ("log: register with standardized names"),
the new helpers should be preferred so that we can maintain a consistent
naming for logtypes.

Signed-off-by: David Marchand <david.marchand@redhat.com>
2021-07-01 21:54:22 +02:00
Viacheslav Ovsiienko
568d97c09c common/mlx5: fix Netlink port name padding in probing
On some kernels the string attributes within Netlink
reply messages might be not padded with zeroes (in cases
when string length is aligned with 4-byte boundary).
While device probing, the physical port name was wrongly recognized,
causing a probing failure.

Fixes: 30a86157f6d5 ("net/mlx5: support PF representor")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-06-24 13:19:54 +02:00