Split slow part of rib_autotest into rib_slow_autotest
Fixes: b35df4dd66 ("test/rib: add autotests")
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Acked-by: Aaron Conole <aconole@redhat.com>
Currently, externally created heaps are supposed to be automatically
mapped for VFIO DMA by EAL, however they only do so if, at the time of
heap creation, VFIO is initialized and has at least one device
available. If no devices are available at the time of heap creation (or
if devices were available, but were since hot-unplugged, thus dropping
all VFIO container mappings), then VFIO mapping code would have skipped
over externally allocated heaps.
The fix is two-fold. First, we allow externally allocated memory
segments to be marked as "heap" segments. This allows us to distinguish
between external memory segments that were created via heap API, from
those that were created via rte_extmem_register() API.
Then, we fix the VFIO code to only skip non-heap external segments.
Also, since external heaps are not guaranteed to have valid IOVA
addresses, we will skip those which have invalid IOVA addresses as well.
Fixes: 0f526d674f ("malloc: separate creating memseg list and malloc heap")
Cc: stable@dpdk.org
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Tested-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Acked-by: David Marchand <david.marchand@redhat.com>
The rte_vfio_dma_map/unmap API's have been marked as deprecated in
release 19.05. Remove them.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
When requesting DMA mapping to default container, we are meant to
supply the RTE_VFIO_DEFAULT_CONTAINER_FD value, however this is
not handled correctly by get_vfio_cfg_by_container_fd(), because
it only looks at actual fd values and does not check for this
special case.
Fix it to return default container if the fd requested is the
special RTE_VFIO_DEFAULT_CONTAINER_FD value.
Fixes: 4106d89a18 ("vfio: allow DMA map to the default container")
Cc: stable@dpdk.org
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
Add event dev main loop based on enabled l2fwd options and eventdev
capabilities.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Setup service cores for eventdev and Rx/Tx adapter when they don't have
internal port capability.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add event eth Rx/Tx adapter setup for both generic and internal port
event device pipelines.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add event device queue and port setup based on event eth Tx adapter
capabilities.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add infra to split eventdev framework based on event Tx adapter
capability.
If event Tx adapter has internal port capability then we use
`rte_event_eth_tx_adapter_enqueue` to transmitting packets else
we use a SINGLE_LINK event queue to enqueue packets to a service
core which is responsible for transmitting packets.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add infra to select event device as a mode to process packets through
command line arguments. Also, allow the user to select the schedule type
to be RTE_SCHED_TYPE_ORDERED, RTE_SCHED_TYPE_ATOMIC or
RTE_SCHED_TYPE_PARALLEL.
Usage:
`--mode="eventdev"` or `--mode="poll"`
`--eventq-sched="ordered"`, `--eventq-sched="atomic"` or
`--event-sched=parallel`
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Use WFE to save power while waiting for tag to become head.
SSO signals EVENTI to allow cores to exit from wfe when they
are waiting for specific operations in which one of them is
setting HEAD bit in GWS_TAG.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
This patch bump the supported SDK and MC firmware version
to the latest.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
dpaa and dpaa2 config have evolved to be same. The same binary
can now work across the platforms. So, there is no need to maintain
two different build configs.
The dpaa config shall work for both generation of dpaa platforms.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Use kernel headers for __le* types to avoid potential conflicts
resulting in redefinition errors for some Linux build environments.
Add check for FreeBSD execution environments.
Without this fix, aarch64 builds can fail with error below:
In file included from ../drivers/net/bnx2x/bnx2x.h:22,
from ../drivers/net/bnx2x/bnx2x_ethdev.c:8:
../drivers/net/bnx2x/bnx2x_osal.h:27:17: error:
conflicting types for ‘uint64_t’
#define __le64 uint64_t
^~~~~~~~
In file included from /usr/include/stdint.h:37,
from /usr/lib/gcc/aarch64-linux-gnu/8/include/stdint.h:9,
from ../lib/librte_eal/common/include/arch/arm/rte_byteorder.h:16,
from ../drivers/net/bnx2x/bnx2x.h:17,
from ../drivers/net/bnx2x/bnx2x_ethdev.c:8:
/usr/include/aarch64-linux-gnu/bits/stdint-uintn.h:27:20: note:
previous declaration of ‘uint64_t’ was here
typedef __uint64_t uint64_t;
^~~~~~~~
There is also one minor change mixed in this commit:
Some use of __FreeBSD__ are replaced by RTE_EXEC_ENV_FREEBSD.
Fixes: 38dff79ba7 ("net/bnx2x: update HSI")
Signed-off-by: Rasesh Mody <rmody@marvell.com>
Tested-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Tested-by: Gavin Hu <gavin.hu@arm.com>
The ret variable, initialized to -1, is changed to 0 during the test,
making the test successful in some cases where it should return a
failure.
Fix this by always using the GOTO_ERR() macro that sets the ret
variable before doing the goto.
Fixes: 923ceaeac1 ("test/mempool: add unit test cases")
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
For consistency, RTE_MEMPOOL_ALIGN should be used in place of
RTE_CACHE_LINE_SIZE. They have the same value, because the only arch
that was defining a specific value for it has been removed from DPDK.
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
When populating a mempool, ensure that objects are not located across
several pages, except if user did not request IOVA-contiguous objects.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Introduce new functions that can used by mempool drivers to
calculate required memory size and to populate mempool.
For now, these helpers just replace the *_default() functions
without change. They will be enhanced in next commit.
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
In rte_mempool_populate_default(), we determine the page size,
which is needed for calc_size and allocation of memory.
Move this in a function and export it, it will be used in a next
commit.
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
The previous commit reduced the amount of required memory when
populating the mempool with non IOVA-contiguous memory.
Since there is no big advantage to have a fully iova-contiguous mempool
if it is not explicitly asked, remove this code, it simplifies the
populate function.
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
The size returned by rte_mempool_op_calc_mem_size_default() is aligned
to the specified page size. Therefore, with big pages, the returned size
can be much more that what we really need to populate the mempool.
For instance, populating a mempool that requires 1.1GB of memory with
1GB hugepages can result in allocating 2GB of memory.
This problem is hidden most of the time due to the allocation method of
rte_mempool_populate_default(): when try_iova_contig_mempool=true, it
first tries to allocate an iova contiguous area, without the alignment
constraint. If it fails, it fallbacks to an aligned allocation that does
not require to be iova-contiguous. This can also fallback into several
smaller aligned allocations.
This commit changes rte_mempool_op_calc_mem_size_default() to relax the
alignment constraint to a cache line and to return a smaller size.
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
rte_mempool_populate_virt() currently requires that both addr
and length are page-aligned.
Remove this unneeded constraint which can be annoying with big
hugepages (ex: 1GB).
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
DPAA SEC shall be able to work independent of DPAA ETH
driver.
This patch moves qbman init to bus, so that any driver
can use them even when no eth resources are present
or none of the eth devices are probed.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
When BMAN is not able to accept more buffers, it could be that
there are no FBPR's (internal mem provided to bman) left.
Report error in such condition.
Fixes: 5dc43d22b5 ("mempool/dpaa2: add hardware offloaded mempool")
Cc: stable@dpdk.org
Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com>
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
This patch adds the logic in the DPAA2 QDMA packet enqueue API
Fixes: 4d9a3f2a01 ("raw/dpaa2_qdma: support RBP mode")
Cc: stable@dpdk.org
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
In the packet transmit, if the QBMAN is not able to process the
packets, the Tx function loops infinitely to send the packet out.
This patch changes the logic retry for some time (count) and then
return.
Fixes: cd9935cec8 ("net/dpaa2: enable Rx and Tx operations")
Fixes: 16c4a3c46a ("bus/fslmc: add enqueue response read in qbman")
Cc: stable@dpdk.org
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com>
In Virtual Machine the memory node in the device tree is at
'/proc/device-tree/memory/reg' which is separate from the memory
node path on the host. This patch enables check on both the paths.
Fixes: 2f3d633aa5 ("common/dpaax: add library for PA/VA translation table")
Cc: stable@dpdk.org
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
On LS1043, we are good to check 128 byte alignment of offset to
transmit out the packet
Fixes: f8c7a17a48 ("net/dpaa: support Tx scatter gather for non-DPAA buffer")
Cc: stable@dpdk.org
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Add fib implementation for ipv6 using modified DIR24_8 algorithm.
Implementation is similar to current LPM6 implementation but has
few enhancements:
faster control plane operations
more bits for userdata in table entries
configurable userdata size
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Add fib implementation for DIR24_8 algorithm for IPv4.
Implementation is similar to current LPM implementation but has
few enhancements:
faster control plane operations
more bits for userdata in table entries
configurable userdata size
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Add FIB library support for IPv6.
It implements a dataplane structures and algorithms designed for
fast IPv6 longest prefix match.
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Add FIB (Forwarding Information Base) library. This library
implements a dataplane structures and algorithms designed for
fast longest prefix match.
Internally it consists of two parts - RIB (control plane ops) and
implementation for the dataplane tasks.
Initial version provides two implementations for both IPv4 and IPv6:
dummy (uses RIB as a dataplane) and DIR24_8 (same as current LPM)
Due to proposed design it allows to extend FIB with new algorithms
in future (for example DXR, poptrie, etc).
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Add RIB (Routing Information Base) library. This library
implements an IPv4 routing table optimized for control plane
operations. It implements a control plane struct containing routes
in a tree and provides fast add/del operations for routes.
Also it allows to perform fast subtree traversals
(i.e. retrieve existing subroutes for a given prefix).
This structure will be used as a control plane helper structure
for FIB implementation. Also it might be used standalone in other
different places such as bitmaps for example.
Internal implementation is level compressed binary trie.
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Building with clang 3.4.2 caused the following error:
CC dpaa2_sec_dpseci.o
In file included from /dpdk/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c:40:
In file included from /dpdk/drivers/common/dpaax/caamflib/desc/ipsec.h:11:
In file included from /dpdk/drivers/common/dpaax/caamflib/rta.h:11:
In file included from .../common/dpaax/caamflib/rta/sec_run_time_asm.h:14:
/dpdk/drivers/common/dpaax/compat.h:108:18:
error: redefinition of typedef 'dma_addr_t' is a C11 feature
[-Werror,-Wtypedef-redefinition]
typedef uint64_t dma_addr_t;
^
/dpdk/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c:37:18:
note: previous definition is here
typedef uint64_t dma_addr_t;
^
The dma_addr_t was defined in the common compat.h file, and does not
need to be redefined.
The meson build include directories list was updated to enable the
definition in the common compat.h file be used.
Fixes: 8c83f28cc8 ("common/dpaax: move OF library from DPAA bus")
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
