Commit Graph

23135 Commits

Author SHA1 Message Date
Qi Zhang
8c25f4204f net/ice/base: split capability parse into separate functions
The ice_parse_caps function is used to convert the capability block data
coming from firmware into a structured format used by other parts of the
code.

The current implementation directly updates the hw->func_caps and
hw->dev_caps structures. It is directly called from within
ice_aq_discover_caps. This causes the discover_caps function to have the
side effect of modifying the hw capability structures, which is not
intuitive.

Split this function into ice_parse_dev_caps and ice_parse_func_caps.
These functions will take a pointer to the dev_caps and func_caps
respectively. Also create an ice_parse_common_caps for sharing the
capability logic that is common to device and function.

Doing so enables a future refactor to allow reading and parsing
capabilities into a local caps structure instead of modifying the
members of the hw structure directly.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-07-07 23:38:26 +02:00
Qi Zhang
c91577f24f net/ice/base: add capability list AQ function
The current implementation for reading device and function capabilities
from firmware, ice_aq_discover_caps, has potentially undesirable
side effects.

ice_aq_discover_caps calls ice_parse_caps, resulting in overwriting the
capabilities stored in the hw structure. This is ok during
initialization, but means that code which wants to read the capabilities
after initialization cannot use ice_aq_discover_caps without being
careful of the side effects.

Factor out the AQ command logic into a new ice_aq_list_caps function.
This will be used by the ice_aq_discover_caps function.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-07-07 23:38:26 +02:00
Qi Zhang
6857fdaff5 net/ice/base: clean code in flow director module
Remove unused macro and function.
Declare no external referenced function as static.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-07-07 23:38:26 +02:00
Qi Zhang
946a5337b2 net/ice/base: move LLDP function to common module
To implement a FW workaround for LFC, a set_local_mib must be
performed after every link up event.  For systems that do not
have DCB configured, we need to move the function
ice_aq_set_lldp_mib() from the DCB specific ice_dcb.c to
ice_common.c so that the driver always has access to this AQ
command.

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-07-07 23:38:26 +02:00
Qi Zhang
8921d08861 net/ice/base: cleanup some code style
Cleanup code style issue reported by kernel checkpatch.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-07-07 23:38:26 +02:00
Qi Zhang
bed9bb3139 net/ice/base: fix GTP-U inner RSS IPv4 IPv6 co-exist
An IP header combined with GTP-U header should be regarded as
inner layer for RSS, otherwise it mess the field vector between
an IPv4 rule and IPv6 rule e.g:

testpmd> flow create 0 ingress pattern eth / ipv4 / udp / gtpu / \
gtpu_psc  / ipv4 / udp / end actions rss types ipv4-udp end key_len \
0 queues end / end
testpmd> flow create 0 ingress pattern eth / ipv4 / udp / gtpu / \
gtpu_psc  / ipv6 / udp / end actions rss types ipv6-udp end key_len \
0 queues end / end

Fixes: b7d34ccc47 ("net/ice/base: packet encapsulation for RSS")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-07-07 23:38:26 +02:00
Wei Zhao
aab44eb681 net/ice: redirect switch rule with to VSI list action
Support redirect a switch rule if its action is to VSI list.

Fixes: 397b4b3c50 ("net/ice: enable flow redirect on switch")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-07 23:38:26 +02:00
Dekel Peled
b293fbf967 net/mlx5: add OS specific flow actions operations
This patch introduces the OS specific functions, for flow actions
create and destroy operations.

In existing implementation, the functions to create flow actions
return a pointer to the created action object.

The new OS specific functions to create flow actions return 0 on
success, and (-1) on failure.
On success, a pointer to the created action object is returned
using an additional parameter.
On failure errno is set.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-07 23:38:26 +02:00
Dekel Peled
e57b858710 net/mlx5: add OS specific flow create and destroy
This patch introduces the OS specific functions, for flow create
and flow destroy operations.

In existing implementation, the functions to create objects
(flow/table/matcher) return a pointer to the created object.
The functions to destroy objects return 0 on success and errno on
failure.

The new OS specific functions to create objects return 0 on success,
and (-1) on failure.
On success, a pointer to the created object is returned using an
additional parameter.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-07 23:38:26 +02:00
Dekel Peled
e4ed8de39b net/mlx5: add OS specific flow type selection
In current implementation the flow type (DV/Verbs) is selected
using dedicated function flow_get_drv_type().

This patch adds OS specific function mlx5_flow_os_get_type(), to
allow OS specific flow type selection.
The new function is called by flow_get_drv_type(), and if it returns a
valid value (DV/Verbs) no more logic is required.
Otherwise the existing logic is executed.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-07 23:38:26 +02:00
Dekel Peled
17ad3af9f4 net/mlx5: add OS specific flow related utilities
This patch introduces the first OS specific utility functions,
for use by flow engine in different OS implementation.

The first utility functions are:
bool mlx5_flow_os_item_supported(item)
bool mlx5_flow_os_action_supported(action)

They are implemented to check OS specific support for different
item types and action types.

New header file is added:
drivers/net/mlx5/linux/mlx5_flow_os.h

This file contains the utility functions mentioned above for Linux OS.
At this stage they are implemented as static inline, for efficiency,
and always return true.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-07 23:38:26 +02:00
Dekel Peled
6ad7cfaa66 net/mlx5: rename Verbs action to generic name
As part of the effort to support DPDK on Windows and other OS,
rename 'verbs_action' to the generic name 'action'.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-07 23:38:26 +02:00
Dekel Peled
341c894104 net/mlx5: rename Verbs flow to generic name
As part of the effort to support DPDK on Windows and other OS,
rename from IB related name to generic name.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-07 23:38:26 +02:00
Harman Kalra
43330c4de3 common/octeontx2: fix crash on running procinfo
Segmentation fault has been observed while running procinfo
with reset options i.e. --stats-reset and --xstats-reset.
Reason is procinfo runs as a secondary process and tries to
hold a lock which is part of struct mdev, which was not
allocated as part of shared memory.

Fixes: 5ca59711f7 ("common/octeontx2: add mailbox base support infra")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-07-07 23:38:26 +02:00
Junyu Jiang
1feb8e3f4e net/iavf: fix RSS RETA after restart
This patch moved the RSS initialization from dev start to
dev configure, to fix the issue that RSS redirection table
can not be kept after restarting port.

Fixes: 69dd4c3d08 ("net/avf: enable queue and device")
Cc: stable@dpdk.org

Signed-off-by: Junyu Jiang <junyux.jiang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-07-07 23:38:26 +02:00
Ferruh Yigit
a6395d471e net/ixgbe/base: remove dead code
The question around getting rid of the assignments seems lived
long enough, if they are not needed until now, we can drop them.

Fixes: 39bca0ed99 ("ixgbe: DCB in base driver")
Cc: stable@dpdk.org

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-07 23:38:26 +02:00
Ferruh Yigit
ca5e39f853 net/iavf: fix uninitialized variable
This is observed with experimental gcc 11, although the older gcc
versions don't complain about it, issue seems a valid one.
gcc version 11.0.0 20200621 (experimental) (GCC)

Build error
.../drivers/net/iavf/iavf_ethdev.c: In function ‘iavf_dev_link_update’:
.../drivers/net/iavf/iavf_ethdev.c:641:6:
    error: ‘new_link’ is used uninitialized [-Werror=uninitialized]
  641 |  if (rte_atomic64_cmpset((uint64_t *)&dev->data->dev_link,
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  642 |     *(uint64_t *)&dev->data->dev_link,
      |     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  643 |     *(uint64_t *)&new_link) == 0)
      |     ~~~~~~~~~~~~~~~~~~~~~~~
.../drivers/net/iavf/iavf_ethdev.c:596:22:
    note: ‘new_link’ declared here
  596 |  struct rte_eth_link new_link;
      |                      ^~~~~~~~
cc1: all warnings being treated as error

All fields of the 'new_link' struct is already set in function, so the
'uninitialized' warning is hard to get. This is because the combination
of aligning and bitfield usage of the struct

The definition of the struct is:
struct rte_eth_link {
        uint32_t link_speed;        /**< ETH_SPEED_NUM_ */
        uint16_t link_duplex  : 1;  /**< ETH_LINK_[HALF/FULL]_DUPLEX */
        uint16_t link_autoneg : 1;  /**< ETH_LINK_[AUTONEG/FIXED] */
        uint16_t link_status  : 1;  /**< ETH_LINK_[DOWN/UP] */
} __rte_aligned(8);      /**< aligned for atomic64 read/write */

Overall the size of the 'struct rte_eth_link' is 64 bits, but function
only sets the 35 bits of it, because only 3 bits of 16 bits variable are
used.
When the struct cast to 'uint64_t' because of the 'rte_atomic64_cmpset'
the upper 29 bits are used without initialization.

To fix the uninitialized usage, memset the variable 'new_link' before
using it.

Fixes: 48de41ca11 ("net/avf: enable link status update")
Cc: stable@dpdk.org

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-07 23:38:26 +02:00
Shougang Wang
01186263c2 net/ice: fix EEPROM data
Kernel driver reads EEPROM data from flash but DPDK reads from
shadow ram. This patch fixes the issue by changing method to get
EEPROM data from flash.

Fixes: 68a1ab82ad ("net/ice: speed up to retrieve EEPROM")
Cc: stable@dpdk.org

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-07 23:38:26 +02:00
Wei Zhao
b23c52a451 net/ixgbe: report 10Mbps link speed for x553
For ixgbe x553(IXGBE_DEV_ID_X550EM_A_1G_T) it support 10M
link speed, so add the support link speed info for 10Mb/s.

Fixes: af75078fec ("first public release")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
2020-07-07 23:38:26 +02:00
Qi Zhang
1fe1d74ce1 net/ice: support original VF action for DCF
Add support to allow the original VF actions in DCF.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-07-07 23:38:26 +02:00
Lukasz Wojciechowski
048db4b6dc service: fix core mapping reset
The rte_service_lcore_reset_all function stops execution of services
on all lcores and switches them back from ROLE_SERVICE to ROLE_RTE.
However the thread loop for slave lcores (eal_thread_loop) distincts these
roles to set lcore state after processing delegated function.
It sets WAIT state for ROLE_SERVICE, but FINISHED for ROLE_RTE.
So changing the role to RTE before stopping work in slave lcores
causes lcores to end in FINISHED state. That is why the rte_eal_lcore_wait
must be run after rte_service_lcore_reset_all to bring back lcores to
launchable (WAIT) state.
This has been fixed in test app and clarified in API documentation.

Setting the state to WAIT in rte_service_runner_func is premature
as the rte_service_runner_func function is still a part of the lcore
function delegated to slave lcore. The state is overwritten anyway in
slave lcore thread loop. This premature setting state to WAIT might
however cause rte_eal_lcore_wait, that was called by the application,
to return before slave lcore thread set the FINISHED state. That's
why it is removed from librte_eal rte_service_runner_func function.

Bugzilla ID: 464
Fixes: 21698354c8 ("service: introduce service cores concept")
Fixes: f038a81e1c ("service: add unit tests")
Cc: stable@dpdk.org

Reported-by: Sarosh Arif <sarosh.arif@emumba.com>
Signed-off-by: Lukasz Wojciechowski <l.wojciechow@partner.samsung.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2020-07-08 18:52:49 +02:00
Phil Yang
030c216411 eventdev: relax SMP barriers with C11 atomics
The impl_opaque field is shared between the timer arm and cancel
operations. Meanwhile, the state flag acts as a guard variable to
make sure the update of impl_opaque is synchronized. The original
code uses rte_smp barriers to achieve that. This patch uses C11
atomics with an explicit one-way memory barrier instead of full
barriers rte_smp_w/rmb() to avoid the unnecessary barrier on aarch64.

Since compilers can generate the same instructions for volatile and
non-volatile variable in C11 __atomics built-ins, so remain the volatile
keyword in front of state enum to avoid the ABI break issue.

Cc: stable@dpdk.org

Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
2020-07-08 18:16:41 +02:00
Phil Yang
e84d9c62c6 eventdev: remove redundant reset on timer cancel
There is no thread will access these impl_opaque data after timer
canceled. When new timer armed, it got refilled. So the cleanup
process is unnecessary.

Cc: stable@dpdk.org

Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
2020-07-08 18:16:41 +02:00
Phil Yang
1028d63eb2 eventdev: use C11 atomics for lcore timer armed flag
The in_use flag is a per core variable which is not shared between
lcores in the normal case and the access of this variable should be
ordered on the same core. However, if non-EAL thread pick the highest
lcore to insert timers into, there is the possibility of conflicts
on this flag between threads. Then the atomic compare-and-swap
operation is needed.

Use the C11 atomics instead of the generic rte_atomic operations to
avoid the unnecessary barrier on aarch64.

Cc: stable@dpdk.org

Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
2020-07-08 18:16:41 +02:00
Phil Yang
aceb737d6f eventdev: fix race condition on timer list counter
The n_poll_lcores counter and poll_lcore array are shared between lcores
and the update of these variables are out of the protection of spinlock
on each lcore timer list. The read-modify-write operations of the counter
are not atomic, so it has the potential of race condition between lcores.

Use c11 atomics with RELAXED ordering to prevent confliction.

Fixes: cc7b73ea9e ("eventdev: add new software timer adapter")
Cc: stable@dpdk.org

Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
2020-07-08 18:16:41 +02:00
Arek Kusztal
a0e437cc65 test/crypto: add ChaCha20-Poly1305 cases
This patch adds Chacha20-Poly1305 implementation to
cryptodev tests.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Tejasree Kondoj <ktejasree@marvell.com>
2020-07-08 18:16:41 +02:00
Arek Kusztal
faa57df0b4 crypto/qat: support ChaCha20-Poly1305
This patchset adds ChaCha20-Poly1305 implementation to Intel
QuickAssist Technology pmd.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2020-07-08 18:16:40 +02:00
Arek Kusztal
7788dceccb common/qat: add multi-process handling of capabilities
Move qat capabilities data into a memzone where it can be
shared by primary and secondary processes.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-08 18:16:27 +02:00
Arek Kusztal
21792c4432 crypto/qat: add multi-process handling of driver ID
As cryptodev driver_id is allocated per-process,
a corner case exists where binaries for primary and
secondary processes could have different driver_ids
if built differently. Add checking in qat PMD to catch and
handle the case where driver_ids are inconsistent.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-08 18:16:27 +02:00
Arek Kusztal
9904ff6849 common/qat: improve multi-process handling
This patch refactors qat data into structures
which are local to the process and structures which
are intended to be shared by primary and secondary
processes. This enables qat devices to be used by
multi process applications.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-08 18:16:26 +02:00
Akhil Goyal
d55db36986 common/dpaax: remove unnecessary jump for PDCP
In case of LX2160, PROTOCOL command can be used in some of the PDCP
cases, in those the jump command prior to KEY command may not be
required.

The issue observed due to these JUMP command on LX2160 is that,
the CAAM gets stuck and the processing never get completed. The
system becomes unusable.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2020-07-08 18:16:17 +02:00
Akhil Goyal
b86a32234f common/dpaax: fix 12-bit null auth case
In cases of NULL auth in PDCP, the descriptors
should be based on ALGORITHM command instead of
PROTOCOL command.
It was done in case of encap, but was missing in
decap.

Fixes: 526cdf60f1 ("crypto/dpaa2_sec: update desc for PDCP 18-bit enc-auth")
Cc: stable@dpdk.org

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2020-07-08 18:16:17 +02:00
Akhil Goyal
91d581dc1b crypto/dpaa2_sec: fix HFN override
HFN is set as a uint32_t but the value retrieved is
uint8_t. Fixed the type casting to get the correct value.

Fixes: bef594ec5c ("crypto/dpaa2_sec: support PDCP offload")
Fixes: af61f07509 ("crypto/dpaa2_sec: support scatter gather for proto offloads")
Cc: stable@dpdk.org

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2020-07-08 18:16:17 +02:00
Akhil Goyal
453b9593a3 crypto/dpaax_sec: fix inline query for descriptors
The maximum length of job descriptor which is formed
is 13 words and hence rta_inline_query should take
care of the max descriptor(shared + job) lengths and
thus find out of the key can be referenced or immediate.

Fixes: 05b12700cd ("crypto/dpaa_sec: support null algos for protocol offload")
Fixes: 13273250ee ("crypto/dpaa2_sec: support AES-GCM and CTR")
Cc: stable@dpdk.org

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2020-07-08 18:16:17 +02:00
Akhil Goyal
5a61bdb944 test/crypto-perf: add option to enable session HFN
Add a new option for PDCP cases to enable use of session
based fixed HFN value instead of per packet HFN which was
enabled by hfn override feature.
By default HFN override is enabled and if session based
fixed HFN need to be tested, add "--pdcp-ses-hfn-en" in the
command line.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2020-07-08 18:16:17 +02:00
Akhil Goyal
d3be77833f test/crypto: update PDCP HFN scenarios
As per current framework of PDCP testing, app can only support
either HFN override or fixed session HFN values but not both.
Now to enable both, either we duplicate all PDCP cases(>100)
for both override and fixed HFN. It will look clumsy as the
number of cases will be very high without much value addition.

Now to overcome this, we can do HFN override for Downlink cases
and fixed HFN for uplink cases. This way we will not loose the
test coverage and there will not be duplicacy in the test cases.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2020-07-08 18:16:17 +02:00
Akhil Goyal
f6ab96f13d crypto/dpaax_sec: fix 18-bit PDCP cases with HFN override
In case of RTA_SEC_ERA = 8, where the length of shared desc
is large for some of PDCP cases, the descriptor buffer cannot
hold 2 extra words when HFN override is enabled. As a result,
the descriptor fails.

This patch converts one of the keys from immediate key to
reference key hence reducing the length of the descriptor.

Fixes: 2e4cbdb4b2 ("crypto/dpaax_sec: support PDCP U-Plane with integrity")
Cc: stable@dpdk.org

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2020-07-08 18:16:17 +02:00
Tejasree Kondoj
cb7842f23e crypto/octeontx2: support ChaCha20-Poly1305
Add ChaCha20-Poly1305 AEAD algorithm support in crypto_octeontx2 PMD

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
2020-07-08 18:16:17 +02:00
Tejasree Kondoj
a0645ed0d6 crypto/octeontx2: discover capabilities
Populate capabilities based on device features.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
2020-07-08 18:16:17 +02:00
Fiona Trahe
b69f927d52 cryptodev: add traces in multi-process path
This patch adds traces to some Cryptodev functions that are used
in primary/secondary context.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-08 18:16:17 +02:00
Fiona Trahe
21b6a35171 cryptodev: add function to check queue pair status
This patch adds function that can check if queue pair
was already setup. This may be useful when dealing with
multi process approach in cryptodev.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-08 18:16:17 +02:00
Adam Dybkowski
12e4f2b719 crypto/qat: fix AES-XTS capabilities
This patch fixes the increment field of the AES-XTS cipher key size.

Fixes: 7d5ef3bb32 ("crypto/qat: support XTS")
Cc: stable@dpdk.org

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-08 18:16:16 +02:00
Anoob Joseph
53313910bc test/crypto: use generic test suite for OCTEON TX/TX2
This patch enables the generic crypto tests for OCTEON TX and
OCTEON TX2 PMDs. Removes the PMD specific tests.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-08 18:16:16 +02:00
Anoob Joseph
9fb409df70 test/crypto: remove some PMD specific null tests
This patch removes the OCTEON TX and OCTEON TX2 PMDs specific
test cases related to null cipher.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-08 18:16:16 +02:00
Ankur Dwivedi
cec2f173a9 crypto/octeontx2: revert non-byte aligned data feature
This reverts commit 51f3e107ac.

For SNOW and ZUC algos the offset value for enryption and decryption
is converted to bytes. Hence RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA
feature is not supported by the octeontx2 crypto pmd.

Fixes: 51f3e107ac ("crypto/octeontx2: enable non-byte aligned data")
Cc: stable@dpdk.org

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2020-07-08 18:16:16 +02:00
Ankur Dwivedi
371dbd5751 crypto/octeontx: revert non-byte aligned data feature
This reverts commit 32b8f26adf.

For SNOW and ZUC algos the offset value for enryption and decryption
is converted to bytes. Hence RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA
feature is not supported by the octeontx crypto pmd.

Fixes: 32b8f26adf ("crypto/octeontx: enable non-byte aligned data")
Cc: stable@dpdk.org

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2020-07-08 18:16:16 +02:00
Ankur Dwivedi
04907345db crypto/octeontx2: reset session private data
This patch sets the first 32 bytes of session private data
to zero. This prevents garbage data to be used in code logic.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2020-07-08 18:16:16 +02:00
Ankur Dwivedi
0b345f4167 crypto/octeontx: reset session private data
This patch sets the first 32 bytes of session private data
to zero. This prevents garbage data to be used in code logic.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2020-07-08 18:16:16 +02:00
Ankur Dwivedi
966b43fd99 crypto/octeontx: remove empty statistics callback
The stats get and reset functions for octeontx crypto PMD are
unimplemented. So removing them.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2020-07-08 18:16:16 +02:00
Ankur Dwivedi
0058f30514 common/cpt: fix encryption offset
In case of gmac auth the encryption offset should be set to zero.

Fixes: b74652f3a9 ("common/cpt: add microcode interface for encryption")
Fixes: 177b41ceee ("common/cpt: add microcode interface for decryption")
Cc: stable@dpdk.org

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
2020-07-08 18:16:16 +02:00