Commit Graph

9722 Commits

Author SHA1 Message Date
Kishore Padmanabha
8d08927a0b net/bnxt: refactor and rename some fields and enums
- rename regfile_wr_idx to regfile_idx
  The regfile index shall be used for both write and read operations.
  Hence the field is renamed.
- remove the unused enum BNXT_ULP_REGFILE_INDEX_CACHE_ENTRY_PTR
- rename the enums in the bnxt_ulp_resource_sub_type
  The enums in the bnxt_ulp_resource_sub_type are renamed to reflect
  the table types explicitly.
- rename an enum in the regfile index
  The BNXT_ULP_REGFILE_INDEX_ACTION_PTR_MAIN is renamed to
  BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR since it is the main
  action pointer.
- remove cache_tbl_id enums
  The bnxt_ulp_cache_tbl_id enums are not required any longer
  since the index is now calculated using resource sub type
  and direction.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
f48751338c net/bnxt: convert critical resource to enum
The critical resource field in the template table is assigned
enumeration values instead of hard coded values.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
ae33d634e6 net/bnxt: use vport in PHY port action handler
The phy port action handler should get vport details and not
vnic id. The fix is to calculate the vport of the given
port.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
8608c099d1 net/bnxt: process action templates
Extend index table processing to process action templates.
The index table processing is extended to address encapsulation fields
so that action template index table can be processed by a common index
processing function that can process both class and action index
tables.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
52799debdf net/bnxt: support action bitmap opcode
This enables using the action bitmap to update the action result
fields in the flow creation instead of using computed header fields.
Direction bit needs to be added to the action bitmap during
flow parsing, so that egress flows can be matched to the
template signature.
An example would be the usage of the vlan pop action bitmap that is
used to updated action result field as part of this commit.
Also the ulp action bitmap enumeration values that
contain open flow string are renamed.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
494f03ff01 net/bnxt: remove cache table ID from mapper class table
The cache table id is not needed anymore since the value can
be calculated from resource sub type and direction.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
642feef813 net/bnxt: add resource subtype to class and action tables
Added support for resource sub type to class and action tables
renamed table id to resource type.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
bfcaae8fda net/bnxt: change default identifier to global resource
The default identifier list in ulp mapper is extended to support
other truflow resource types and not just identifiers.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
0f772db63d net/bnxt: update compute field list and access macros
The compute field is extended to support action fields and not
just header fields, hence CHF is changed to CF. The access macro
for compute field is renamed to address this.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
deb31991b7 net/bnxt: add computed header field in result opcode
Added support for computed header fields in the result field
processing. The computed header fields are fields that are extracted
from header fields or derived from data that is not part of the flow
command but shall be used in setting up of the flow rule.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
efcb502fab net/bnxt: support more resource functions in flow database
Added support to include more resource functions in the flow
database. The number of bits increased from 3 to 8 for storing
the resource function.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
a2be13e175 net/bnxt: remove fields from bitmap and mapper table
Remove unnecessary fields from bitmap and mapper table.

- remove svif and VLAN info from header bitmap
The svif and vlan information are removed from header bitmap
signature so that the matching algorithm does not use these
fields to perform matching. So flows with or without vlan
tag could use the same flow template.
- remove mem field from mapper class table
Remove the unused mem field in the ulp mapper class table structure

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Kishore Padmanabha
4970550876 net/bnxt: distribute makefile to subdirectories
Created sub Makefile for tf_ulp and and tf_core for easy management.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-06-30 14:52:30 +02:00
Harman Kalra
987984204b net/octeontx2: fix DMAC filtering
Issue has been observed where packets are getting dropped
at DMAC filtering if a new dmac address is added before
starting of port.

Fixes: c43adf6168 ("net/octeontx2: add unicast MAC filter")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-06-30 14:52:30 +02:00
Ruifeng Wang
78bfe1666b net/i40e: support aarch32
Expand vector PMD support to aarch32.
Enable i40e PMD by default for armv7 make build.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-06-30 14:52:30 +02:00
Ruifeng Wang
2b7a54f091 net/ixgbe: fix include of vector header file
The include of 'arm_neon.h' causes issues to old gcc and aarch32.
Including 'rte_vect.h' instead fixes these issues.

Fixes: b20971b6cc ("net/ixgbe: implement vector driver for ARM")
Cc: stable@dpdk.org

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-06-30 14:52:30 +02:00
Ruifeng Wang
50dd63b9bf net/ixgbe: support aarch32
Expand vector PMD support to aarch32.
Enable ixgbe PMD by default for armv7 make build.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-06-30 14:52:30 +02:00
David Marchand
b52d25ae4b net/mvpp2: fix non-EAL thread support
Caught by code inspection, for a non-EAL thread identified with
rte_lcore_id() == LCORE_ID_ANY, the code currently arbitrarily uses
lcore 0 while there is no guarantee this lcore is used.

Fixes: 3588aaa68e ("net/mrvl: fix HIF objects allocation")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Liron Himi <lironh@marvell.com>
2020-06-30 14:52:30 +02:00
Devendra Singh Rawat
b10231aed1 net/qede: fix multicast drop in promiscuous mode
After enabling promiscuous mode all packets whose destination MAC
address is a multicast address were being dropped. This fix configures
H/W to receive all traffic in promiscuous mode. Promiscuous mode also
overrides allmulticast mode on/off status.

Fixes: 40e9f6fc15 ("net/qede: enable VF-VF traffic with unmatched dest address")
Cc: stable@dpdk.org

Signed-off-by: Devendra Singh Rawat <dsinghrawat@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Rasesh Mody <rmody@marvell.com>
2020-06-30 14:52:30 +02:00
Harman Kalra
9311beeea4 net/octeontx2: support CN98xx
New cn98xx SOC comes up with two NIX blocks wrt
cn96xx, cn93xx, to achieve higher performance.
Also the no of cores increased to 36 from 24.

Adding support for cn98xx where need a logic to
detect if the LF is attached to NIX0 or NIX1 and
then accordingly use the respective NIX block.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-06-30 14:52:30 +02:00
Viacheslav Ovsiienko
420bbdae89 net/mlx5: fix host physical function representor naming
The new kernel adds the names like "pf0" for Host PCI physical
function representor on Bluefield SmartNIC hosts. This patch
provides correct HPF representor recognition over the kernel
versions 5.7 and laters.

The following port naming formats are supported:

  - missing physical port name (no sysfs/netlink key) at all,
    master is assumed

  - decimal digits (for example "12"), representor is
    assumed, the value is the index of attached VF

  - "p" followed by decimal digits, for example "p2", master
    is assumed

  - "pf" followed by PF index, for example "pf0", Host PF
     representor is assumed on SmartNIC systems.

  - "pf" followed by PF index concatenated with "vf" followed by
     VF index, for example "pf0vf1", representor is assumed.
     If index of VF is "-1" it is a special case of Host PF
     representor, this representor must be indexed in devargs
     as 65535, for example representor=[0-3,65535] will
     allow representors for VF0, VF1, VF2, VF3 and for host PF.

Fixes: 79aa430721 ("common/mlx5: split common file under Linux directory")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-30 14:52:30 +02:00
Junyu Jiang
4717a12cfa net/ice: initialize and update RSS based on user config
Initialize and update RSS configure based on user request
(rte_eth_rss_conf) from dev_configure and .rss_hash_update ops.
All previous default configure has been removed.

Signed-off-by: Junyu Jiang <junyux.jiang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-06-30 14:52:30 +02:00
Ori Kam
262c7ad0dd common/mlx5: move doorbell record from net driver
The creation of DBR can be used by a number of different
Mellanox PMDs. for example RegEx / Net / VDPA.

This commits moves the DBR creation and release functions to common
folder.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-06-30 14:52:30 +02:00
Ophir Munk
391b8bcc81 common/mlx5: move some getter functions from net driver
Getter functions such as: 'mlx5_os_get_ctx_device_name',
'mlx5_os_get_ctx_device_path', 'mlx5_os_get_dev_device_name',
'mlx5_os_get_umem_id' are implemented under net directory. To enable
additional devices (e.g. regex, vdpa) to access these getter functions
they are moved under common directory.

As part of this commit string sizes DEV_SYSFS_NAME_MAX and
DEV_SYSFS_PATH_MAX are increased by 1 to make sure that the destination
string size in strncpy() function is bigger than the source string size.
This update will avoid GCC version 8 error -Werror=stringop-truncation.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-30 14:52:30 +02:00
Suanming Mou
ac79183dc6 net/mlx5: optimize free counter lookup
Currently, when allocate a new counter, it needs loop the whole
container pool list to get a free counter.

In the case with millions of counters allocated, and all the pools
are empty, allocate the new counter will still need to loop the
whole container pool list first, then allocate a new pool to get a
free counter. It wastes the cycles during the pool list traversal.

Add a global free counter list in the container helps to get the free
counters more efficiently.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-30 14:52:30 +02:00
Suanming Mou
b1cc226644 net/mlx5: optimize single counter pool search
For single counter, when allocate a new counter, it needs to find the pool
it belongs in order to do the query together.

Once there are millions of counters allocated, the pool array in the
counter container will become very large. In this case, the pool search
from the pool array will become extremely slow.

Save the minimum and maximum counter ID to have a quick check of current
counter ID range. And start searching the pool from the last pool in the
container will mostly get the needed pool since counter ID increases
sequentially.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-30 14:52:29 +02:00
Suanming Mou
632f0f1905 net/mlx5: manage shared counters in three-level table
Currently, to check if any shared counter with same ID existing, it will
have to loop the counter pools to search for the counter. Even add the
counter to the list will also not so helpful while there are thousands
of shared counters in the list.

Change Three-Level table to look up the counter index saved in the
relevant table entry will be more efficient.

This patch introduces the Three-level table to save the ID relevant
counter index in the table. Then the next while the same ID comes, just
check the table entry of this ID will get the counter index directly.
No search will be needed.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-30 14:52:29 +02:00
Suanming Mou
bd81eaebd9 net/mlx5: add three-level table utility
For the case which data is linked with sequence increased index, the
array table will be more efficient than hash table once need to search
one data entry in large numbers of entries. Since the traditional hash
tables has fixed table size, when huge numbers of data saved to the hash
table, it also comes lots of hash conflict.

But simple array table also has fixed size, allocates all the needed
memory at once will waste lots of memory. For the case don't know the
exactly number of entries will be impossible to allocate the array.

Then the multiple level table helps to balance the two disadvantages.
Allocate a global high level table with sub table entries at first,
the global table contains the sub table entries, and the sub table will
be allocated only once the corresponding index entry need to be saved.
e.g. for up to 32-bits index, three level table with 10-10-12 splitting,
with sequence increased index, the memory grows with every 4K entries.

The currently implementation introduces 10-10-12 32-bits splitting
Three-Level table to help the cases which have millions of entries to
save. The index entries can be addressed directly by the index, no
search will be needed.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-06-30 14:52:29 +02:00
David Marchand
63783b0172 net/mlx5: remove redundant newline from logs
The DRV_LOG macro already appends a newline.

Fixes: 46287eacc1 ("net/mlx5: introduce hash list")
Fixes: 860897d289 ("net/mlx5: reorganize flow tables with hash list")
Fixes: e484e40323 ("net/mlx5: optimize tag traversal with hash list")
Fixes: 6801116688 ("net/mlx5: fix multiple flow table hash list")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Xiaoyu Min <jackmin@mellanox.com>
2020-06-30 14:52:29 +02:00
Andrew Rybchenko
ff49ac69d4 net/sfc: reap Tx descriptors at least once
Improve cache hit and increase packet rate on benchmarks.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2020-06-30 14:52:29 +02:00
Matan Azrad
aec086c9f1 common/mlx5: share kernel interface name getter
Some configuration of the mlx5 port are done by the kernel net device
associated to the IB device represents the PCI device.

The DPDK mlx5 driver uses Linux system calls, for example ioctl, in
order to configure per port configurations requested by the DPDK user.

One of the basic knowledges required to access the correct kernel net
device is its name.

Move function to get interface name from IB device path to the common
library.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-06-30 14:52:29 +02:00
Qi Zhang
3990ea41c4 net/ice/base: replace RSS profile locks
Replacing flow profile locks with RSS profile locks in the function to
remove all RSS rules for a given VSI. This is to align the locks used
for RSS rule addition to VSI and removal during VSI teardown to avoid
a race condition owing to several iterations of the above operations.
In function to get RSS rules for given VSI and protocol header replacing
the pointer reference of the RSS entry with a copy of hash value to
ensure thread safety.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-30 14:52:29 +02:00
Qi Zhang
072158c652 net/ice/base: fix VSI ID mask to 10 bits
set_rss_lut failed due to incorrect vsi_id mask. vsi_id is 10 bit
but mask was 0x1FF whereas it should be 0x3FF.

For vsi_num >= 512, FW set_rss_lut has been failing with return code
EACCESS (vsi ownership issue) because software was providing
incorrect vsi_num (dropping 10th bit due to incorrect mask) for
set_rss_lut admin command

Fixes: a90fae1d07 ("net/ice/base: add admin queue structures and commands")
Cc: stable@dpdk.org

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-30 14:52:29 +02:00
Qi Zhang
1ffe6670e0 net/ice/base: choose TCP dummy packet by protocol
In order to find proper dummy packets for switch filter,
it need to check ipv4 next protocol number, if it is 0x06,
which means next payload is TCP, we need to use TCP
format dummy packet.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-30 14:52:29 +02:00
Qi Zhang
418d2563d1 net/ice/base: get tunnel type for recipe
This patch add support to get tunnel type of recipe
after get recipe from FW. This will fix the issue in
function ice_find_recp() for tunnel type comparing.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-30 14:52:29 +02:00
Qi Zhang
3c0b91c387 net/ice/base: support flow director for GTPU with outer IPv6
Add FDIR support for MAC_IPV6_GTPU type with outer IPv6 address, teid
and qfi fields matching.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-30 14:52:29 +02:00
Qi Zhang
efae14de50 net/ice/base: rename misleading variable
The grst_delay variable in ice_check_reset contains the maximum time
(in 100 msec units) that the driver will wait for a reset event to
transition to the Device Active state. The value is the sum of three
separate components:
1) The maximum time it may take for the firmware to process its
outstanding command before handling the reset request.
2) The value in RSTCTL.GRSTDEL (the delay firmware inserts between first
seeing the driver reset request and the actual hardware assertion).
3) The maximum expected reset processing time in hardware.

Referring to this total time as "grst_delay" is misleading and
potentially confusing to someone checking the code and cross-referencing
the hardware specification.

Fix this by renaming the variable to "grst_timeout", which is more
descriptive of its actual use.

Signed-off-by: Nick Nunley <nicholas.d.nunley@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-30 14:52:29 +02:00
Qi Zhang
e014cd42e9 net/ice/base: add commands for system diagnostic
System diagnostic solution extend the ability to fetch FW
internal status data and error indication.

Signed-off-by: Sharon Haroni <sharon.haroni@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-30 14:52:29 +02:00
Qi Zhang
c1bec172e8 net/ice/base: support flow director for outer IP of GTPU
Add outer IP address fields while generating the training packets for
GTPU, so that we can support FDIR based on outer IP of GTPU.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-30 14:52:29 +02:00
Qi Zhang
7621dd771c net/ice/base: refactor to avoid need to retry
The ice_discover_caps function is used to read the device and function
capabilities, updating the hardware capabilities structures with
relevant data.

The exact number of capabilities returned by the hardware is unknown
ahead of time. The AdminQ command will report the total number of
capabilities in the return buffer.

The current implementation involves requesting capabilities once,
reading this returned size, and then re-requested with that size.

This isn't really necessary. The firmware interface has a maximum size
of ICE_AQ_MAX_BUF_LEN. Firmware can never return more than
ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem) capabilities.

Avoid the retry loop by simply allocating a buffer of size
ICE_AQ_MAX_BUF_LEN. This is significantly simpler than retrying. The
extra allocation isn't a big deal, as it will be released after we
finish parsing the capabilities.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-30 14:52:29 +02:00
Qi Zhang
d6e0dca1d5 net/ice/base: adjust profile ID map locks
The profile id map lock should be held till the caller completes
all references of that profile entries.

The current code releases the lock right after the match search.
This caused a driver issue when the profile map entries were
referenced after it was freed in other thread after the lock was
released earlier.

Also return type of get/set profile functions were changed to
return the ice status instead of the profile entry pointer.
This will prevent the caller referencing the profile fields
outside the lock.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-06-30 14:52:29 +02:00
Thomas Monjalon
4f299b7169 build: replace meson OS detection with variable
Some places were calling the meson function host_machine.system()
instead of the variables is_windows and is_linux defined
in config/meson.build.

At the same time, the missing "Linux restriction" reason is added to
pfe and octeontx2 crypto PMDs.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-06-30 15:29:59 +02:00
Tal Shnaiderman
33031608e8 bus/pci: introduce Windows support with stubs
Addition of stub eal and bus/pci functions to compile
bus/pci for Windows.

Signed-off-by: Tal Shnaiderman <talshn@mellanox.com>
2020-06-30 00:02:54 +02:00
Karra Satwik
2e40fdc2d3 net/cxgbe: always enable HASH filter support
Disable all unused firmware resources during init time to give
more resources for HASH (exact-match) filter region and always
request firmware to enable HASH filter support when resources
are available.

Signed-off-by: Karra Satwik <kaara.satwik@chelsio.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
2020-06-17 20:12:35 +02:00
Ophir Munk
4f96d91396 net/mlx5/linux: add memory region callbacks to Verbs
Create a set of verbs callbacks in 'struct mlx5_verbs_ops'
and add MR operations to it (file net/mlx5/linux/mlx5_verbs.c).

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-17 16:32:01 +02:00
Ophir Munk
d5ed8aa944 net/mlx5: add memory region callbacks in per-device cache
Prior to this commit MR operations were verbs based and hard coded under
common/mlx5/linux directory. This commit enables upper layers (e.g.
net/mlx5) to determine which MR operations to use. For example the net
layer could set devx based MR operations in non-Linux environments. The
reg_mr and dereg_mr callbacks are added to the global per-device MR
cache 'struct mlx5_mr_share_cache'.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-06-17 16:32:01 +02:00
Rahul Lakkireddy
ff7079a3a8 net/cxgbe: ignore flow default masks for unrequested fields
commit 536db938a4 ("net/cxgbe: add devargs to control filtermode and
filtermask") allows configuring hardware to select specific combination
of header fields to match in the incoming packets. However, the default
mask is set for all fields in the requested pattern items, even if the
field is not explicitly set in the combination and results in
validation errors. To prevent this, ignore setting the default masks
for the unrequested fields and the hardware will also ignore them in
validation, accordingly. Also, tweak the filter spec before finalizing
the masks.

Fixes: 536db938a4 ("net/cxgbe: add devargs to control filtermode and filtermask")
Cc: stable@dpdk.org

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
2020-06-17 15:31:32 +02:00
Rahul Lakkireddy
7fe1d0b459 net/cxgbe: fix SMT leak in filter error and free path
Free up Source MAC Table (SMT) entry properly during filter create
failure and filter delete.

Fixes: 993541b2fa ("net/cxgbe: support flow API for source MAC rewrite")
Cc: stable@dpdk.org

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
2020-06-17 15:31:32 +02:00
Rahul Lakkireddy
be5f4d5ced net/cxgbe: fix double MPS alloc by flow validate and create
The Multi Port Switch (MPS) entry is allocated twice when both
flow validate and create are invoked, but only freed once during
flow destroy. Avoid double alloc by moving MPS entry allocation
closer to when the filter create request is sent to hardware and
will be ignored for filter validate request.

Fixes: fefee7a619 ("net/cxgbe: add flow ops to match based on dest MAC")
Cc: stable@dpdk.org

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
2020-06-17 15:31:32 +02:00
Rahul Lakkireddy
e0e1496be5 net/cxgbe: fix L2T leak in filter error and free path
Free up Layer 2 Table (L2T) entry properly during filter create
failure and filter delete.

Fixes: 1decc62b1c ("net/cxgbe: add flow operations to offload VLAN actions")
Cc: stable@dpdk.org

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
2020-06-17 15:31:32 +02:00