Commit Graph

705 Commits

Author SHA1 Message Date
Pavan Nikhilesh
2367e7e0cf event/cnxk: update event vector Tx routine
Update event vector transmit routine to honor elem_offset.
Use ``rte_event_vector::elem_offset`` to report partial
vector transmission to the application when there is not
enough space in the SQ.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-27 15:41:59 +02:00
Pavan Nikhilesh
a6d13f59e6 event/cnxk: disable timer resolution estimation
Disable timer resolution estimation, read TIM LF clock registers
to get the current running clock counter as estimating causes
time drift.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-27 12:56:38 +02:00
Pavan Nikhilesh
4b5ffa6a05 event/cnxk: set dequeue mode to prefetch with wait
Set default GetWork(dequeue) mode to prefetch with wait for
event.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-27 12:56:38 +02:00
Pavan Nikhilesh
e3c0049d16 event/cnxk: avoid reading non-cached registers
Avoid reading non-cached registers in fastpath.
PENDSTATE need not be read before tag flush in Tx enqueue
context as we have additional checks prior to check for
pending flushes.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-27 12:56:38 +02:00
Shijith Thotton
bd1cf51125 event/cnxk: remove option to limit XAQ
Removed support to limit XAQ from devargs. If XAQ is limited, new add
works could run out of XAQ entries and disable the queue.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2022-09-27 12:55:39 +02:00
Volodymyr Fialko
661aeb251c crypto/cnxk: add burst enqueue for event mode
Added support for burst enqueue for cn10k event crypto adapter.
Instructions will be grouped based on the queue pair and sent in a burst.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Pavan Nikhilesh
3fe71706ab event/cnxk: fix stale data in workslot
Fix stale XAQ depth check pointers in workslot memory after
XAQ pool resize.

Fixes: bd64a963d2 ("event/cnxk: use common XAQ pool functions")
Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-27 05:22:51 +02:00
Shijith Thotton
2f279a1b6e eventdev: add weight and affinity attributes to queue conf
Added new fields to represent event queue weight and affinity in
rte_event_queue_conf structure. Internal op to get queue attribute is
removed as it is no longer needed. Updated driver to use the new field.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-09-26 15:34:57 +02:00
Naga Harish K S V
3d9d8adf8c eventdev/timer: support periodic event timer
Add support to configure and use periodic event timers in
software timer adapter.

The structure ``rte_event_timer_adapter_stats`` is extended
by adding a new field, ``evtim_drop_count``. This stat
represents the number of times an event_timer expiry event
is dropped by the event timer adapter.

Updated the software eventdev pmd timer_adapter_caps_get
callback function to report the support of periodic
event timer capability.

Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
2022-09-26 15:33:48 +02:00
Rahul Bhansali
ffe6a6a109 event/cnxk: support reassembly functions
Add the support of reassembly functions callback
assignment to eventdev dequeue and dequeue_burst.

Fixes: c062f5726f ("net/cnxk: support IP reassembly")
Cc: stable@dpdk.org

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
2022-09-26 15:33:47 +02:00
Pavan Nikhilesh
1c47a13510 event/cnxk: add preliminary Tx queue depth check
Add preliminary Tx queue depth check and return on failure.
Once the check passes, tx_adapter_enqueue() function becomes
a blocking call till it succeeds.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-26 15:33:47 +02:00
Stephen Hemminger
ec70113a60 event/sw: fix device name in dump
The software eventdev PMD reports todo-fix-name as the
device name.

Fixes: c66baa68e4 ("event/sw: add dump function for easier debugging")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2022-09-26 15:33:46 +02:00
Mattias Rönnblom
70cb0278a4 event/dsw: fix flow migration
Fix bug in flow migration, which under certain conditions causes
reordering and violation of atomicity guarantees.

The issue occurs when the processing of a flow (on an atomic queue)
has resulted in events enqueued to a flow currently being migrated,
and the former (producer) flow is also selected for migration. The
events are buffered ("paused") on the originating port, and released
(forwarded) when the migration has completed. However, at the time of
"unpausing" the latter (consumer) flow, processing of the producer
flow on the port to which it was migrated may have already produced
events, for the same paused flow. This constitutes a race condition,
and depending on which port wins, reordering may have been introduced.

This patch forbids migration when a port has paused events, since
those events may have been the result of processing a to-be-migrated
flow.

This patch also disallows processing events pertaining to a flow under
migration, for the same reason. A new buffer is introduced, which
holds such not-yet-processed events dequeued from the port's input
ring. Such events are forwarded to the target port as a part of the
migration process.

The 'forwarding' migration state is eliminated, and instead background
processing is only performed if there are no unreleased events on the
port.

The bug is primarily triggered in situations where multiple flows are
migrated as one transaction, but may occur even if only a single flow
is migrated (e.g., with older DSW versions, which does not support
multi-flow migration).

Fixes: f6257b22e7 ("event/dsw: add load balancing")
Cc: stable@dpdk.org

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
2022-09-26 15:33:46 +02:00
Shijith Thotton
8d5387a99a event/cnxk: move crypto adapter to respective file
Moved the common crypto adapter ops to file specific to eventdev
adapters.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2022-09-26 15:33:44 +02:00
Vidya Sagar Velumuri
4440eb88dd net/cnxk: use full context IPsec structures
Use the Full context SA structures and command in IPsec fast path.
For inline outbound, populate CPT instruction as per full context.
Added new macros and functions with respect to full context.

Populate WQE ptr in CPT instruction with proper offset from mbuf.
Also add option to override outbound inline SA IV for debug
Update mbuf length based on IP version in Rx post process purposes
via environment variable.

User can set env variable as:
export ETH_SEC_IV_OVR="0x0, 0x0,..."

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:13 +02:00
Nithin Dabilpuram
780b9c8924 net/cnxk: support zero AURA for inline meta
Add support for zero aura for inline meta packets and register
callback to ROC to create meta pool via mempool. Also
add devargs to override meta buffer count and size.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:10 +02:00
Pavan Nikhilesh
1134d75881 cnxk/net: add FC check in vector event Tx path
Add FC check in vector event Tx path, the check needs to be
performed after head wait right before LMTST is issued.
Since, SQB pool FC updates are delayed w.r.t the actual
utilization of pool add sufficient slack to avoid overflow.

Added a new device argument to override the default SQB slack
configured, can be used as follows:

    -a 0002:02:00.0,sqb_slack=32

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-22 10:43:54 +02:00
Pavan Nikhilesh
f1cdb3c5b6 net/cnxk: enable PTP for event Rx adapter
Add support to enable PTP per ethernet device when that
specific ethernet device is connected to event device via
Rx adapter.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:43:53 +02:00
David Marchand
1acb7f5474 dev: hide driver object
Make rte_driver opaque for non internal users.
This will make extending this object possible without breaking the ABI.

Introduce a new driver header and move rte_driver definition.
Update drivers and library to use the internal header.

Some applications may have been dereferencing rte_driver objects, mark
this object's accessors as stable.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
2022-09-23 16:14:34 +02:00
David Marchand
4851ef2b40 bus/vdev: make driver-only headers private
The vdev bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.

While at it, cleanup the code:
- fix indentation,
- remove unneeded reference to bus specific singleton object,
- remove unneeded list head structure type,
- reorder the definitions and macro manipulating the bus singleton object,
- remove inclusion of rte_bus.h and fix the code that relied on implicit
  inclusion,

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2022-09-23 16:14:34 +02:00
David Marchand
1f37cb2bb4 bus/pci: make driver-only headers private
The pci bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.

While at it, cleanup the code:
- fix indentation,
- remove unneeded reference to bus specific singleton object,
- remove unneeded list head structure type,
- reorder the definitions and macro manipulating the bus singleton object,
- remove inclusion of rte_bus.h and fix the code that relied on implicit
  inclusion,

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2022-09-23 16:14:34 +02:00
David Marchand
b4f22ca5cb bus/fslmc: make driver-only headers private
The fslmc bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.

While at it, cleanup internal structures:
- remove unneeded reference to bus specific singleton object,
- remove unneeded list head structure type,
- reorder the definitions and macro manipulating the bus singleton object,
- remove inclusion of rte_bus.h and update code that relied on it,

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2022-09-23 16:14:34 +02:00
David Marchand
a2f1da7da8 bus/dpaa: make driver-only headers private
The dpaa bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.

While at it, cleanup internal structures:
- remove unneeded reference to bus specific singleton object,
- remove unneeded list head structure type,
- reorder the definitions and macro manipulating the bus singleton object,
- remove inclusion of rte_bus.h and update code that relied on it,

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2022-09-23 16:14:34 +02:00
Dmitry Kozlyuk
72b452c5f2 eal: remove unneeded includes from a public header
Do not include <ctype.h>, <errno.h>, and <stdlib.h> from <rte_common.h>,
because they are not used by this file.
Include the needed headers directly from the files that need them.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2022-09-21 15:31:03 +02:00
David Marchand
72206323a5 version: 22.11-rc0
Start a new release cycle with empty release notes.

The ABI version becomes 23.0.
The map files are updated to the new ABI major number (23).
The ABI exceptions are dropped and CI ABI checks are disabled because
compatibility is not preserved.
Special handling of removed drivers is also dropped in check-abi.sh and
a note has been added in libabigail.abignore as a reminder.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2022-07-21 12:13:48 +02:00
Timothy McDaniel
0b807b526f event/dlb2: improve CQ weight error messages
This commit changes 2 error messages to better
describe cq_weight related errors, should one occur.

Fixes: ffa46fc4a2 ("event/dlb2: support CQ weight")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-07-11 22:29:39 +02:00
Timothy McDaniel
d0e3744b01 event/dlb2: fix CQ weight array overflow
The cq_weight array must be sized for the maximum number
of eventdev ports, not the maximum number of DLB2
load balanced ports.

This commit fixes the above array sizing bug and resultant
coverity warning.

Coverity issue: 379234
Fixes: ffa46fc4a2 ("event/dlb2: support CQ weight")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-07-11 22:29:27 +02:00
Timothy McDaniel
5408915170 event/dlb2: fix port COS initialization
Fix cos initialization, handling the default case too.

Substitute the semicolon for the comma
that was expected in the cos_bw command line override.
Commas are not allowed within a multi field option.
The new format is cos_bw=%d:%d:%d:%d, where the sum of
the 4 decimal values must be less than or equal to 100.

Corrected probe-time initialization order.

Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-07-04 18:04:52 +02:00
Timothy McDaniel
0fc71ad881 event/dlb2: fix CQ depth override credit deadlock
This commit fixes a bug, where we could encounter a credit
deadlock due to changing the CQ depth. To remedy this situation,
the commit reduces the maximum CQ depth from 1024 to 128,
and also allows configuring the maximum enqueue depth. Maximum
enqueue depth must be tuned to the CQ depth, if the CQ depth
is increased.

Fixes: 86fe66d456 ("event/dlb2: allow CQ depths up to 1024")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-07-04 18:04:52 +02:00
Timothy McDaniel
c73697024e event/dlb2: fix CQ depth override
This commit fixes a bug, where we could assign a CQ depth
of zero, leading to a subsequent divide-by-zero fault.
It also fixes an issue where the original default CQ depth
was returned on a query, instead of the overridden value.

Fixes: 86fe66d456 ("event/dlb2: allow CQ depths up to 1024")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-07-04 18:04:52 +02:00
Timothy McDaniel
1084c88c51 event/dlb2: fix initialization of COS bandwidth args
This commit fixes a typo and resultant bug that triggered a
coverity warning.

Coverity issue: 4607286
Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-07-04 18:04:52 +02:00
Timothy McDaniel
897e2aab03 event/dlb2: fix array overflow
This commit fixes a segfault that resulted from reading
beyond the end of the port_cos array. The root cause was using
the DLB num ports define instead of the eventdev num ports define.

Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-07-04 18:04:52 +02:00
Stephen Hemminger
64e14b8b07 remove unnecessary null checks
Found by nullfree.cocci.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
[David: for lpm parts:]
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
[David: for vdpa/mlx5 parts:]
Acked-by: Matan Azrad <matan@nvidia.com>
[David: for dma/dpaa2, raw/ifpga, vdpa/mlx5:]
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
[David: reran cocci.sh and updated common/mlx5 and cryptodev asym test]
Signed-off-by: David Marchand <david.marchand@redhat.com>
2022-06-24 14:51:09 +02:00
Sunil Kumar Kori
174f2f3512 common/cnxk: add PFC support for VF
Current PFC implementation does not support VFs.
This patch enables PFC on VFs too.

Also fix the config of aura.bp to be based on number
of buffers(aura.limit) and corresponding shift
value(aura.shift).

Fixes: cb4bfd6e7b ("event/cnxk: support Rx adapter")
Cc: stable@dpdk.org

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2022-06-20 19:15:17 +02:00
Nithin Dabilpuram
75315881c2 common/cnxk: use computed value for WQE skip
Use computed value for WQE skip instead of a hard-coded value.
WQE skip needs to be number of 128B lines to accommodate rte_mbuf.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-06-20 19:15:15 +02:00
Harman Kalra
d41b53c5be common/cnxk: support CNF10KB SoC
Support for CNF10KB SoC by adding its PCI device ID.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-06-17 14:18:33 +02:00
Volodymyr Fialko
7e9a9600de event/cnxk: initialize work slot read cache
Initialize gw_rdata with tag type EMPTY. Leaving tag type as
zero(ATOMIC) may cause some unnecessary head wait, if cache will be used
before the first update in dequeue/get_work functions.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
2022-06-20 21:00:40 +02:00
Timothy McDaniel
bec8901bfe event/dlb2: support ldb port specific COS
DLB supports 4 class of service domains, to aid in managing the
device bandwidth across ldb ports. This commit allows specifying
which ldb ports will participate in the COS scheme, which class
they are a part of, and the specific bandwidth percentage
associated with each class. The cumulative bandwidth associated
with the 4 classes must not exceed 100%. This feature is enabled
on the command line, and will be documented in the DLB2 programmers
guide.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-06-20 19:32:02 +02:00
Timothy McDaniel
ffa46fc4a2 event/dlb2: support CQ weight
Enabling the weight limit on a CQ allows the enqueued QEs' 2-bit weight
value (representing weights of 1, 2, 4, and 8) to factor into whether a
CQ is full. If the sum of the weights of the QEs in the CQ meet or exceed
its weight limit, DLB will stop scheduling QEs to it (until software pops
enough QEs from the CQ to reverse that).

CQ weight support is enabled via the command line, and applies to
DLB 2.5 (and above) load balanced ports. The DLB2 documentation will
be updated with further details.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-06-20 19:32:02 +02:00
Timothy McDaniel
d0ce87e41c event/dlb2: support single 512B write of 4 QEs
On Xeon, 512b accesses are available, so movdir64 instruction is able to
perform 512b read and write to DLB producer port. In order for movdir64
to be able to pull its data from store buffers (store-buffer-forwarding)
(before actual write), data should be in single 512b write format.
This commit add change when code is built for Xeon with 512b AVX support
to make single 512b write of all 4 QEs instead of 4x64b writes.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Acked-by: Kent Wires <kent.wires@intel.com>
2022-06-20 19:32:02 +02:00
Timothy McDaniel
d39e23f26e event/dlb2: fix advertized capabilities
This commit corrects the advertized capabilities reported by the DLB2 PMD.

Previously DLB2 reported supporting RTE_EVENT_DEV_CAP_QUEUE_QOS, but the
DLB2 hardware does not support such capability. This commit removes that
feature from the reported capabilities feature set.

Additionally, two capabilities that DLB2 does support were not being
reported in the capabilities feature set. This commit adds those.

RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT = Event device is capable of
setting up the link between multiple queues and a single port. If the
flag is not set, the eventdev can only map a single queue to each
port or map a single queue to many port

RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK = Event device is capable of
configuring the queue/port link at runtime. If the flag is not set,
the eventdev queue/port link is only can be configured during
initialization

Finally, the file doc/guides/eventdevs/features/dlb2.ini has been updated
to match the capabilities actually reported by the PMD.

Fixes: e7c9971a85 ("event/dlb2: add probe-time hardware init")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-06-14 11:21:52 +02:00
Volodymyr Fialko
6a24c7c4bc event/cnxk: add Tx adapter freeing
Tx adapter allocate data during eth_tx_adapter_queue_add() call and
it's only cleaned but not freed during eth_tx_adapter_queue_del().
Implemented eth_tx_adapter_free() callback to free adapter data.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
2022-06-13 08:00:09 +02:00
Pavan Nikhilesh
7344c7db5d event/cnxk: fix Tx adapter enqueue return for CN10K
The `rte_event_eth_tx_adapter_enqueue()` function expects driver layer
to return the total number of events successfully transmitted.
Fix cn10k driver returning the number of packets transmitted in a
event vector instead of number of events.

Fixes: 761a321acf ("event/cnxk: support vectorized Tx event fast path")
Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-06-13 07:58:21 +02:00
Shijith Thotton
448e2400fa event/cnxk: fix QoS parameter handling
Fixed QoS parameters getting over written and IAQ/TAQ threshold
calculation.

Fixes: 910da32c53 ("event/cnxk: add device start")
Cc: stable@dpdk.org

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2022-06-13 07:58:17 +02:00
Timothy McDaniel
7767b849ab event/dlb2: fix check of QID in-flight
If QID inflights is set to an invalid value, it can cause the
PMD to hang.  This commit adds checks to make sure that the
value is valid before programming the hardware.

Fixes: 1857f1922c ("event/dlb2: use new implementation of resource file")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-06-09 19:56:32 +02:00
Timothy McDaniel
82a710bccb event/dlb2: rework queue drain handling
Previously, anything that prevented the CQs from being drained
would hang the PMD for an unacceptably long time. This commit updates
the drain logic to be resource and time based, thus eliminating
the potential for a long hang when draining the queues in preparation
for a reset.

Fixes: 1857f1922c ("event/dlb2: use new implementation of resource file")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-06-09 19:27:15 +02:00
Timothy McDaniel
87ecdd9e7f event/dlb2: improve enqueue efficiency
If user tried to send 64 events, it will take 64 credits. Enqueue API
only gets 32 credits each time. If it does not have sufficient credits,
it just fails and returns. Enqueue API does not retry. On next enqueue,
it will get 32 more and send will work. This results in alternate
enqueues failing.

Add check to make sure DLB2_MAX_ENQUEUE_DEPTH <=
both DLB2_SW_CREDIT_QUANTA_DEFAULT and DLB2_SW_CREDIT_BATCH_SZ.

Add enough retires in the driver to satisfy max enqueue depth credits
based on set quanta. Note the credit quanta size is different for each
port. Retry count = Max enqueue depth / credit quanta in driver before
returning no credit.

Fixes: 3a6d0c04e7 ("event/dlb2: add port setup")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2022-06-09 18:30:48 +02:00
Harman Kalra
d430b921a4 event/octeontx: fix SSO fast path
Segmentation fault is observed as soon as any  application
with ethdev event is launched as ev->mbuf was not set properly.

Fixing sub event type violation as in OCTEONTX event device
sub_event_type is used to store the ethernet port identifier
when work is received from OCTEONTX ethernet device. This violates
the event device spec as sub_event_type should be 0 in the initial
receive stage. Setting sub_event_type to 0 after copying the port id
in single workslot mode.

Fixes: 44a2cebbd4 ("crypto/octeontx: add crypto adapter data path")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-06-09 17:49:55 +02:00
Anoob Joseph
53668249c5 crypto/cnxk: add CPT hardware flow control checks
Add hardware supported flow control checks before enqueueing to CPT.
Since both poll mode and event mode can be used at the same time, add
hardware flow control checks to make sure s/w doesn't over submit to
hardware queues. For cn9k, queue depth usage is not high and so FC check
is omitted for poll mode.

To allow for more accurate updates, flow control hardware setting is
updated to give an update per 32 packets. In case of crypto adapter,
multiple cores can enqueue to the same CPT LF at the same time. To
allow such a case, flow control threshold is updated when the adapter
is configured.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-06-21 20:04:50 +02:00
Tomasz Duszynski
b38db1bfb9 common/cnxk: allow building for generic arm64
Allow building generic arm64 target using config/arm/arm64_armv8_linux_*
config which works on both cn9k and cn10k by relaxing cache line size
requirements a bit.

While at it move cache line checks to common place.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-06-07 20:49:20 +02:00