Commit Graph

76 Commits

Author SHA1 Message Date
Fan Zhang
a0e805ee08 crypto/scheduler: add more options
This patch adds initial mode and ordering enable/disable EAL
options to cryptodev scheduler PMD.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-04-06 00:17:44 +02:00
Fiona Trahe
259310f3a9 crypto/qat: support device D15xx
Add support for Intel QuickAssist Technology device D15xx

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-04-06 00:17:44 +02:00
Fiona Trahe
f546c1ed0b doc: restructure QAT guide
Restructure QAT PMD instructions and add a device table to
minimise duplication for each device and make it easier to add devices.
Fix some device name typos and poor formatting.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-04-06 00:17:44 +02:00
Arek Kusztal
d9b7d5bbc8 crypto/qat: add ZUC EEA3/EIA3 capability
This commit adds ZUC EEA3 cipher and ZUC EIA3 MAC capability
to Intel(R) QuickAssist Technology driver

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-04-06 00:17:44 +02:00
Fiona Trahe
d18ab45f76 crypto/qat: support DOCSIS BPI mode
DOCSIS BPI mode is handled in the QAT PMD by sending full blocks to the
hardware device for encryption and using OpenSSL libcrypto for pre- or
post-processing of any partial blocks.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2017-04-06 00:17:44 +02:00
Pablo de Lara
1dee7bc7f2 crypto/openssl: support DES DOCSIS BPI
Adds support in OpenSSL PMD for algorithm following the DOCSIS
specification, which combines DES-CBC for full DES blocks (8 bytes)
and DES-CFB for last runt block (less than 8 bytes).

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Tested-by: Yang Gang <gangx.yang@intel.com>
2017-04-06 00:17:44 +02:00
Pablo de Lara
c1296f67b0 crypto/aesni_mb: support AES DOCSIS BPI
Underlying IPSec Multi buffer library implements
DOCSIS specification, so this commit adds support
for this new feature, which combines AES-CBC for full
AES blocks (16 bytes) and AES-CFB for last runt block
(less than 16 bytes).

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-04-06 00:17:44 +02:00
Pablo de Lara
1cdeb1c512 crypto/aesni_mb: support IPSec Multi-buffer lib v0.45
IPSec Multi-buffer library v0.45 has been released,
which includes, among other features, support for DOCSIS BPI
specification and include AVX512 optimizations.

This new version added const qualifiers to some of the function
prototypes, so the PMD has been updated to include these changes.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-04-06 00:17:44 +02:00
Fan Zhang
37f075dad1 crypto/scheduler: add fail-over scheduling mode
Fail-over mode works with 2 slaves, primary slave and secondary slave.
In this mode, the scheduler will enqueue the incoming crypto op burst
to the primary slave. When one or more crypto ops are failed to be
enqueued, they then will be enqueued to the secondary slave.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-04-06 00:17:44 +02:00
Fan Zhang
a783aa6344 crypto/scheduler: add packet size based mode
Packet-size based distribution mode is a scheduling mode works with 2
slaves, primary slave and secondary slave, and distribute the enqueued
crypto ops to them based on their data lengths. A crypto op will be
distributed to the primary slave if its data length equals or bigger
than the designated threshold, otherwise it will be handled by the
secondary slave.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-04-06 00:17:44 +02:00
Pablo de Lara
807418f263 doc: reformat crypto drivers overview
Follow the approach in the network devices overview,
for the feature matrix, so it improves readibility
and maintainability.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-04-06 00:17:44 +02:00
Pablo de Lara
5d0bd2b31b doc: add missing supported crypto algos
AESNI MB supports MD5 and AES XCBC, but it wasn't reflected
in the driver documentation.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-04-06 00:17:44 +02:00
Keith Wiles
35b09d76f8 doc: use corelist instead of coremask
The coremask option in DPDK is difficult to use and we should be
promoting the use of the corelist (-l) option. The patch
adjusts the docs to use -l EAL option instead of the -c option.

The patch only changes the docs and not the code as the -c option
will continue to exist unless it is removed in the future. The -c
option should be kept to maintain backward compatibility.

Signed-off-by: Keith Wiles <keith.wiles@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-03-01 20:39:58 +01:00
Pablo de Lara
6b72aad61f doc: clarify multi-buffer crypto library version support
AES-NI MB PMD uses external Multi-Buffer library,
which is hosted in github, but the version was not specified
in the documentation.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2017-02-10 16:06:06 +01:00
Fan Zhang
d58a3f3125 crypto/scheduler: add documentation
Adds the description of the cryptodev scheduler PMD overview,
limitations, build, instructions, modes, etc.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-30 17:46:36 +01:00
Zbigniew Bodek
54c7fdba7c crypto/armv8: add documentation
Add documentation about the driver and update
release notes.

Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-01-19 01:00:55 +01:00
Zbigniew Bodek
c2fec02245 cryptodev: introduce ARM-specific feature flags
Add two new feature flags:
* RTE_CRYPTODEV_FF_CPU_NEON
  represents ARM NEON (TM) instructions
* RTE_CRYPTODEV_FF_CPU_ARM_CE
  represents ARM crypto extensions

Add them to both cryptodev library, documentation and relevant
PMD driver for ARMv8.

Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>
2017-01-19 01:00:55 +01:00
Pablo de Lara
da696d5663 doc: add ZUC to crypto matrices
When ZUC PMD was added, it was not added in the
Crypto Device Supported Functionality Matrices.
This commit adds a column in all the matrices, plus
the ZUC EEA3/EIA3 algorithms.

Fixes: cf7685d68f ("crypto/zuc: add driver for ZUC library")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-18 21:49:54 +01:00
Piotr Azarewicz
9c2a5775c0 crypto/aesni_gcm: migrate from MB library to ISA-L
Current Cryptodev AES-NI GCM PMD is implemented using Multi Buffer
Crypto library.This patch reimplement the device using ISA-L Crypto
library: https://github.com/01org/isa-l_crypto.

The migration entailed the following additional support for:
  * GMAC algorithm.
  * 256-bit cipher key.
  * Session-less mode.
  * Out-of place processing
  * Scatter-gatter support for chained mbufs (only out-of place and
    destination mbuf must be contiguous)

Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:49:54 +01:00
Tomasz Kulasek
8f675fc72d crypto/openssl: support scatter-gather
Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Daniel Mrzyglod
ce74457449 crypto/openssl: fix indentation in guide
The code section was lacking indentation to be be correctly formatted.

Fixes: d61f70b4c9 ("crypto/libcrypto: add driver for OpenSSL library")

Signed-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-18 21:48:56 +01:00
Declan Doherty
84d7965866 crypto/aesni_mb: support AVX512
Release v0.44 of Intel(R) Multi-Buffer Crypto for IPsec library adds
support for AVX512 instructions. This patch enables the new AVX512
accelerated functions from the aesni_mb_pmd crypto poll mode driver.

This patch set requires that the aesni_mb_pmd is linked against the
version 0.44 or greater of the Multi-Buffer Crypto for IPsec library.

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-18 21:48:56 +01:00
Pablo de Lara
a5bc0375b7 crypto/aesni_mb: add missing supported algos in guide
AESNI MB PMD supports SHA224-HMAC and SHA384-HMAC,
but the documentation was not updated with this.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-01-18 21:48:56 +01:00
Pablo de Lara
8772c3f713 crypto/aesni_mb: add single operation functionality
Update driver to use new AESNI Multibuffer IPSec library single
operation functionality (cipher only and authentication only).
This patch also adds tests for this new feature.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Pablo de Lara
21c0a80e11 crypto/aesni_mb: update dependency in guide
The Intel(R) Multi Buffer Crypto library used in the AESNI MB PMD
has been moved to a new repository, in github.
This patch updates the link where it can be downloaded.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-01-18 21:47:56 +01:00
Arek Kusztal
e09231eaa2 crypto/qat: add SGL capability
This commit adds scatter-gather list capability to Intel QuickAssist
Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18 21:47:04 +01:00
Arek Kusztal
6cd8b4d8ba crypto/qat: add DES capability
This commit adds DES capability to Intel QuickAssist
Technology Driver

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18 21:46:08 +01:00
Fiona Trahe
aa8128b1d8 app/test: check AES cipher-only on QAT
Extended functional AES-CBC and AES-CTR cipher-only
tests to run on QAT PMD.
Added AES_CBC cipher-only performance tests on QAT PMD.
No driver changes, but as now tested, QAT documentation
is updated to remove constraint.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2017-01-18 21:45:15 +01:00
Thomas Monjalon
c6dab2a873 tools: move to usertools
Rename tools/ into usertools/ to differentiate from buildtools/
and devtools/ while making clear these scripts are part of
DPDK runtime.

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Tested-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-01-04 21:17:32 +01:00
Fiona Trahe
a49342abbb doc: add VT-d/iommu settings for QAT
Add more information about VT-d/iommu settings for QAT PMD.
Remove limitation indicating QAT driver is not performance tuned.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2016-11-07 22:03:18 +01:00
Slawomir Mrozowicz
8a9867a635 crypto/openssl: rename libcrypto to openssl
This patch replaces name "libcrypto" to "openssl" from file directories,
symbol prefixes and sub-names connected with old name.
Renamed poll mode driver files, test files, and documentations.
It is done to better name association with library because
the cryptography operations are using Openssl library crypto API.

Fixes: d61f70b4c9 ("crypto/libcrypto: add driver for OpenSSL library")

Signed-off-by: Slawomir Mrozowicz <slawomirx.mrozowicz@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-26 14:58:37 +02:00
Pablo de Lara
7174c0cea3 doc: fix libcrypto guide title
Libcrypto documentation was missing the equal signs ("="),
in its title, so it was not present in the documentation
generated.

Fixes: d61f70b4c9 ("crypto/libcrypto: add driver for OpenSSL library")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-10-13 21:58:44 +02:00
Pablo de Lara
ae688ed898 doc: how to build KASUMI as shared library
Libsso KASUMI library has to be built with specific
parameters to make the KASUMI PMD be built as
a shared library, so a note has been added in
its documentation.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-10-13 21:58:44 +02:00
Pablo de Lara
19ed332630 doc: add ZUC shared library limitation
ZUC PMD cannot be built as a shared library, due to
the fact that some assembly code in the underlying libsso
library is not relocatable.
This will be fixed in the future, but for the moment,
it is added as a limitationof the PMD.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-10-13 21:58:44 +02:00
Pablo de Lara
5861531853 doc: fix typo in SNOW 3G guide
Fixes: 1d0c90e6cf ("doc: update build instructions for libsso_snow3g")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2016-10-08 17:54:38 +02:00
Slawomir Mrozowicz
d61f70b4c9 crypto/libcrypto: add driver for OpenSSL library
This code provides the initial implementation of the libcrypto
poll mode driver. All cryptography operations are using Openssl
library crypto API. Each algorithm uses EVP_ interface from
openssl API - which is recommended by Openssl maintainers.

This patch adds libcrypto poll mode driver support to librte_cryptodev
library.

Signed-off-by: Slawomir Mrozowicz <slawomirx.mrozowicz@intel.com>
Signed-off-by: Michal Kobylinski <michalx.kobylinski@intel.com>
Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Signed-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-10-08 17:54:37 +02:00
Pablo de Lara
cf7685d68f crypto/zuc: add driver for ZUC library
Added new SW PMD which makes use of the libsso SW library,
which provides wireless algorithms ZUC EEA3 and EIA3
in software.

This PMD supports cipher-only, hash-only and chained operations
("cipher then hash" and "hash then cipher") of the following
algorithms:
- RTE_CRYPTO_SYM_CIPHER_ZUC_EEA3
- RTE_CRYPTO_SYM_AUTH_ZUC_EIA3

The ZUC hash and cipher algorithms, which are enabled
by this crypto PMD are implemented by Intel's libsso software
library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-08 17:53:10 +02:00
Fiona Trahe
e1b7f509e6 crypto/qat: add 3DES cipher algorithm
3DES support added to QuickAssist PMD with CTR and CBC mode.
Both cipher-only and chained with HMAC_SHAx.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Eoin Breen
cb4a1d14bf tools: bind crypto devices
Adding the support to bind/unbind crypto devices with
dpdk-devbind.py script, as now it is not restricted
to network devices anymore.

Signed-off-by: Eoin Breen <eoin.breen@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Pablo de Lara
6aef763816 crypto: rename some SNOW 3G references
SNOW 3G algorithm has all uppercase letters in its name
and a space between SNOW and 3G, but some references of it
had some lowercase letters or no space.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
2fa64f840d crypto/qat: add GMAC capability
Added Galois Message Authentication Code (GMAC) capability to
QuickAssist Technology symmetric cryptographic driver.
GMAC is authentication only variant of Galois Counter Mode (GCM)
where all plaintext is provided with AAD pointer only.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
f2f639c6e0 crypto/qat: add C3xxx device
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
ae20c0735c crypto/qat: add C62x device
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
d4f2745300 crypto/qat: add KASUMI
This patch add kasumi support in Intel(R)
QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
fddf380404 doc: fix names of supported crypto algorithms
Update documentation with correct names of supported algorithms.

Fixes: 1703e94ac5 ("qat: add driver for QuickAssist devices")
Fixes: 3aafc423cf ("snow3g: add driver for SNOW 3G library")
Fixes: 924e84f873 ("aesni_mb: add driver for multi buffer based crypto")
Fixes: 2773c86d06 ("crypto/kasumi: add driver for KASUMI library")

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Eoin Breen
d6740135f0 doc: add instructions to enable qat
Signed-off-by: Eoin Breen <eoin.breen@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
db0e952a5c crypto/qat: add NULL capability
Enabled NULL crypto for Intel(R) QuickAssist Technology.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
d905ee32d0 crypto/qat: add aes-sha384-hmac capability
Enable support of aes-sha384-hmac in Intel(R) QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
ebdbe12fbf crypto/qat: add aes-sha224-hmac capability
Added support of aes-sha224-hmac in Intel(R) QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
61ec518162 crypto/qat: add MD5 HMAC capability
Added posibility to compute MD5 HMAC digest with Intel QuickAssist
Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00