Commit Graph

107 Commits

Author SHA1 Message Date
Piotr Azarewicz
9c2a5775c0 crypto/aesni_gcm: migrate from MB library to ISA-L
Current Cryptodev AES-NI GCM PMD is implemented using Multi Buffer
Crypto library.This patch reimplement the device using ISA-L Crypto
library: https://github.com/01org/isa-l_crypto.

The migration entailed the following additional support for:
  * GMAC algorithm.
  * 256-bit cipher key.
  * Session-less mode.
  * Out-of place processing
  * Scatter-gatter support for chained mbufs (only out-of place and
    destination mbuf must be contiguous)

Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:49:54 +01:00
Fan Zhang
d803b4439d cryptodev: add user defined name for vdev
This patch adds a user defined name initializing parameter to cryptodev
library.

Originally, for software cryptodev PMD, the vdev name parameter is
treated as the driver identifier, and will create an unique name for each
device automatically, which is not necessarily as same as the vdev
parameter.

This patch allows the user to either create a unique name for his software
cryptodev, or by default, let the system creates a unique one. This should
help the user managing the created cryptodevs easily.

Examples:
CLI command fragment 1: --vdev "crypto_aesni_gcm_pmd"
The above command will result in creating a AESNI-GCM PMD with name of
"crypto_aesni_gcm_X", where postfix X is the number assigned by the system,
starting from 0. This fragment can be placed in the same CLI command
multiple times, resulting the postfixs incremented by one for each new
device.

CLI command fragment 2: --vdev "crypto_aesni_gcm_pmd,name=gcm1"
The above command will result in creating a AESNI-GCM PMD with name of
"gcm1". This fragment can be placed in the same CLI command multiple
times, as long as each having a unique name value.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Arek Kusztal
50256b7f00 crypto/qat: add scatter gather to feature flags
This commit adds scatter gather option to Intel(R) QuickAssist
Technology driver feature flags.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18 21:48:56 +01:00
Tomasz Kulasek
8f675fc72d crypto/openssl: support scatter-gather
Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Tomasz Kulasek
2d03ec6abd crypto: support scatter-gather in software drivers
This patch introduces RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER feature flag
informing that selected crypto device supports segmented mbufs natively
and doesn't need to be coalesced before crypto operation.

While using segmented buffers in crypto devices may have unpredictable
results, for PMDs which doesn't support it natively, additional check is
made for debug compilation.

Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Piotr Azarewicz
5d63ef31d8 crypto/openssl: remove unneeded check
EVP_CIPHER_CTX_set_padding() function always returns 1, so the check is
unneeded.

Fixes: d61f70b4c9 ("crypto/libcrypto: add driver for OpenSSL library")

Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Tested-by: Zhaoyan Chen <zhaoyan.chen@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Arek Kusztal
d19db9f912 crypto/qat: fix IV size in capabilities
This patch sets iv size in qat PMD to 12 bytes to be
conformant with nist SP800-38D.

Fixes: 26c2e4ad5a ("cryptodev: add capabilities discovery")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18 21:48:56 +01:00
Arek Kusztal
39dc49db37 crypto/aesni_gcm: fix IV size in capabilities
This patch sets iv size in aesni gcm PMD to 12 bytes to be
conformant with nist SP800-38D.

Fixes: eec136f3c5 ("aesni_gcm: add driver for AES-GCM crypto operations")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
2017-01-18 21:48:56 +01:00
Arek Kusztal
b9719b996a crypto/aesni_gcm: fix J0 padding bytes
This commit fixes pre-counter block (J0) padding by clearing
four most significant bytes before setting initial counter value.

Fixes: b2bb359747 ("crypto/aesni_gcm: move pre-counter block to driver")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
2017-01-18 21:48:56 +01:00
Declan Doherty
84d7965866 crypto/aesni_mb: support AVX512
Release v0.44 of Intel(R) Multi-Buffer Crypto for IPsec library adds
support for AVX512 instructions. This patch enables the new AVX512
accelerated functions from the aesni_mb_pmd crypto poll mode driver.

This patch set requires that the aesni_mb_pmd is linked against the
version 0.44 or greater of the Multi-Buffer Crypto for IPsec library.

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-18 21:48:56 +01:00
Pablo de Lara
8772c3f713 crypto/aesni_mb: add single operation functionality
Update driver to use new AESNI Multibuffer IPSec library single
operation functionality (cipher only and authentication only).
This patch also adds tests for this new feature.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Pablo de Lara
3413354ea1 crypto/aesni_mb: fix incorrect crypto session
When using sessionless crypto operations, crypto session
is obtained from a pool of sessions, when processing the
operation. Once the operation is processed, the session
is put back in the pool, but for the AESNI MB PMD, this
session was not being saved in the operation and therefore,
it did not return to the session pool.

Fixes: 924e84f873 ("aesni_mb: add driver for multi buffer based crypto")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:47:04 +01:00
Arek Kusztal
e09231eaa2 crypto/qat: add SGL capability
This commit adds scatter-gather list capability to Intel QuickAssist
Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18 21:47:04 +01:00
Arek Kusztal
6cd8b4d8ba crypto/qat: add DES capability
This commit adds DES capability to Intel QuickAssist
Technology Driver

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18 21:46:08 +01:00
Piotr Azarewicz
6b283a0321 crypto/openssl: fix extra bytes written at end of data
Extra bytes are being written at end of data while process standard
openssl cipher encryption. This behaviour is unexpected.

This patch disable the padding feature in openssl library, which is
causing the problem.

Fixes: d61f70b4c9 ("crypto/libcrypto: add driver for OpenSSL library")

Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-18 21:45:15 +01:00
Fiona Trahe
96ec5f9045 crypto/qat: fix buffer overwrite in OOP case
In out-of-place operation, data is DMAed from source mbuf
to destination mbuf. To avoid header data in dest mbuf being
overwritten, the minimal data-set should be DMAed.

Fixes: 39e0bee48e ("crypto/qat: rework request builder for performance")

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: John Griffin <john.griffin@intel.com>
2017-01-18 21:45:15 +01:00
Fiona Trahe
50d7f314de cryptodev: remove unused digest-appended feature
The cryptodev API had specified that if the digest address field was
left empty on an authentication operation, then the PMD would assume
the digest was appended to the source or destination data.
This case was not handled at all by most PMDs and incorrectly handled
by the QAT PMD.
As no bugs were raised, it is assumed to be not needed, so this patch
removes it, rather than add handling for the case on all PMDs.
The digest can still be appended to the data, but its
address must now be provided in the op.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: John Griffin <john.griffin@intel.com>
2017-01-18 21:45:15 +01:00
Santosh Shukla
b1cbca1e7f crypto/qat: use I/O device memory read/write API
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix portability
issues across different architectures.

CC: John Griffin <john.griffin@intel.com>
CC: Fiona Trahe <fiona.trahe@intel.com>
CC: Deepak Kumar Jain <deepak.k.jain@intel.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-01-18 17:18:27 +01:00
Fiona Trahe
39e0bee48e crypto/qat: rework request builder for performance
QAT PMD adjusts the buffer start address and offsets passed
to the device so that the DMAs in and out of the device are
64-byte aligned.
This gives more consistent throughput, which had been
variable depending on how the application set up the mbuf.
The message builder code had to be considerably re-factored
to do this efficiently.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-26 14:58:37 +02:00
Slawomir Mrozowicz
8a9867a635 crypto/openssl: rename libcrypto to openssl
This patch replaces name "libcrypto" to "openssl" from file directories,
symbol prefixes and sub-names connected with old name.
Renamed poll mode driver files, test files, and documentations.
It is done to better name association with library because
the cryptography operations are using Openssl library crypto API.

Fixes: d61f70b4c9 ("crypto/libcrypto: add driver for OpenSSL library")

Signed-off-by: Slawomir Mrozowicz <slawomirx.mrozowicz@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-26 14:58:37 +02:00
Jan Blunck
479c4af301 crypto: register aliases for renamed vdev drivers
This registers the legacy names of the driver being renamed in
commit 2f45703c17 ("drivers: make driver names consistent").

Signed-off-by: Jan Blunck <jblunck@infradead.org>
Tested-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2016-10-25 18:49:18 +02:00
Pablo de Lara
62ae8dbc76 crypto/libcrypto: fix init function names
All init/uninit function names in the virtual devices have been renamed,
so they finish with probe or remove, so to keep consistency,
same thing should be done in this PMD.

Fixes: d61f70b4c9 ("crypto/libcrypto: add driver for OpenSSL library")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-13 21:58:44 +02:00
Pablo de Lara
8985779c72 crypto/zuc: fix init function names
All init/uninit function names in the virtual devices have been renamed,
so they finish with probe or remove, so to keep consistency,
same thing should be done in this PMD.

Fixes: cf7685d68f ("crypto/zuc: add driver for ZUC library")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-13 21:58:44 +02:00
Shreyansh Jain
01f1922786 drivers: rename register macro prefix
All macros related to driver registeration renamed from DRIVER_*
to RTE_PMD_*

This includes:

 DRIVER_REGISTER_PCI -> RTE_PMD_REGISTER_PCI
 DRIVER_REGISTER_PCI_TABLE -> RTE_PMD_REGISTER_PCI_TABLE
 DRIVER_REGISTER_VDEV -> RTE_PMD_REGISTER_VDEV
 DRIVER_REGISTER_PARAM_STRING -> RTE_PMD_REGISTER_PARAM_STRING
 DRIVER_EXPORT_* -> RTE_PMD_EXPORT_*

Fix PMDINFOGEN tool to look for matches of RTE_PMD_REGISTER_*.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2016-10-14 01:49:32 +02:00
Fiona Trahe
a831c318c5 crypto/aesni_mb: free ring memory on queue release
Free ring memory on queue_pair release, else
releasing and setting up queue-pair of a different size fails.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-08 17:54:38 +02:00
Slawomir Mrozowicz
d61f70b4c9 crypto/libcrypto: add driver for OpenSSL library
This code provides the initial implementation of the libcrypto
poll mode driver. All cryptography operations are using Openssl
library crypto API. Each algorithm uses EVP_ interface from
openssl API - which is recommended by Openssl maintainers.

This patch adds libcrypto poll mode driver support to librte_cryptodev
library.

Signed-off-by: Slawomir Mrozowicz <slawomirx.mrozowicz@intel.com>
Signed-off-by: Michal Kobylinski <michalx.kobylinski@intel.com>
Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Signed-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-10-08 17:54:37 +02:00
Pablo de Lara
cf7685d68f crypto/zuc: add driver for ZUC library
Added new SW PMD which makes use of the libsso SW library,
which provides wireless algorithms ZUC EEA3 and EIA3
in software.

This PMD supports cipher-only, hash-only and chained operations
("cipher then hash" and "hash then cipher") of the following
algorithms:
- RTE_CRYPTO_SYM_CIPHER_ZUC_EEA3
- RTE_CRYPTO_SYM_AUTH_ZUC_EIA3

The ZUC hash and cipher algorithms, which are enabled
by this crypto PMD are implemented by Intel's libsso software
library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-08 17:53:10 +02:00
Pablo de Lara
94831f8f1d crypto: fix build with icc
This commit fixes a compilation error on icc,
due to unallowed conversion from int to enum:

drivers/crypto/snow3g/rte_snow3g_pmd.c(155):
    error #188: enumerated type mixed with another type
        sess->op = mode;
                 ^
drivers/crypto/kasumi/rte_kasumi_pmd.c(155):
    error #188: enumerated type mixed with another type
        sess->op = mode;
                 ^

Fixes: 3aafc423cf ("snow3g: add driver for SNOW 3G library")
Fixes: 2773c86d06 ("crypto/kasumi: add driver for KASUMI library")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
b2bb359747 crypto/aesni_gcm: move pre-counter block to driver
This patch moves computing of pre-counter block into the AESNI-GCM
driver so it can be moved from test files.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Fiona Trahe
e1b7f509e6 crypto/qat: add 3DES cipher algorithm
3DES support added to QuickAssist PMD with CTR and CBC mode.
Both cipher-only and chained with HMAC_SHAx.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Fiona Trahe
0fad384df0 crypto/qat: cleanup code
Cleanup of unused code.
Rename and simplify a badly named struct element, was aes, but
used for all types of ciphers.
Print correct error msg (Unsupported rather than Undefined)
for all ciphers not supported by QAT PMD.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Pablo de Lara
af9f6afb14 crypto: rename all KASUMI references
KASUMI algorithm has all uppercase letters,
but some references of it had some lowercase letters.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Pablo de Lara
6aef763816 crypto: rename some SNOW 3G references
SNOW 3G algorithm has all uppercase letters in its name
and a space between SNOW and 3G, but some references of it
had some lowercase letters or no space.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
05175ec459 crypto/qat: fix FreeBSD build
Using sys/types.h instead of linux/types.h
so as to compile QAT_PMD on FreeBSD.

Fixes: 1703e94ac5 ("qat: add driver for QuickAssist devices")

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
2fa64f840d crypto/qat: add GMAC capability
Added Galois Message Authentication Code (GMAC) capability to
QuickAssist Technology symmetric cryptographic driver.
GMAC is authentication only variant of Galois Counter Mode (GCM)
where all plaintext is provided with AAD pointer only.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
f2f639c6e0 crypto/qat: add C3xxx device
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
ae20c0735c crypto/qat: add C62x device
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
d4f2745300 crypto/qat: add KASUMI
This patch add kasumi support in Intel(R)
QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
6bc4300318 crypto/null: fix key size increment value
This patch fixes the values of increment in key size.

Fixes: 94b0ad8e0a ("null_crypto: add driver for null crypto operations")

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
db0e952a5c crypto/qat: add NULL capability
Enabled NULL crypto for Intel(R) QuickAssist Technology.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
d905ee32d0 crypto/qat: add aes-sha384-hmac capability
Enable support of aes-sha384-hmac in Intel(R) QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Deepak Kumar Jain
ebdbe12fbf crypto/qat: add aes-sha224-hmac capability
Added support of aes-sha224-hmac in Intel(R) QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Arek Kusztal
61ec518162 crypto/qat: add MD5 HMAC capability
Added posibility to compute MD5 HMAC digest with Intel QuickAssist
Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Fiona Trahe
1bb14aab6d crypto/qat: optimize request copy
using rte_mov128 instead of structure assignment to copy
template request from session context into request

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: John Griffin <john.griffin@intel.com>
2016-10-04 20:41:09 +02:00
John Griffin
10b49880e3 crypto/qat: make the session struct variable in size
This patch changes the qat firmware session data structure from a fixed
size to a variable size which is dependent on the size of the chosen
algorithm.
This reduces the amount of bytes which are transferred across
PCIe and thus helps to increase qat performance when the
accelerator is bound by PCIe.

Signed-off-by: John Griffin <john.griffin@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2016-10-04 20:41:09 +02:00
Shreyansh Jain
50a3345fa9 vdev: rename init/uninit ops to probe/remove
Inline with PCI probe and remove, VDEV probe and remove hooks provide
a uniform naming.
PCI probe represents scan and driver initialization. For VDEV, it will
represent argument parsing and initialization.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2016-10-06 16:02:14 +02:00
Jan Viktorin
2f3193cf0f pci: inherit common driver in PCI driver
Remove the 'name' member from rte_pci_driver and move to generic
rte_driver.

Most of the PMD drivers were initially using DRIVER_REGISTER_PCI(<name>..)
as well as assigning a name to eth_driver.pci_drv.name member.
In this patch, only the original DRIVER_REGISTER_PCI(<name>..) name has
been populated into the rte_driver.name member - assignments through
eth_driver has been removed.

Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
[Shreyansh: Rebase and expand changes to newly added files]
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: David Marchand <david.marchand@6wind.com>
2016-10-03 16:33:55 +02:00
Jan Viktorin
2695c6df69 eal: remove unused PMD types
- All devices register themselfs by calling a kind of DRIVER_REGISTER_XXX.
  The PMD_REGISTER_DRIVER is not used anymore.
- PMD_VDEV type is also not being used - can be removed from all VDEVs.

Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: David Marchand <david.marchand@6wind.com>
2016-10-03 16:33:51 +02:00
Jan Viktorin
fe363dd425 drivers: use vdev registration
All PMD_VDEV drivers can now use rte_vdev_driver instead of the
rte_driver (which is embedded in the rte_vdev_driver).

Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: David Marchand <david.marchand@6wind.com>
2016-10-03 16:33:48 +02:00
David Marchand
c830cb2954 drivers: use PCI registration macro
Simplify crypto and ethdev pci drivers init by using newly introduced
init macros and helpers.
Those drivers then don't need to register as "rte_driver"s anymore.

Exceptions:
- virtio and mlx* use RTE_INIT directly as they have custom initialization
  steps.
- VDEV devices are not modified - they continue to use PMD_REGISTER_DRIVER.

Update documentation for replacing an example referring to
PMD_REGISTER_DRIVER.

Signed-off-by: David Marchand <david.marchand@6wind.com>
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2016-10-03 16:33:23 +02:00