META item is supported on both Rx and Tx. 'transfer' attribute
is also supported. SET_META action is also added.
Due to restriction on reg_c[meta], various bit width might be
available. If devarg parameter dv_xmeta_en=1, the META uses
metadata register reg_c[0], which may be required for internal
kernel or firmware needs. In this case PMD queries kernel about
available fields in reg_c[0] and restricts the register usage
accordingly. If devarg parameter dv_xmeta_en=2, the META feature
uses reg_c[1], there should be no limitations on the data width.
However, extensive MEAT feature is currently disabled until
register copy on loopback is supported by forthcoming patches.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Flow MARK item is newly supported along with MARK action. MARK
action and item are supported on both Rx and Tx. It works on the
metadata reg_c[] only if extensive flow metadata register is
supported. Without the support, MARK action behaves same as
before - valid only on Rx and no MARK item is valid.
FLAG action is also modified accordingly. FLAG action is
supported on both Rx and Tx via reg_c[] if extensive flow
metadata register is supported.
However, the new MARK/FLAG item and action are currently
disabled until register copy on loopback is supported by
forthcoming patches.
The actual index of engaged metadata reg_c[] register to
support FLAG/MARK actions depends on dv_xmeta_en devarg value.
For extensive metadata mode 1 the reg_c[1] is used and
transitive MARK data width is 24. For extensive metadata mode 2
the reg_c[0] is used and transitive MARK data width might be
restricted to 0 or 16 bits, depending on kernel usage of reg_c[0].
The actual supported width can be discovered by series of trials
with rte_flow_validate().
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Add support of new rte_flow item and action - TAG and SET_TAG. TAG is
a transient value which can be kept during flow matching.
This is supported through device metadata register reg_c[]. Although
there are 8 registers are available on the current mlx5 device,
some of them can be reserved for firmware or kernel purposes.
The availability should be queried by iterative trial-and-error
mlx5_flow_discover_mreg_c() routine.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
The NIC might support up to 8 extensive metadata registers.
These registers are supposed to be used by multiple features.
There is register id query routine to allow determine which
register is actually used by specified feature.
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
If the extensive metadata registers are supported,
it can be regarded inclusively that the extensive
metadata support is possible. E.g. metadata register
copy action, supporting 16 modify header actions,
reserving register across different steering domain
(FDB and NIC) and so on.
This patch handles the maximal amount of header modify
actions depending on discovered metadata registers
support.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
The metadata register reg_c[0] might be used by kernel or
firmware for their internal purposes. The actual used mask
can be queried from the kernel. The remaining bits can be
used by PMD to provide META or MARK feature. The code queries
the mask of reg_c[0] and adjust the resource usage dynamically.
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
The PMD parameter dv_xmeta_en is added to control extensive
metadata support. A nonzero value enables extensive flow
metadata support if device is capable and driver supports it.
This can enable extensive support of MARK and META item of
rte_flow. The newly introduced SET_TAG and SET_META actions
do not depend on dv_xmeta_en parameter, because there is
no compatibility issue for new entities. The dv_xmeta_en is
disabled by default.
There are some possible configurations, depending on parameter
value:
- 0, this is default value, defines the legacy mode, the MARK
and META related actions and items operate only within NIC Tx
and NIC Rx steering domains, no MARK and META information
crosses the domain boundaries. The MARK item is 24 bits wide,
the META item is 32 bits wide.
- 1, this engages extensive metadata mode, the MARK and META
related actions and items operate within all supported steering
domains, including FDB, MARK and META information may cross
the domain boundaries. The ``MARK`` item is 24 bits wide, the
META item width depends on kernel and firmware configurations
and might be 0, 16 or 32 bits. Within NIC Tx domain META data
width is 32 bits for compatibility, the actual width of data
transferred to the FDB domain depends on kernel configuration
and may be vary. The actual supported width can be retrieved
in runtime by series of rte_flow_validate() trials.
- 2, this engages extensive metadata mode, the MARK and META
related actions and items operate within all supported steering
domains, including FDB, MARK and META information may cross
the domain boundaries. The META item is 32 bits wide, the MARK
item width depends on kernel and firmware configurations and
might be 0, 16 or 24 bits. The actual supported width can be
retrieved in runtime by series of rte_flow_validate() trials.
If there is no E-Switch configuration the ``dv_xmeta_en`` parameter is
ignored and the device is configured to operate in legacy mode (0).
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
The metadata registers reg_c provide support for TAG and
SET_TAG features. Although there are 8 registers are available
on the current mlx5 devices, some of them can be reserved.
The availability should be queried by iterative trial-and-error
implemented by mlx5_flow_discover_mreg_c() routine.
If reg_c is available, it can be regarded inclusively that
the extensive metadata support is possible. E.g. metadata
register copy action, supporting 16 modify header actions
(instead of 8 by default) preserving register across
different domains (FDB and NIC) and so on.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
There are some renaming:
- in the DV flow engine overall: flow_d_* -> flow_dv_*
- in flow_dv_translate(): res -> mhdr_res
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Introduce the dedicated matcher register field setup routine.
Update the code to use this unified one.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Update flow creation/destroy functions for future reuse.
List operations can be skipped inside functions and done
separately out of flow creation.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Some rte_flow fields which are local to subflows have been moved to
mlx5_flow structure. RSS attributes are grouped by mlx5_flow_rss structure.
tag_resource is moved to mlx5_flow_dv structure.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Add flow metadata register copy action which is supported through modify
header command. As it is an internal action, not exposed to users, item
type (MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG) is negative value. This can be
used when creating PMD internal subflows.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
When composing device command for modify header action, provided mask
should be taken more accurate into account thus length and offset
in action should be set accordingly at precise bit-wise boundaries.
For the future use, metadata register copy action is also added.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Public API RTE_FLOW_ACTION_TYPE_TAG and RTE_FLOW_ITEM_TYPE_TAG
present data in host-endian format, as all metadata related
entities. The internal mlx5 tag related action and item should
use the same endianness to be conformed.
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Introduce simple hash list to the mlx5 utilities. User can define
its own data structure containing the mlx5_hlist_entry and create
the hash list table via the creation interface. Then the entry will
be inserted into the table and linked to the corresponding list
head. User should guarantee there is no collision of the key and
provide a callback function to handle all the remaining entries in
the table when destroying the hash list. User should define a proper
number of the list heads in the table in order to get a better
performance. The LSB of the 'key' is used to calculate the index of
the head in the list heads array.
This implementation is not multi-threads safe right now.
Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
The point is that adapter lock has to be held on
list accesses, as well as when talking to the HW.
Fixes: a9825ccf5bb8 ("net/sfc: support flow API filters")
Cc: stable@dpdk.org
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
When INTx is used, the interrupt handler needs to explicitly re-enable
interrupt in order to receive another one in future. The LSC interrupt
handler currently does not, and the link state never gets updated when
INTx is used (e.g. uio_pci_generic). Call rte_intr_ack() at the end of
the handler, to re-enable INTx.
Fixes: fefed3d1e62c ("enic: new driver")
Cc: stable@dpdk.org
Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
Some applications, i.e. OVS, have rule like:
[1] pattern ipv4 / end actions ...
which intends to match ipv4 only on non-vlan ethernet and MLX5 NIC
supports this.
So PMD should accept this.
Fixes: 906a2efae8da ("net/mlx5: validate flow rule item order")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Currently PMD doesn't check whether the user specified ethernet type is
conflicting with the followed IPv4/IPv6 items, which leads to HW refuse
to create rule, for example:
... pattern eth type is 0x86dd / ipv4 / end ...
ethernet type is IPv6 but IPv4 is following, this should be validated
as failure and report corresponding error in detail.
Fixes: 23c1d42c7138 ("net/mlx5: split flow validation to dedicated function")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
This adds new device id to the list of Mellanox devices
that runs mlx5 PMD.
- ConnectX-6DX device ID
- ConnectX-6DX SRIOV device ID
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
If first rule is issued and then the second rule is issued with the same
input set as first rule's, FDIR driver can't find there is an identical
input set.
Fixes: 109e8e06249e ("net/ice: configure HW flow director rule")
Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Add device IDs for E810_XXV.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
System DPI Packet Interface Unit (SDP) is a co-processor
of OCTEON TX2 which provides PCIe endpoint support for a
remote host to DMA packets into and out of the OCTEON TX2 SoC.
SDP interface comes in to live only when it is connected in
EP mode. It exposes input and output queue pairs to remote host
for instruction input and packet output. It can be used as
a communication channel between remote host and OCTEON TX2.
Host machine needs to use corresponding user/kernel mode
driver to communicate with SDP interface on OCTEON TX2 SoC.
SDP interface support is limited to SDP PF device now.
No SDP VF support.
Signed-off-by: Subrahmanyam Nilla <snilla@marvell.com>
Signed-off-by: Venkateshwarlu Nalla <venkatn@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
As doc mentioned, Rx/Mac/vlan filters are all supported by best effort.
These control commands should return success.
Fixes: f9b9d1a55775 ("net/virtio-user: add multiple queues in device emulation")
Cc: stable@dpdk.org
Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Virtio spec only set rule that packed ring maximum size is up to 2^15
entries. Should not limit packed ring size to power of two.
Fixes: aea29aa5d37b ("net/virtio: enable packed virtqueues by default")
Cc: stable@dpdk.org
Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
When port start, driver needs to alloc mbuf resource to fill Rx
queue bd section, replace rte_mbuf_raw_alloc function to
rte_pktmbuf_alloc_bulk with initialized mbuf structure to avoid
some structures being used without initialization.
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
For VXLAN TSO offload, PMD calculates offload info
err due to the wrong branch, which can cause hardware failed.
Fixes: c3ba1f0f20cd ("net/hinic: support inner L3 checksum offload")
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
This patch fixs the code style check issue for MACRO_ARG_REUSE.
Fixes: b8582d051af1 ("net/hinic/base: add HW interfaces for SR-IOV")
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
Do not log errors when CMD_OVERLAY_OFFLOAD_CTRL and
CMD_GET_SUPP_FEATURE_VER fail, as they are only used to probe if a
feature is provisioned. They are expected to fail if the feature is
not provisioned.
Do not log an error when disabling Geneve offload fails. It is
expected to fail if this feature is provisioned but not enabled.
Fixes: c02a96fc4aec ("net/enic: enable GENEVE with options offload")
Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
VFs all have subsystem ID 0. VIC models with the latest VF are at
least 40G, so report that as a more reasonable speed than 10G.
Fixes: 57bb45b37bdf ("net/enic: add PCI id for new virtual function")
Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
Add a space between the function name and message.
Fixes: bbd8ecc05434 ("net/enic: remove PMD log type references")
Cc: stable@dpdk.org
Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
The dynamic mbuf fields were introduced by [1]. The egress metadata is
good candidate to be moved from statically allocated field tx_metadata to
dynamic one. Because mbufs are used in half-duplex fashion only, it is
safe to share this dynamic field with ingress metadata.
The shared dynamic field contains either egress (if application going to
transmit mbuf with tx_burst) or ingress (if mbuf is received with rx_burst)
metadata and can be accessed by RTE_FLOW_DYNF_METADATA() macro or with
rte_flow_dynf_metadata_set() and rte_flow_dynf_metadata_get() helper
routines. PKT_TX_DYNF_METADATA/PKT_RX_DYNF_METADATA flag will be set
along with the data.
The mbuf dynamic field must be registered by calling
rte_flow_dynf_metadata_register() prior accessing the data.
The availability of dynamic mbuf metadata field can be checked with
rte_flow_dynf_metadata_avail() routine.
DEV_TX_OFFLOAD_MATCH_METADATA offload and configuration flag is removed.
The metadata support in PMDs is engaged on dynamic field registration.
Metadata feature is getting complex. We might have some set of actions
and items that might be supported by PMDs in multiple combinations,
the supported values and masks are the subjects to query by perfroming
trials (with rte_flow_validate).
[1] http://patches.dpdk.org/patch/62040/
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Ori Kam <orika@mellanox.com>
Change the type of burst mode information from bit field to free string
data, so that each PMD can describe the Rx/Tx busrt functions flexibly.
Fixes: eb5902504a13 ("ethdev: add API for getting burst mode information")
Fixes: 6b6609f68ccd ("net/i40e: support Rx/Tx burst mode info")
Fixes: e9a10e6c2102 ("net/ice: support Rx/Tx burst mode info")
Fixes: 7fe108edcf53 ("app/testpmd: show Rx/Tx burst mode description")
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Ray Kinsella <ray.kinsella@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Controller-specific handling is required for Thor-based NICs when
stopping or starting a receive queue, otherwise packet reception
may not be reliably resumed when a stopped receive queue is
restarted:
- The VNIC default receive ring needs to be recomputed when a
receive queue is stopped or started.
- When stopping the last (or only) receive queue for a given
VNIC, ensure that no packets can reach the default receive
ring by temporarily setting the VNIC MRU to zero.
Fixes: f8168ca0e690 ("net/bnxt: support thor controller")
Cc: stable@dpdk.org
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
The function bnxt_vnic_rss_configure_thor() returns early when
all receive queues are stopped without releasing the hwrm
spinlock, which causes subsequent HWRM operations to hang. Fix
by ensuring that the lock is released before returning from
this function.
Fixes: 38412304b50a ("net/bnxt: enable RSS for thor-based controllers")
Cc: stable@dpdk.org
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Receive queue state needs to reflect "started" state when rebuilding
the RSS table for Thor-based NICs. Move state update so that receive
queues being started are included in the RSS table.
Fixes: 38412304b50a ("net/bnxt: enable RSS for thor-based controllers")
Cc: stable@dpdk.org
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
A previous commit made updating of the RSS table when a receive
queue is stopped/started conditional on vnic->rx_queue_cnt being
nonzero. This count is only nonzero for dynamically created VNICs,
so the RSS table was not being updated in the normal path.
Fix by restoring the original logic.
Also ensure that vnic->rx_queue_cnt is initialized to zero when
reinitializing the VNIC array.
Fixes: 36024b2e7fe5 ("net/bnxt: allow dynamic creation of VNIC")
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
While issuing hwrm_queue_qportcfg command, we are setting the
drv_qmap_cap bit which is causing the firmware to return incorrect COS
queue mapping.
This bit is not required when COS classification is enabled.
Fixes: 698aa7e95325 ("net/bnxt: add code to determine the Tx COS queue")
Cc: stable@dpdk.org
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
During initialization sequence in bnxt_alloc_mem()
if bnxt_alloc_async_cp_ring() fails, driver invokes bnxt_free_mem()
which in turn call bnxt_free_vnic_mem() which causes the error logs
"bnxt_free_vnic_mem(): VNIC is not freed yet!". This is because
vnic memory is allocated but not initialized yet.
Fix this by moving bnxt_init_vnics() from bnxt_init_nic() to
bnxt_alloc_vnic_mem(). Also get rid of bnxt_init_nic() as the
initialization is done in respective functions now.
Fixes: 1bf01f5135f8 ("net/bnxt: prevent device access when device is in reset")
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Santoshkumar Karanappa Rastapur <santosh.rastapur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
bnxt_init_chip called on port start keeps incrementing rx_cosq_cnt.
Hence more vnics are allocated with less number of rings on each port
stop/start operation. Eventually vnic allocation fails due to incorrect
ring group as no ring gets allocated to the vnic.
Fixes: 84d49664b5b2 ("net/bnxt: support CoS classification")
Signed-off-by: Santoshkumar Karanappa Rastapur <santosh.rastapur@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
filter->mac_index is used to check, if a same mac is
already programmed. Hence, filter->dflt member is not
needed which is also used for mac addr redundancy check.
This patch fixes it by moving mac_index based redundant
check from bnxt_mac_addr_add_op to bnxt_add_mac_filter
Fixes: 6118503d8071 ("net/bnxt: fix VLAN filtering")
Cc: stable@dpdk.org
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Update "mbuf->ol_flags" correctly for inner and ourter ip checksum
errors in case of tunnel and non-tunnel packets.
Fixes: 65ee636872eb ("net/bnxt: fix Rx checksum flags")
Cc: stable@dpdk.org
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Creating a flow is a normal event; should not be logged at error level.
Fixes: 5c1171c97216 ("net/bnxt: refactor filter/flow")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Rdma-core needs the dst_vport (port_id) action be after push/pop VLAN
and modify hdr actions otherwise it will reject to create rule.
This pach validates the port_id is after push/pop VLAN and set VLAN
VID/PCP otherwise PMD spits out errors.
Fixes: 5f163d520cff ("net/mlx5: support modify VLAN ID on existing VLAN header")
Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Currently if user want to set VLAN id/pcp on an about to be pushed VLAN
header, the of_set_vlan_vid/of_set_vlan_pcp must be present _before_
action of_push_vlan:
[1] ... actions of_set_vlan_vid vlan_vid 2 / of_push_vlan ...
This is misleading because people think rule [1] intends to set VLAN id
on the existing VLAN header and then push one new VLAN header on top of
it.
A more natual way to set VLAN id/pcp on an to be pushed VLAN header
should be:
[2] ... actions of_push_vlan / of_set_vlan_vid vlan_vid 2 / ...
Fixes: a5f2da0b816b ("net/mlx5: support modify VLAN ID on new VLAN header")
Fixes: 68fad3635042 ("net/mlx5: support modifying VLAN priority on VLAN header")
Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
