Commit Graph

31603 Commits

Author SHA1 Message Date
Tomasz Duszynski
a34ffa4944 raw/cnxk_gpio: release queue
Add support for queue release.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
2022-02-18 12:54:45 +01:00
Tomasz Duszynski
a83ba0fbef raw/cnxk_gpio: setup queue
Add support for queue setup.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
2022-02-18 12:54:45 +01:00
Tomasz Duszynski
dd2019a55a raw/cnxk_gpio: read queue count
Add support for reading number of available queues. Single queue
corresponds to GPIO.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
2022-02-18 12:54:45 +01:00
Tomasz Duszynski
d64ef08991 raw/cnxk_gpio: read default queue configuration
Add support for reading default queue configuration.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
2022-02-18 12:54:45 +01:00
Tomasz Duszynski
d0b8a4e191 raw/cnxk_gpio: add GPIO driver skeleton
Add initial support for PMD that allows to control particular pins form
userspace. Moreover PMD allows to attach custom interrupt handlers to
controllable GPIOs.

Main users of this PMD are dataplain applications requiring fast and low
latency access to pin state.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
2022-02-18 12:54:32 +01:00
Naga Harish K S V
bd0a32d14b eventdev/eth_tx: fix queue add error code
The internal function txa_service_queue_add() is returning 0
in case of error, correct this logic to return a negative value
to indicate failure.

Fixes: a3bbf2e097 ("eventdev: add eth Tx adapter implementation")
Cc: stable@dpdk.org

Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
2022-02-14 16:23:49 +01:00
Ganapati Kundapura
6b946657e7 eventdev/crypto: assume SW when no driver capabilities
update rte_event_crypto_adapter_caps_get() to return
SW_CAP if PMD callback is not registered.

Signed-off-by: Ganapati Kundapura <ganapati.kundapura@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
2022-02-14 16:23:49 +01:00
Ganapati Kundapura
2ae84b39ae eventdev/crypto: store operations in circular buffer
Move crypto ops to circular buffer to retain crypto
ops when cryptodev/eventdev are temporarily full.

Signed-off-by: Ganapati Kundapura <ganapati.kundapura@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
2022-02-14 16:23:43 +01:00
Pavan Nikhilesh
8b025b7dda event/cnxk: improve Rx performance
Improve vWQE and CQ Rx performance by tuning perfetches to 64B
cacheline size.
Also, prefetch the vWQE array offsets at cacheline boundaries.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-14 16:23:33 +01:00
Pavan Nikhilesh
17d6b933fd event/cnxk: disable default wait time for dequeue
Setting WAITW bit enables default min dequeue timeout of 1us.
Avoid the min dequeue timeout by setting WAITW only when dequeue_timeout
is configured.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-14 16:23:33 +01:00
Pavan Nikhilesh
1f5b3d55c0 event/cnxk: store and reuse workslot status
Store and reuse workslot status for TT, GRP and HEAD status
instead of reading from GWC as reading from GWC imposes
additional latency.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-14 16:23:33 +01:00
Thomas Monjalon
2e07139b66 version: 22.03-rc1
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2022-02-14 00:11:35 +01:00
Radu Nicolau
cecf5ed9e4 dma/idxd: support allow/block list
Add support for allow or block list for devices bound
to the kernel driver.
When used the allow or block list applies as an additional
condition to the name prefix.

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Kevin Laatz <kevin.laatz@intel.com>
2022-02-13 23:18:01 +01:00
Cristian Dumitrescu
a4c1146c75 examples/pipeline: print table entries to file
Add support for the show CLI command to print table entries to a file
instead of standard output.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
2022-02-13 22:31:39 +01:00
Cristian Dumitrescu
2a11b503d2 pipeline: support checksum for variable size headers
Added checksum support for variable size headers such as IPv4 headers
with options.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
2022-02-13 22:31:25 +01:00
Cristian Dumitrescu
eb3e2c1183 pipeline: fix table state memory allocation
The regular tables, selector tables and learner tables are all sharing
the table state array. The locations in this array were computed
incorrectly, leading to memory corruption issues.

Fixes: 4f59d37261 ("pipeline: support learner tables")
Cc: stable@dpdk.org

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>
Signed-off-by: Venkata Suresh Kumar P <venkata.suresh.kumar.p@intel.com>
2022-02-13 22:31:16 +01:00
Cristian Dumitrescu
8f8f6c1448 pipeline: fix annotation checks
The checks for the table-only and default-only annotations were
incorrect, as they were using the pipeline action ID instead of the
table action ID for retrieving the table action info. These checks are
now corrected and pushed into the internal table_entry_check()
function.

Fixes: cd79e02058 ("pipeline: support action annotations")
Cc: stable@dpdk.org

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
2022-02-13 22:31:05 +01:00
Cristian Dumitrescu
dbce95e363 pipeline: add check against loops
Detect when a jump instruction, either conditional or unconditional,
is jumping to itself, thus creating a loop, which is not allowed in
data plane code.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
2022-02-13 22:30:59 +01:00
Cristian Dumitrescu
96b37959fb pipeline: add drop port for each pipeline
An additional output port is now implicitly created for every pipeline
to serve as the packet drop port. Up to now, the drop port had to be
explicitly created for each pipeline.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
2022-02-13 22:30:47 +01:00
Cristian Dumitrescu
f23feb063d pipeline: move table type registration to library
Move the table type registration for the well known table types from
the application to the pipeline library.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
2022-02-13 22:08:23 +01:00
Cristian Dumitrescu
6e4a64c8b3 pipeline: move port type registration to library
Move the port type registration for the well known port types from the
application to the pipeline library.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
2022-02-13 22:07:55 +01:00
Cristian Dumitrescu
c07aaa6553 pipeline: improve drop instruction
The output port to be used as the drop port is now determined when the
drop instruction is executed as opposed to being statically determined
at instruction translation time and hardcoded in the opcode.

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
2022-02-13 21:58:28 +01:00
Junfeng Guo
3bc814fc55 raw/ntb: clear all valid doorbell bits on init
Before registering the doorbell interrupt handler callback function,
all the valid doorbell bits within the NTB private data struct should
be cleared to avoid the confusion of the handshake timing sequence
diagram when setting up the NTB connection in back-to-back mode.

Fixes: 62012a7681 ("raw/ntb: add handshake process")
Cc: stable@dpdk.org

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
2022-02-13 12:23:34 +01:00
Fan Zhang
06b04233b4 maintainers: update for crypto api/crypto perf/sw crypto pmds using ipsec-mb
Add myself as Crypto API, QAT, SW PMDs based on ipsec-mb,
NULL PMD, and crypto perf test maintainer. Also remove
Declan, Deepak, and John from the maintainers of these
areas.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: John Griffin <john.griffin@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-13 12:16:56 +01:00
Gagandeep Singh
b1bbf222be crypto/dpaa_sec: add debug prints
Adding useful debug prints in DPAA driver for
easy debugging. A devarg is added to enable various levels
of prints.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2022-02-12 12:19:14 +01:00
Nipun Gupta
4562de326d crypto/dpaa2_sec: support ordered queue
This patch supports ordered queue for DPAA2 platform.
A devarg is added to enable strict ordering.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2022-02-12 12:19:14 +01:00
Hemant Agrawal
99cc26f665 crypto/dpaax_sec: fix auth/cipher xform chain checks
This patch add more checks on next type for PDCP cases.

Fixes: 45e019608f ("crypto/dpaa2_sec: support integrity only PDCP")
Fixes: a1173d5559 ("crypto/dpaa_sec: support PDCP offload")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2022-02-12 12:18:06 +01:00
Gagandeep Singh
84bb24bd05 crypto/dpaa2_sec: add debug prints
Few useful debug prints added in dequeue function.
These are controlled via pmd devargs. Details of using the
devarg is updated in dpaa2_sec.rst

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2022-02-12 12:18:05 +01:00
Hemant Agrawal
6a9dc83918 crypto/dpaa2_sec: update capabilities for AES CMAC
Add IV size and change the digest size to supported
value by the HW engine.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2022-02-12 12:17:55 +01:00
Gagandeep Singh
c6eb07e4ea common/dpaax: change PDCP SDAP job processing mode
For PDCP SDAP test cases, HW sec engine process the
jobs in WAIT mode.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2022-02-12 12:10:43 +01:00
Franck Lenormand
6127fff842 common/dpaax: remove outdated caamflib code
DPAA1 and DPAA2 platforms use SEC ERA 8 and 10 only.
Hence, code related to old SEC-ERA (1-7) is removed.

This patch removes code in SDAP and PDCP header related to these
ERA to simplify the codebase:
 - Simplify logic using RTA_SEC_ERA_<> macro
 - Remove era_2_sw_hfn_ovrd dedicated to RTA_SEC_ERA_2

Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2022-02-12 12:08:46 +01:00
Arek Kusztal
518a974bfe cryptodev: reorganize asymmetric structs
This patch adds crypto uint typedef so adding comment
about byte-order becomes unnecessary.

It makes API comments more tidy, and consistent
with other asymmetric crypto APIs.

Additionally it reorganizes code that enums, externs
and forward declarations are moved to the top of the
header file making code more readable.

It removes also comments like co-prime constraint
from mod inv as it is natural mathematical constraint,
not PMD constraint.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 11:20:21 +01:00
Arek Kusztal
3ec4cbfdbe cryptodev: use C11 macro instead of direct attribute
This commit replaces __extension__ attribute with
RTE_STD_C11 in anonymous unions.

It makes API consistent in terms of usage of C11
feature macro.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 11:20:06 +01:00
Arek Kusztal
baf482c0e3 cryptodev: clarify usage of random numbers in asym
This commit clarifies usage of random numbers in asymmetric
crypto API.

The user is now allowed to provide information to the PMD if random
number should be generated or should be read from user input.
If PMD does not support random number generation user should
always provide it, if PMD does not support user random,
rte_crypto_param.data accordingly should be set to NULL.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 11:19:51 +01:00
Arek Kusztal
a678c5d365 cryptodev: add DSA random number k
This commit adds random number 'k' to DSA
op param struct for asymmetric crypto ops.

This parameter is crucial in stiuations where:
- PMD cannot generate random number
- User would like to provide random source

Additionally, it makes DSA consistent with ECDSA
in terms of 'k' which includes this parameter.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 11:18:22 +01:00
Ciara Power
757f40e28e cryptodev: modify return value for asym session create
Rather than the asym session create function returning a session on
success, and a NULL value on error, it is modified to now return int
values - 0 on success or -EINVAL/-ENOTSUP/-ENOMEM on failure.
The session to be used is passed as input.

This adds clarity on the failure of the create function, which enables
treating the -ENOTSUP return as TEST_SKIPPED in test apps.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:39 +01:00
Ciara Power
92d55afe0f cryptodev: add asymmetric session user data API
A user data field is added to the asymmetric session structure.
Relevant API added to get/set the field.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:39 +01:00
Ciara Power
a29bb24898 cryptodev: hide asymmetric session structure
The rte_cryptodev_asym_session structure is now moved to an internal
header. This will no longer be used directly by apps,
private session data can be accessed via get API.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:39 +01:00
Ciara Power
1f1e4b7cba cryptodev: use single mempool for asymmetric session
Rather than using a session buffer that contains pointers to private
session data elsewhere, have a single session buffer.
This session is created for a driver ID, and the mempool element
contains space for the max session private data needed for any driver.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:39 +01:00
Ciara Power
0438b7dff3 doc: replace asym crypto code with literal includes
The programmer's guide for cryptodev included sample code for using
Asymmetric crypto. This is now replaced with direct code from the test
application, using literal includes. It is broken into snippets as the
test application didn't have all of the required code in one function.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:39 +01:00
Anoob Joseph
a45f37334b crypto/cnxk: fix update of number of descriptors
Pending queue also need to be adjusted while updating the number of
descriptors.

Fixes: a455fd869c ("common/cnxk: align CPT queue depth to power of 2")
Cc: stable@dpdk.org

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:38 +01:00
Anoob Joseph
aa6db9037e crypto/cnxk: use unique cache line per inst
CPT inflight request is used to track a request that is enqueued to
cryptodev. Having more than one inst use the same cacheline can result
in serialization of CPT result memory writes causing perf degradations.
Align inflight request to ROC cache line to ensure only one result would
be written per cache line..

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:38 +01:00
Anoob Joseph
1a8cb9199b common/cnxk: add ROC cache line size constant
Add ROC cache line size constant.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:38 +01:00
Tejasree Kondoj
670af27b22 crypto/cnxk: support ESN and anti-replay
Added lookaside IPsec ESN and anti-replay support
through security session update.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:38 +01:00
Anoob Joseph
a4716f534e common/cnxk: add err ctl in SA
Add err ctl field in SA context.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:38 +01:00
Weiguo Li
b072930fb1 compress/octeontx: fix null pointer dereference
Check for memory allocation failure is added to avoid null
pointer dereference.

Fixes: c378f084d6 ("compress/octeontx: add device setup ops")
Cc: stable@dpdk.org

Signed-off-by: Weiguo Li <liwg06@foxmail.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:38 +01:00
Kai Ji
3cb8f53477 crypto/qat: fix GEN4 AEAD job in raw data path
This patch fix the cipher params configuration in AEAD job if
QAT GEN4 unified cipher slice(UCS) enabled.

Fixes: 328d690d2f ("crypto/qat: update raw data path")
Cc: stable@dpdk.org

Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2022-02-12 10:26:38 +01:00
Pablo de Lara
4582f79c7b crypto/ipsec_mb: fix buffer overrun
Memory for ZUC cipher/auth key in session had to be expanded to 32 bytes,
instead of 16 bytes, when adding ZUC-256 support.
However, impact is low as this memory is part of a union
with bigger size than 32 bytes.

Coverity issue: 374374
Coverity issue: 374379
Fixes: 8c835018de ("crypto/ipsec_mb: support ZUC-256 for aesni_mb")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
2022-02-12 10:26:38 +01:00
Piotr Bronowski
8c60a04985 crypto/ipsec_mb: fix premature dereference
This patch removes coverity defect CID 374380:
Null pointer dereferences  (REVERSE_INULL)

Coverity issue: CID 374380
Fixes: 918fd2f146 ("crypto/ipsec_mb: move aesni_mb PMD")
Cc: stable@dpdk.org

Signed-off-by: Piotr Bronowski <piotrx.bronowski@intel.com>
2022-02-12 10:26:38 +01:00
Kai Ji
845ec48ce0 test/crypto: fix out-of-place SGL in raw datapath
Fix out of place scatter gather list in sym raw datapath unit test.

Fixes: cd8166c28c ("test/crypto: add raw API test for dpaax")
Cc: stable@dpdk.org

Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-02-12 10:26:38 +01:00