Commit Graph

562 Commits

Author SHA1 Message Date
Anatoly Burakov
6afc4baf4f eal: use callbacks for power monitoring comparison
Previously, the semantics of power monitor were such that we were
checking current value against the expected value, and if they matched,
then the sleep was aborted. This is somewhat inflexible, because it only
allowed us to check for a specific value in a specific way.

This commit replaces the comparison with a user callback mechanism, so
that any PMD (or other code) using `rte_power_monitor()` can define
their own comparison semantics and decision making on how to detect the
need to abort the entering of power optimized state.

Existing implementations are adjusted to follow the new semantics.

Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Tested-by: David Hunt <david.hunt@intel.com>
Acked-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-07-09 21:13:13 +02:00
Shijith Thotton
44a2cebbd4 crypto/octeontx: add crypto adapter data path
Added support for crypto adapter OP_FORWARD mode.

As OcteonTx CPT crypto completions could be out of order, each crypto op
is enqueued to CPT, dequeued from CPT and enqueued to SSO one-by-one.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:28:39 +02:00
Shijith Thotton
8dc6c2f12e crypto/octeontx: add crypto adapter framework
Set crypto adapter event device slow-path call backs.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-07 21:28:39 +02:00
Pavan Nikhilesh
f092fb0540 event/octeontx2: configure aura backpressure
In poll mode driver of octeontx2 the RQ is connected to a CQ and it is
responsible for asserting backpressure to the CGX channel.
When event eth Rx adapter is configured, the RQ is connected to a event
queue, to enable backpressure we need to configure AURA assigned to a
given RQ to backpressure CGX channel.
Event device expects unique AURA to be configured per ethernet device.
If multiple RQ from different ethernet devices use the same AURA,
the backpressure will be disabled, application can override this
using devargs:

	-a 0002:0e:00.0,force_rx_bp=1

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-06-30 18:43:05 +02:00
Mattias Rönnblom
c93f222d45 event/dsw: flag adapters capabilities
Set the appropriate capability flags for the RX, crypto and timer
eventdev adapters to use.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Tested-by: Heng Wang <heng.wang@ericsson.com>
2021-06-30 16:20:19 +02:00
Ruifeng Wang
fdadccfa3f event/cnxk: fix clang build on Arm
clang-10 build issue log:
drivers/event/cnxk/cnxk_tim_worker.h:372:23:
warning: value size does not match register size
specified by the constraint and modifier [-Wasm-operand-widths]
                             : [rem] "=&r"(rem)
                                           ^
cnxk/cnxk_tim_worker.h:365:17: note: use constraint modifier "w"
                             "ldxr %[rem], [%[crem]]  \n"
                                             ^~~~~~
                                             %w[rem]

Changed variable type to match register size, which placates clang.

Fixes: 300b796262 ("event/cnxk: add timer arm routine")
Cc: stable@dpdk.org

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-06-30 15:03:20 +02:00
Nithin Dabilpuram
56cabfbf4a net/octeontx2: use runtime LSO format indices
Currently LSO formats setup initially are expected to be
compile time constants and start from 0.

Change the logic in slow and fast path so that LSO format indexes
are only determined runtime.

Fixes: 3b635472a9 ("net/octeontx2: support TSO offload")
Cc: stable@dpdk.org

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-30 04:14:05 +02:00
Timothy McDaniel
fcc5489c18 event/dlb2: select scalar dequeue by default
Optimized dequeue using x86 vector instructions was added
in 21.05, but due to limited testing the default has been
changed back to the scalar mode implementation. The vector mode
implementation can be enabled via the devargs option
"vector_opts_enabled=<y/Y>".

Fixes: 000a7b8e75 ("event/dlb2: optimize dequeue operation")

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2021-05-21 15:40:52 +02:00
Timothy McDaniel
d05072fc28 event/dlb2: fix extraction of HW scheduling type
The HW scheduling type was not being extracted properly
in the vector optimized dequeue path. It was also not
being recorded in the xstats.

Fixes: 000a7b8e75 ("event/dlb2: optimize dequeue operation")

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-21 15:40:07 +02:00
Timothy McDaniel
0e94408f00 event/dlb2: remove references to deferred scheduling
Deferred scheduling is a DLB v1.0 feature, and is not valid for
DLB v2.0 or v2.5.

Fixes: bc62748bd7 ("event/dlb2: add private data structures and constants")
Fixes: a2e4f1f5e7 ("event/dlb2: add dequeue and its burst variants")
Cc: stable@dpdk.org

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-21 15:40:02 +02:00
David Marchand
7a18887287 event/dpaa2: remove unused macros
Fixes: 653242c337 ("event/dpaa2: add self test")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2021-05-09 18:00:07 +02:00
David Marchand
eeded2044a log: register with standardized names
Let's try to enforce the convention where most drivers use a pmd. logtype
with their class reflected in it, and libraries use a lib. logtype.

Introduce two new macros:
- RTE_LOG_REGISTER_DEFAULT can be used when a single logtype is
  used in a component. It is associated to the default name provided
  by the build system,
- RTE_LOG_REGISTER_SUFFIX can be used when multiple logtypes are used,
  and then the passed name is appended to the default name,

RTE_LOG_REGISTER is left untouched for existing external users
and for components that do not comply with the convention.

There is a new Meson variable log_prefix to adapt the default name
for baseband (pmd.bb.), bus (no pmd.) and mempool (no pmd.) classes.

Note: achieved with below commands + reverted change on net/bonding +
edits on crypto/virtio, compress/mlx5, regex/mlx5

$ git grep -l RTE_LOG_REGISTER drivers/ |
  while read file; do
    pattern=${file##drivers/};
    class=${pattern%%/*};
    pattern=${pattern#$class/};
    drv=${pattern%%/*};
    case "$class" in
      baseband) pattern=pmd.bb.$drv;;
      bus) pattern=bus.$drv;;
      mempool) pattern=mempool.$drv;;
      *) pattern=pmd.$class.$drv;;
    esac
    sed -i -e 's/RTE_LOG_REGISTER(\(.*\), '$pattern',/RTE_LOG_REGISTER_DEFAULT(\1,/' $file;
    sed -i -e 's/RTE_LOG_REGISTER(\(.*\), '$pattern'\.\(.*\),/RTE_LOG_REGISTER_SUFFIX(\1, \2,/' $file;
  done

$ git grep -l RTE_LOG_REGISTER lib/ |
  while read file; do
    pattern=${file##lib/};
    pattern=lib.${pattern%%/*};
    sed -i -e 's/RTE_LOG_REGISTER(\(.*\), '$pattern',/RTE_LOG_REGISTER_DEFAULT(\1,/' $file;
    sed -i -e 's/RTE_LOG_REGISTER(\(.*\), '$pattern'\.\(.*\),/RTE_LOG_REGISTER_SUFFIX(\1, \2,/' $file;
  done

Signed-off-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-11 15:17:55 +02:00
Shijith Thotton
8a3d58c189 event/cnxk: add option to control timer adapters
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.

Example:
	--dev "0002:1e:00.0,tim_ring_ctl=[2-1023-1-0]"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:45:52 +02:00
Shijith Thotton
9db9330a71 event/cnxk: add timer adapter start and stop
Add event timer adapter start and stop functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:38:52 +02:00
Shijith Thotton
853623b9e5 event/cnxk: add timer stats
Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.

Example:
	--dev "0002:1e:00.0,tim_stats_ena=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:31:48 +02:00
Pavan Nikhilesh
20dc782a32 event/cnxk: add timer cancel
Add function to cancel event timer that has been armed.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:24:44 +02:00
Pavan Nikhilesh
5f644e1bd1 event/cnxk: add timer arm timeout burst
Add event timer arm timeout burst function.
All the timers requested to be armed have the same timeout.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:17:41 +02:00
Pavan Nikhilesh
300b796262 event/cnxk: add timer arm routine
Add event timer arm routine.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:10:32 +02:00
Pavan Nikhilesh
a353039018 event/cnxk: add TIM bucket operations
Add TIM bucket operations used for event timer arm and cancel.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:03:18 +02:00
Shijith Thotton
a66fa85668 event/cnxk: add options for timer chunk size and rings
Add devargs to control default chunk size and max numbers of
timer rings to attach to a given RVU PF.

Example:
	--dev "0002:1e:00.0,tim_chnk_slots=1024"
	--dev "0002:1e:00.0,tim_rings_lmt=4"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:56:05 +02:00
Shijith Thotton
9891f76b60 event/cnxk: add timer adapter info query
Add TIM event timer adapter info get function.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 07:49:05 +02:00
Pavan Nikhilesh
d9c93f1d9a event/cnxk: allow adapters to resize in-flights
Add internal SSO functions to allow event adapters to resize SSO buffers
that are used to hold in-flight events in DRAM.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:42:03 +02:00
Pavan Nikhilesh
1b06a817b8 event/cnxk: add option to disable NPA
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.

Example:
	--dev "0002:0e:00.0,tim_disable_npa=1"

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 07:35:00 +02:00
Shijith Thotton
0e792433d0 event/cnxk: create and free timer adapter
When the application calls timer adapter create the following is used:
- Allocate a TIM LF based on number of LF's provisioned.
- Verify the config parameters supplied.
- Allocate memory required for
	* Buckets based on min and max timeout supplied.
	* Allocate the chunk pool based on the number of timers.

On Free:
	- Free the allocated bucket and chunk memory.
	- Free the TIM lf allocated.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 07:27:59 +02:00
Shijith Thotton
dd519f83dd event/cnxk: add timer adapter capabilities
Add function to retrieve event timer adapter capabilities.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:20:58 +02:00
Shijith Thotton
3d9a7181e4 event/cnxk: support timer
Add event timer adapter a.k.a TIM initialization on SSO probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:13:54 +02:00
Pavan Nikhilesh
b5a52c9d97 event/cnxk: add event port and queue xstats
Add support for retrieving statistics from SSO HWS and HWGRP.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 07:06:53 +02:00
Pavan Nikhilesh
2351506401 event/cnxk: add SSO selftest and dump
Add selftest to verify sanity of SSO and also add function to
dump internal state of SSO.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:59:52 +02:00
Shijith Thotton
5b4576e2df event/cnxk: add device stop and close
Add event device stop and close callback functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 06:52:50 +02:00
Shijith Thotton
910da32c53 event/cnxk: add device start
Add eventdev start function along with few cleanup API's to maintain
sanity.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 06:45:55 +02:00
Pavan Nikhilesh
6c04198af4 event/cnxk: add SSO GWS dequeue fast path
Add SSO GWS event dequeue fastpath functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:38:56 +02:00
Pavan Nikhilesh
47ef22f794 event/cnxk: add SSO GWS enqueue fast path
Add SSO GWS fastpath event device enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:31:42 +02:00
Pavan Nikhilesh
e239e0d3fa event/cnxk: add SSO HW device operations
Add SSO HW device operations used for enqueue/dequeue.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:24:26 +02:00
Pavan Nikhilesh
7ffa737996 event/cnxk: add option to configure getwork mode
Add devargs to configure the platform specific getwork mode.

CN9K getwork mode by default is set to use dual workslot mode.
Add option to force single workslot mode.
Example:
	--dev "0002:0e:00.0,single_ws=1"

CN10K supports multiple getwork prefetch modes, by default the
prefetch mode is set to none.
Add option to select getwork prefetch mode
Example:
	--dev "0002:1e:00.0,gw_mode=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 06:17:19 +02:00
Shijith Thotton
6223ede203 event/cnxk: add event port link and unlink
Add platform specific event port, queue link and unlink APIs.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:10:17 +02:00
Shijith Thotton
97a05c1fe6 event/cnxk: add port config
Add SSO HWS a.k.a event port setup and release functions.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:03:17 +02:00
Shijith Thotton
38c2e3240b event/cnxk: add option to control SSO HWGRP QoS
SSO HWGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO HWGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to HWGRPs based on a preconfigured threshold.
We can control the QoS of SSO HWGRP by modifying the above mentioned
thresholds. HWGRPs that have higher importance can be assigned higher
thresholds than the rest.

Example:
        --dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]

Qx  -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.

The values need to be expressed in terms of percentages, 0 represents
default.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 05:56:16 +02:00
Shijith Thotton
e656d40fd1 event/cnxk: add option for in-flight buffer count
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.

Example:
        --dev "0002:0e:00.0,xae_cnt=8192"

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:49:19 +02:00
Pavan Nikhilesh
b85105230d event/cnxk: allocate event in-flight buffers
Allocate buffers in DRAM that hold inflight events.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:42:18 +02:00
Shijith Thotton
d3408a33bc event/cnxk: add event queue config
Add setup and release functions for event queues i.e.
SSO HWGRPs.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:35:21 +02:00
Shijith Thotton
b417f23252 event/cnxk: add platform specific device config
Add platform specific event device configuration that attaches the
requested number of SSO HWS(event ports) and HWGRP(event queues) LFs
to the RVU PF/VF.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:28:24 +02:00
Pavan Nikhilesh
5512c7de85 event/cnxk: add common configuration validation
Add configuration validation, port and queue configuration
functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 05:21:25 +02:00
Pavan Nikhilesh
95f42ef92c event/cnxk: add platform specific device probe
Add platform specific event device probe and remove, also add
event device info get function.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 05:14:24 +02:00
Shijith Thotton
334883ffa5 event/cnxk: add device capabilities
Add the info_get function to return details on the queues, flow,
prioritization capabilities, etc. which this device has.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:07:25 +02:00
Pavan Nikhilesh
8558dcaa05 event/cnxk: add build infra and device setup
Add meson build infra structure along with the event device
SSO initialization and teardown functions.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2021-05-04 05:00:18 +02:00
Timothy McDaniel
000a7b8e75 event/dlb2: optimize dequeue operation
Convert code to use x86 vector instructions, thereby significantly
improving dequeue performance.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
2021-05-03 14:21:23 +02:00
Timothy McDaniel
7be66a3b9d event/dlb2: update config defines as runtime options
The new devarg names and their default values
are listed below. The defaults have not changed, and
none of these parameters are accessed in the fast path.

poll_interval=1000
sw_credit_quantai=32
default_depth_thresh=256

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:31 +02:00
Timothy McDaniel
37e741d454 event/dlb2: update xstats for v2.5
Add DLB v2.5 specific information to xstats, such as metrics for the new
credit scheme.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:31 +02:00
Timothy McDaniel
d4a06a3931 event/dlb2: use new combined register map
All references to the old register map have been removed,
so it is safe to rename the new combined file that supports
both DLB v2.0 and DLB v2.5. Also fixed all places where this
file is included.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:31 +02:00
Timothy McDaniel
037a616762 event/dlb2: use new implementation of HW types header
As support for DLB v2.5 was added, modifications were made to
dlb_hw_types_new.h, but the old file needed to be preserved during
the port in order to meet the requirement that individual patches in
a series each compile successfully. Since the DLB v2.5 support is
completely integrated, it is now safe to remove the old (original)
file, as well as the DLB2_USE_NEW_HEADERS define that was used to
control which version of the file was to be included in certain
source files.
It is now safe to rename the new file, and use it unconditionally
in all DLB source files.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00