Commit Graph

1288 Commits

Author SHA1 Message Date
Dekel Peled
ff44839929 net/mlx5: fix dirty array of actions
Previous patch changed the format of struct
mlx5_flow_dv_modify_hdr_resource, to use a flexible array for
modification actions.
In __flow_dv_translate() a union was defined with item of this struct,
and an array of maximal possible size.
Array elements are filled in several functions.
In function flow_dv_convert_action_set_reg(), array element is filled
partially, while the other fields of this array element are left
uninitialized.
This may cause failure of flow_dv_modify_hdr_resource_register()
when calling driver function with the 'dirty' array.

This patch updates flow_dv_convert_action_set_reg(), setting the
selected array element fields while clearing the other fields.
Other functions that fill the same array elements are also updated
for clarity and proofing future use.

Fixes: 024e95759c ("net/mlx5: fix modify actions support limitation")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 11:15:53 +01:00
Michael Baum
4f8e6befe7 net/mlx5: fix memory regions release deadlock
The mpx5 PMD maintains the list of devices for those the memory
operation callback routines must be invoked to keep the device MRs (MR
is the entity backing the hardware DMA transactions) consistent with the
mapped memory.
Each device context in the list is protected with dedicated lock on per
device basis, which might be taken inside the callback routine.

When device is closing the PMD frees all MRs by calling
mlx5_mr_release(), that might call rte_free() under the taken device
lock.  If this rte_free call triggers the entire memory segment freeing
it, in its turn, invokes the callback routine and attempt to take the
lock inside this one causes the deadlock.

The patch proposes the remove the device from the callback list first
and then call mlx5_mr_release() and free the remaining device MRs
explicitly.

Fixes: 0e3d0525b2 ("net/mlx5: fix memory event callback list")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-05 11:15:53 +01:00
Alexander Kozyrev
26f1bae837 net/mlx5: add Rx/Tx burst mode info
Get a burst mode information for Rx/Tx queues in mlx5.
Provide callback functions to show this information in
a "show rxq info" and "show txq info" output.

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:21 +01:00
Raslan Darawsheh
90456726eb net/mlx5: fix VXLAN-GPE item translation
Currently, when using VXLAN-GPE or VXLAN item in the flow
both are being treated the same with flags 0x8 in VXLAN
header. Which mean the matching of the item VXLAN-GPE
will match any VXLAN packet.

This fixes the translation of VXLAN GPE item into PMD flow
item. Which will by default set the flags to VXLAN-GPE
to be 0xc.

Fixes: 3d69434113 ("net/mlx5: add Direct Verbs validation function")
Cc: stable@dpdk.org

Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-05 09:51:21 +01:00
Alexander Kozyrev
8e46d4e18f common/mlx5: improve assert control
Use the MLX5_ASSERT macros instead of the standard assert clause.
Depends on the RTE_LIBRTE_MLX5_DEBUG configuration option to define it.
If RTE_LIBRTE_MLX5_DEBUG is enabled MLX5_ASSERT is equal to RTE_VERIFY
to bypass the global CONFIG_RTE_ENABLE_ASSERT option.
If RTE_LIBRTE_MLX5_DEBUG is disabled, the global CONFIG_RTE_ENABLE_ASSERT
can still make this assert active by calling RTE_VERIFY inside RTE_ASSERT.

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:21 +01:00
Alexander Kozyrev
0afacb04f5 common/mlx5: remove NDEBUG
Use the RTE_LIBRTE_MLX5_DEBUG configuration flag to get rid of dependency
on the NDEBUG definition. This is a preparation step to switch
from standard assert clauses to DPDK RTE_ASSERT ones in MLX5 driver.

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:21 +01:00
Viacheslav Ovsiienko
cacb44a099 net/mlx5: add no-inline Tx flag
This patch adds support for dynamic flag that hints transmit
datapath do not copy data to the descriptors. This flag is
useful when data are located in the memory of another (not NIC)
physical device and copying to the host memory is undesirable.

This hint flag is per mbuf for multi-segment packets.

This hint flag might be partially ignored if:

- hardware requires minimal data header to be inline into
  descriptor, it depends on the hardware type and its configuration.
  In this case PMD copies the minimal required number of bytes to
  the descriptor, ignoring the no inline hint flag, the rest of data
  is not copied.

- VLAN tag insertion offload is requested and hardware does not
  support this options. In this case the VLAN tag is inserted by
  software means and at least 18B are copied to descriptor.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-05 09:51:20 +01:00
Ori Kam
efa79e68c8 net/mlx5: support fine grain dynamic flag
The inline feature is designed to save PCI bandwidth by copying some
of the data to the wqe. This feature if enabled works for all packets.

In some cases when using external memory, the PCI bandwidth is not
relevant since the memory can be accessed by other means.

This commit introduce the ability to control the inline with mbuf
granularity.

In order to use this feature the application should register the field
name, and restart the port.

Signed-off-by: Ori Kam <orika@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
fbde43310f net/mlx5: make FDB default rule optional
There are RDMA-CORE versions which are not supported multi-table for
some Mellanox mlx5 devices.

Hence, the optimization added in commit [1] which forwards all the FDB
traffic to table 1 cannot be configured.

Make the above optimization optional:
Do not fail when either table 1 cannot be created or the jump rule
(all =>jump to table 1) is not configured successfully.
In this case, all the flows will be configured to table 0.

[1] commit b67b4ecbde ("net/mlx5: skip table zero to improve
insertion rate")

Cc: stable@dpdk.org

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
654810b568 common/mlx5: share Netlink commands
Move Netlink mechanism and its dependencies from net/mlx5 to
common/mlx5 in order to be ready to use by other mlx5 drivers.

The dependencies are BITFIELD defines, the ppc64 compilation workaround
for bool type and the function mlx5_translate_port_name.

Update build mechanism accordingly.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
f22442cb5d net/mlx5: reduce Netlink commands dependencies
As an arrangment for Netlink command moving to the common library,
reduce the net/mlx5 dependencies.

Replace ethdev class command parameters.

Improve Netlink sequence number mechanism to be controlled by the
mlx5 Netlink mechanism.

Move mlx5_nl_check_switch_info to mlx5_nl.c since it is the only one
which uses it.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
c12671e3b7 net/mlx5: separate Netlink command interface
The Netlink commands interfaces is included in the mlx5.h file with a
lot of other PMD interfaces.

As an arrangement to make the Netlink commands shared with different
PMDs, this patch moves the Netlink interface to a new file called
mlx5_nl.h.

Move non Netlink pure vlan commands from mlx5_nl.c to the
mlx5_vlan.c.

Rename Netlink commands and structures to use prefix mlx5_nl.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
d768f324d6 net/mlx5: select driver by class device argument
There might be a case that one Mellanox device can be probed by
multiple mlx5 drivers.

One case is that any mlx5 vDPA device can be probed by both net/mlx5
and vdpa/mlx5.

Add a new mlx5 common API to get the requested driver by devargs:
class=[net/vdpa].

Skip net/mlx5 PMD probing while the device is selected to be probed by
the vDPA driver.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
53ec4db032 common/mlx5: support DevX indirect mkey creation
Add option to create an indirect mkey by the current
mlx5_devx_cmd_mkey_create command.

Indirect mkey points to set of direct mkeys.
By this way, the HW\SW can reference fragmented memory by one object.

Align the net/mlx5 driver usage in the above command.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
8fc7421759 common/mlx5: share CQ entry check
The CQE has owner bit to indicate if it is in SW control or HW.

Share a CQE check for all the mlx5 drivers.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
e415f348e3 common/mlx5: share devices information
Move the vendor information, vendor ID and device IDs from net/mlx5 PMD
to the common mlx5 file.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
93e3098296 common/mlx5: share PCI device detection
Move PCI detection by IB device from mlx5 PMD to the common code.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
7b4f1e6bd3 common/mlx5: introduce common library
A new Mellanox vdpa PMD will be added to support vdpa operations by
Mellanox adapters.

This vdpa PMD design includes mlx5_glue and mlx5_devx operations and
large parts of them are shared with the net/mlx5 PMD.

Create a new common library in drivers/common for mlx5 PMDs.
Move mlx5_glue, mlx5_devx_cmds and their dependencies to the new mlx5
common library in drivers/common.

The files mlx5_devx_cmds.c, mlx5_devx_cmds.h, mlx5_glue.c,
mlx5_glue.h and mlx5_prm.h are moved as is from drivers/net/mlx5 to
drivers/common/mlx5.

Share the log mechanism macros.
Separate also the log mechanism to allow different log level control to
the common library.

Build files and version files are adjusted accordingly.
Include lines are adjusted accordingly.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
543e218fa5 net/mlx5: separate DevX commands interface
The DevX commands interface is included in the mlx5.h file with a lot
of other PMD interfaces.

As an arrangement to make the DevX commands shared with different PMDs,
this patch moves the DevX interface to a new file called mlx5_devx_cmds.h.

Also remove shared device structure dependency on DevX commands.

Replace the DevX commands log mechanism from the mlx5 driver log
mechanism to the EAL log mechanism.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Suanming Mou
792e749e92 net/mlx5: fix register usage in meter
Flow with meter will split to three subflows, the prefix subflow with
meter action do the color, the meter subflow  filter the packets, the
suffix subflow do all the left actions for packets pass the filter.
Both the color and the subflow match between prefix and suffix use the
register to store the tag.

For some of the NICs with meter color register share capability, it
only uses 8 LSB of the register for color, the left 24 MSB can be used
for flow id match between meter prefix subflow and suffix subflow.

Currently, one entire register is allocated for flow matching which
causes the NICs with limited registers don't have enough register for
other matching.

Add the meter color share capability checking to fix lacking of
registers issue.

Fixes: 9ea9b049a9 ("net/mlx5: split meter flow")
Cc: stable@dpdk.org

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Suanming Mou
30a3687d99 net/mlx5: support maximum flow id allocation
The id allocated is for the register unique id match. Some registers may
not use the full 32 bits. Add the maximum id to avoid allocate id over
the register restriction.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Shiri Kuzin
0e2ceb639d net/mlx5: fix ICMPv6 header rewrite actions
The ConnectX-5 HW cannot calculate the checksum for ICMPv6,
therefore flows with pattern 'ipv6 proto is 58' with actions that change
the header should be rejected. the actions that change the header
in this type of flow are 'set_ipv6_src' and 'set_ipv6_dst'.

Fixes: 4bb14c83df ("net/mlx5: support modify header using Direct Verbs")
Cc: stable@dpdk.org

Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
813f9bfa12 net/mlx5: fix setting of port ID for egress rules
Previous patch fixed the setting of port-id for eswitch rules, which
are ingress only.
This patch expands the fix, to support NIC rules as well, which can
be ingress or egress.

Fixes: ce777b147b ("net/mlx5: fix E-Switch flow without port item")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-02-05 09:51:20 +01:00
Eli Britstein
27767e217f net/mlx5: fix zero out UDP checksum in encap data
The cited commit zeroed the UDP checksum for raw-encap case.
Add the same handling for vxlan-encap case.

Fixes: bf1d7d9a03 ("net/mlx5: zero out UDP checksum in encapsulation")
Cc: stable@dpdk.org

Signed-off-by: Eli Britstein <elibr@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
99d49f47b3 net/mlx5: fix build with clang 3.4.2
Compilation massage example:
"dpdk/drivers/net/mlx5/mlx5_flow_dv.c:1087:10: error: comparison of
unsigned enum expression < 0 is always false
[-Werror,-Wtautological-compare]
        if (reg < 0)
            ~~~ ^ ~
"

enum modify_reg holds only non-negative integers and in some places in
the code it was used to be compared with negative value, hence
compilation was failed.

Change all thus places to use integer instead of enum modify_reg.

Fixes: 3e8edd0ef8 ("net/mlx5: update metadata register ID query")
Fixes: 55deee1715 ("net/mlx5: extend flow mark support")
Cc: stable@dpdk.org

Signed-off-by: Matan Azrad <matan@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
41dcaff4ad net/mlx5: update description of validation functions
Description of several functions is not accurate.
This patch updates the description, parameter names etc.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
5a2ab34d81 net/mlx5: fix VLAN VID action validation
Validation function of 'set VLAN VID' action checks twice for existing
same action in flow rule.

This patch updates the validation function logic, to check the same
restrictions more efficiently.

Fixes: 5f163d520c ("net/mlx5: support modify VLAN ID on existing VLAN header")
Fixes: b8c0372bc5 ("net/mlx5: fix set VLAN ID/PCP in new header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
581476d641 net/mlx5: fix pop VLAN action validation
Validation function of 'POP VLAN' action includes check for other
'POP VLAN' actions present in flow.
It doesn't check for 'PUSH VLAN' actions present in flow.

This patch adds check for 'PUSH VLAN' actions present in flow.

Fixes: b41e47da25 ("net/mlx5: support pop flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
159e9217a5 net/mlx5: block pop VLAN action on Tx
Add missing check in validation function of 'pop VLAN' action.
Action is not allowed for egress flow rules.

Fixes: b41e47da25 ("net/mlx5: support pop flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
55060e62e4 net/mlx5: block push VLAN action on Rx
Add missing check in validation function of 'push VLAN' action.
Action is not allowed for ingress flow rules.

Fixes: 9aee7a8418 ("net/mlx5: support push flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
70faf9ae0a net/mlx5: unify validation of drop action
According to PRM: "Drop action is mutually-exclusive with any other
action, except for Count action".
In current code this limitation is checked separately in validation
function of each action.

This patch removes the discrete checks, and adds a single check common
for all actions.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
5507cb7927 net/mlx5: allow push VLAN without VID
Currently the push VLAN action requires a VID value, either from
existing VLAN item, or from following 'set VLAN vid' action.

This patch removes this limitation, allowing a push VLAN action with
vid value 0.

Fixes: b8c0372bc5 ("net/mlx5: fix set VLAN ID/PCP in new header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
82e4aca2ca net/mlx5: fix bit mask to validate push VLAN
Validation function of 'push VLAN' action uses (POP_VLAN or PUSH_VLAN)
actions flags, instead of using a mask of both flags.

This patch replaces it to use existing VLAN_ACTIONS mask.

Fixes: 9aee7a8418 ("net/mlx5: support push flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
a2268a4cfb net/mlx5: fix check for VLAN actions
Flow validation function includes, after all items and actions are
validated discretely, a check for VLAN and VXLAN actions.
This check is incorrect and redundant.

This patch removes the invalid check from validation function.
Check is incorrect, action_flags bit map is checked against
items mask MLX5_FLOW_LAYER_TUNNEL.
Check is also redundant, because VLAN push/pop actions can be used
together with packet reformat actions.

Fixes: b41e47da25 ("net/mlx5: support pop flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
06742ada54 net/mlx5: fix masks of encap and decap actions
PUSH_VLAN and POP_VLAN actions flags were added to ENCAP_ACTIONS
and DECAP_ACTIONS bit masks, respectively.
This is incorrect, because VLAN actions are considered as 'modify
header' actions, not as 'packet reformat' actions.

This patch removes the PUSH_VLAN and POP_VLAN actions flags from
ENCAP_ACTIONS and DECAP_ACTIONS bit masks.

Fixes: 9aee7a8418 ("net/mlx5: support push flow action on VLAN header")
Fixes: b41e47da25 ("net/mlx5: support pop flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Bing Zhao
024e95759c net/mlx5: fix modify actions support limitation
In the root table, there is some limitation of total number of header
modify actions, 16 or 8 for each. But in other tables, there is no
such strict limitation. In an IPv6 case, the IP fields modifying
will occupy more actions than that in IPv4, so the total support
number should be increased in order to support as many actions as
possible for an IPv6 + TCP packet.
And in the meanwhile, the memory consumption should also be taken
into consideration because sometimes only several actions are needed.
The root table checking could also be done in low layer driver and
the error code will be returned if the actions number is over the
maximal supported value.

Fixes: 0e9d000276 ("net/mlx5: check maximum modify actions number")
Cc: stable@dpdk.org

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-01-20 18:02:17 +01:00
Suanming Mou
64927f72a7 net/mlx5: fix meter suffix flow
The meter suffix flow item pointer restore is not correct to decrease
a fixed value. The incorrect operation will cause incorrect match to
the meter suffix flow, the flow create will fail once the magic number
in the wrong offset memory start with RTE_FLOW_ITEM_TYPE_END.
The pointer should decrease the real offset it increases.

Set the decrease value to the real offset the pointer increases to fix
the issue.

Fixes: 9ea9b049a9 ("net/mlx5: split meter flow")
Cc: stable@dpdk.org

Reported-by: Tonghao Zhang <xiangxia.m.yue@gmail.com>
Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-01-20 18:02:17 +01:00
Dekel Peled
f31d7a0171 net/mlx5: support GTP
This patch adds to MLX5 PMD support of matching on GTP item,
fields msg_type and teid, according to RFC [1].
GTP item validation and translation functions are added and called.
GTP tunnel type is added to supported tunnels.

[1] http://mails.dpdk.org/archives/dev/2019-December/152799.html

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-01-20 18:02:17 +01:00
Dekel Peled
70ccb60568 net/mlx5: optimize Rx hash fields conversion
Previous fix added translation of Rx hash fields to PRM format.

This patch optimizes the fix, to perform value translation only
if value is not zero.
In case value is zero, there is no need to translate it.

Fixes: c3e33304a7 ("net/mlx5: fix setting of Rx hash fields")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-01-20 18:02:17 +01:00
Viacheslav Ovsiienko
89ef76db3b net/mlx5: engage free on completion queue
The free on completion queue keeps the indices of elts array,
all mbuf stored below this index should be freed on arrival
of normal send completion. In debug version it also contains
an index of completed transmitting descriptor (WQE) to check
queues synchronization.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-20 18:02:17 +01:00
Viacheslav Ovsiienko
6449068818 net/mlx5: add free on completion queue
The new software manged entity is introduced in Tx datapath
- free on completion queue. This queue keeps the information
how many buffers stored in elts array must freed on send
completion. Each element of the queue contains transmitting
descriptor index to be in synch with completion entries (in
debug build only) and the index in elts array to free buffers.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-20 18:02:17 +01:00
Viacheslav Ovsiienko
1fd9af05e4 net/mlx5: update Tx error handling routine
This is preparation step, we are going to store the index
of elts to free on completion in the dedicated free on
completion queue, this patch updates the elts freeing routine
and updates Tx error handling routine to be synced with
coming new queue.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-20 18:02:17 +01:00
Viacheslav Ovsiienko
8b581c690a net/mlx5: move Tx complete request routine
The complete request flag is set once per Tx burst call,
the code of appropriate routine moved to the end of sending
loop. This is preparation step to remove WQE reserved field
usage to store index of elts to free.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-20 18:02:17 +01:00
Viacheslav Ovsiienko
bdb8e5b1ea net/mlx5: allow allocated mbuf with external buffer
In the Rx datapath the flags in the newly allocated mbufs
are all explicitly cleared but the EXT_ATTACHED_MBUF must be
preserved. It would allow to use mbuf pools with pre-attached
external data buffers.

The vectorized rx_burst routines are updated in order to
inherit the EXT_ATTACHED_MBUF from mbuf pool private
RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF flag.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-20 23:39:11 +01:00
Xueming Li
e6cdc54cc0 net/mlx5: add socket server for external tools
Add pmd unix socket server to enable external tool applications to
trigger flow dump.

Socket path:
	/var/tmp/dpdk_mlx5_<pid>
Socket format:
	io_raw: port_id of uint16
	file: file descriptor of int

Signed-off-by: Xueming Li <xuemingl@mellanox.com>
Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-01-17 19:59:19 +01:00
Xiaoyu Min
f6d7202402 net/mlx5: support flow dump API
Dump fdb/nic_rx/nic_tx raw flow data into specified file.

Signed-off-by: Xueming Li <xuemingl@mellanox.com>
Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-01-17 19:59:19 +01:00
Viacheslav Ovsiienko
39c09c22e5 net/mlx5: fix metadata item endianness conversion
The mlx5 datapath does not implement any endianness conversions
for the metadata being sent and received to provide the better
performance (because these conversions would be performed for
each packet). These metadata are also involved into flow processing
(there might be some flows matching on metadata patterns or setting
the new metadata values) inside the NIC. It order to configure
hardware in correct way all necessary endianness conversions are
done by rte_flow handling code (only once on flow creation). This
patch fixes one of these conversions for the little-endian hosts
in case if META/MARK items are less than 32 bits.

Fixes: acfcd5c52f ("net/mlx5: update meta register matcher set")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-17 19:59:19 +01:00
Viacheslav Ovsiienko
fde4341b66 net/mlx5: fix matcher field usage for metadata entities
Matcher is flow table related structure providing the flow pattern
to be translated directly in hardware controlling data. This structure
includes the metadata register c0 field, that might be engaged to
support META and MARK related flow items and actions. Also, this
register might be used by kernel to specify the source vport index.
In this case (if kernel uses the field) the register c0 is split
into two 16-bit subfields - one for META/MARK items and another
to handle vport.

The actual configuration is queried by PMD from kernel in runtime
and depending on the mask returned by kernel the PMD can use upper
or lower half of register c0 field. This patch adds the missing
support for upper half. This missed support caused the non-operational
META/MARK items on some kernel configurations.

Fixes: e554b672aa ("net/mlx5: support flow tag")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-17 19:59:19 +01:00
Viacheslav Ovsiienko
abde8206f2 net/mlx5: fix shared metadata matcher field setup
Matcher is flow table related structure providing the flow pattern
to be translated directly in hardware controlling data. Some fields
in this structure might be split (by software) between multiple items.

For example, the metadata register c0 field in the matcher might be
split into two independent subfields - the source vport index and
META item value. These subfields have no permanent assigned masks,
the actual configuration is queried from the kernel drivers in
runtime. To handle source vport value (the port of e-Switch which
is origin of the packet) the kernel might use the dedicated vport
field in the matcher or the part of register c0 field, depending
on configuration.

To setup the matcher structure fields the macro MLX5_SET is used.
MLX5_SET configures the specified 32-bit field as whole entity.
For metadata register c0 we should take into account the provided
mask in order to configure the specified subfield bits only,
otherwise setting vport overrides the META values and vice versa.

Fixes: acfcd5c52f ("net/mlx5: update meta register matcher set")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-17 19:59:19 +01:00
Viacheslav Ovsiienko
7b836d8443 net/mlx5: fix doorbell register offset type
The doorbell register is mapped using mmap() and offset
must have off_t instead of unsigned int. Bug is not critical
due to only least significant bits of offset are currently
tested to determine mapping mode.

Fixes: 8409a28573 ("net/mlx5: control transmit doorbell register mapping")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-17 19:46:26 +01:00