A pointer has already been dereferenced before checking if it is NULL.
It doesn't make any sense, so correct to avoid it.
Coverity issue: 365290
Fixes: f57ebdae3cd0 ("net/iavf: support eCPRI message type 0 for RSS")
Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Optimize Tx path by using AVX512 instructions and vectorize the
tx free bufs process.
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Add AVX512 support for i40e PMD. This patch adds i40e_rxtx_vec_avx512.c
to support i40e AVX512 vPMD.
This patch aims to enable AVX512 on i40e vPMD. Main changes are focus
on Rx path compared with AVX2 vPMD.
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
As eal parameter --force-max-simd-bitwidth is already introduced,
to make it more clear when setting rx/tx function, remove
devarg use-latest-supported-vec support.
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
I40E_DEV_ID_SFP_I_X722 does not support 802.1ad frames ability,
so I40E_HW_FLAG_802_1AD_CAPABLE should not be set.
The patch also correct the comment for I40E_HW_FLAG_802_1AD_CAPABLE
configure.
Fixes: 9efa8d28b4da ("net/i40e: fix SFP X722 with FW4.16")
Cc: stable@dpdk.org
Signed-off-by: Weifeng Li <liweifeng96@126.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Fixes some spelling errors in app logs and help text.
Fixes: 7da018731c56 ("app/crypto-perf: add help option")
Fixes: f8be1786b1b8 ("app/crypto-perf: introduce performance test application")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
This patch adds support for AES_CMAC integrity in non-security mode.
This patch modifies the camm flib to handles the AES CMAC
without conflicting the proto ALG operations. i.e. by creating
another ALG operation routine.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
If for some reason the queue is not close properly,
specially in test cases.
The QUEUE retire prints are flooding the screen.
They are not really required as WARNING.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
The descriptor sharing needed to be changed for ZUC+ZUC as we
were getting invalid CHA combination error due to sharing
being done on DECOs simultaneously.
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
This patch adds test case for AES-XCBC hash only for
Digest and Digest-verify
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
CCP use vdev framework, and vdev framework don’t support IOMMU.
Adding custom IOMMU support for AMD CCP driver.
Signed-off-by: Amaranath Somalapuram <asomalap@amd.com>
This patch adds test cases for testing functionality of
enqueue and dequeue callback mechanism.
Signed-off-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
This patch adds APIs to add/remove callback functions on crypto
enqueue/dequeue burst. The callback function will be called for
each burst of crypto ops received/sent on a given crypto device
queue pair.
Signed-off-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Support for aes-cbc sha256-128-hmac is added in lookaside protocol
mode. The functionality is verified using ipsec-secgw application.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Support for aes-cbc sha1-hmac is added in lookaside protocol
mode. The functionality is verified using ipsec-secgw application.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
CN98xx SoC comes up with two CPT blocks wrt
CN96xx, CN93xx, to achieve higher performance.
Adding support to allocate all LFs of VF with even BDF from CPT0
and all LFs of VF with odd BDF from CPT1.
If LFs are not available in one block then they will be allocated
from alternate block.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Adding ESN and anti-replay support for lookaside IPsec.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Adding changes to make anti-replay routine common to both inline and
lookaside IPsec.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
The RegEx engine has no limitation on number of queues.
This commits modifies the max supported queues reported to the application.
Fixes: fbc8c7003b93 ("regex/mlx5: add completion queue creation")
Cc: stable@dpdk.org
Signed-off-by: Ori Kam <orika@nvidia.com>
The high priority match request flags means that the
RegEx engine should stop on the first match.
This commit add this flag check to the RegEx engine.
Signed-off-by: Ori Kam <orika@nvidia.com>
In order to know which groups in the RegEx engine
should be used there is a need to check the req_flags.
This commit adds the missing check.
Fixes: 4d4e245ad637 ("regex/mlx5: support enqueue")
Cc: stable@dpdk.org
Signed-off-by: Ori Kam <orika@nvidia.com>
The rof file holds programming instructions for
a given HW version.
In order to support future generation of HW it
was decided that the rof file will hold number
of rule configurations, and the driver will use
the one that matches the HW version.
In current code we force sync after each write block.
This has impact on performance.
The solution is to move the sync to the end of the
entire programming sequence.
Signed-off-by: Ori Kam <orika@nvidia.com>
Due to Kernel requirement the memory allocated must be aligned to 2M.
Fixes: b34d816363b5 ("regex/mlx5: support rules import")
Cc: stable@dpdk.org
Signed-off-by: Ori Kam <orika@nvidia.com>
Checkpatch prefers 'unsigned int' over bare 'unsigned'.
Reword the error messages for brevity and clarity
so they don't have to be split across multiple lines.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
The device string has an existing size in rte_dev.h
use that instead of defining our own.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Use rte_pktmbuf_free_bulk instead of loop when freeing
packets.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Update the contributing guidelines to describe GitHub Actions first and
add a warning about Travis usage.
Fixes: 87009585e293 ("ci: hook to GitHub Actions")
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Aaron Conole <aconole@redhat.com>
In l3fwd no of transmit queues is calculated based on no of
lcores with which it is launched. Hence maximum no of tx
queues possible per port should depend on RTE_MAX_LCORE value.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
When we're attaching fbarrays in secondary processes, we check for
whether the intended memory address for the fbarray is already in use by
some other, local fbarray. However, the check for end-overlap (i.e. to
see if our memory area's end overlaps with some other fbarray) is
incorrectly counting end offset as part of the overlap. Fix the check.
Fixes: 5b61c62cfd76 ("fbarray: add internal tailq for mapped areas")
Cc: stable@dpdk.org
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Tested-by: Zhihong Peng <zhihongx.peng@intel.com>
When no hugepages are found, we log a message about it, but we never
specify on which node. We also implicitly declare the page size based
on the directory name, but that's not very user friendly.
Fix both by changing the text of the message to note the NUMA node (if
applicable) and explicitly mention page size in kilobytes.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
The ticketlock test is fast and should be run all the time.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Aaron Conole <aconole@redhat.com>
The Tx buffer may overflow when there is more than one port.
Fixes: 002ade70e933 ("app/test: measure cycles per packet in Rx/Tx")
Cc: stable@dpdk.org
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
Tested-by: Wei Ling <weix.ling@intel.com>
Implement support for the power management API by implementing a
`get_monitor_addr` function that will return an address of an RX ring's
status bit.
Signed-off-by: Liang Ma <liang.j.ma@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Implement support for the power management API by implementing a
`get_monitor_addr` function that will return an address of an RX ring's
status bit.
Signed-off-by: Liang Ma <liang.j.ma@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
Implement support for the power management API by implementing a
`get_monitor_addr` function that will return an address of an RX ring's
status bit.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Signed-off-by: Liang Ma <liang.j.ma@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Add a simple API to allow getting the monitor conditions for
power-optimized monitoring of the Rx queues from the PMD, as well as
release notes information.
Signed-off-by: Liang Ma <liang.j.ma@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Now that we have everything in a C file, we can store the information
about our sleep, and have a native mechanism to wake up the sleeping
core. This mechanism would however only wake up a core that's sleeping
while monitoring - waking up from `rte_power_pause` won't work.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Currently, the "sync" version of power monitor intrinsic is supposed to
be used for purposes of waking up a sleeping core. However, there are
better ways to achieve the same result, so remove the unneeded function.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Instead of passing around pointers and integers, collect everything
into struct. This makes API design around these intrinsics much easier.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Currently, the API documentation mandates that if the user wants to use
the power management intrinsics, they need to call the
`rte_cpu_get_intrinsics_support` API and check support for specific
intrinsics.
However, if the user does not do that, it is possible to get illegal
instruction error because we're using raw instruction opcodes, which may
or may not be supported at runtime.
Now that we have everything in a C file, we can check for support at
startup and prevent the user from possibly encountering illegal
instruction errors.
We also add return values to the API's as well, because why not.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Currently, power intrinsics are inline functions. Make them part of the
ABI so that we can have various internal data associated with them
without exposing said data to the outside world.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Some Arm SoCs are not NUMA systems. Add the capability to disable NUMA
for cross build and disable NUMA in Arm cross files.
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Tested-by: Vimal Chungath <vcchunga@amazon.com>
Tested-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Add support for setting core count and numa nodes in cross files. The
values specified in cross files will override the default values.
Also add missing default values to Arm config.
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Tested-by: Vimal Chungath <vcchunga@amazon.com>
Tested-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Letting the compiler decide is going to yield the best results for
native builds, so use native machine args usable for both GCC and Clang.
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Tested-by: Vimal Chungath <vcchunga@amazon.com>
Tested-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Use generic configuration for the only build where it makes sense - the
generic build. For other builds, if we don't know either of implementer
ID or part number, the build is not supported.
Add part numbers to cross files where fallback to generic configuration
is assumed.
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Tested-by: Vimal Chungath <vcchunga@amazon.com>
Tested-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Use dictionary lookup instead of checking for existing variables,
iterating over all elements in the list or checking lists for optional
configuration. Move variable contents into the dictionary for variables
that would be referenced only once.
Fallback to generic part number if the discovered part number is
unknown.
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Tested-by: Vimal Chungath <vcchunga@amazon.com>
Tested-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Set flags in one loop. Append flags to a list and use the list in the
loop.
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Tested-by: Vimal Chungath <vcchunga@amazon.com>
Tested-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
