1344 Commits

Author SHA1 Message Date
Dmitry Kozlyuk
be66461cba common/mlx5: add Netlink event helpers
Introduce mlx5_nl_read_events() to read Netlink events
(technically, messages) from a socket that was configured
to listen for them via a new mlx5_nl_init() parameter.
Add mlx5_nl_parse_link_status_update() helper
to extract information from link-related events.
This patch is a shared base for later fixes.

Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2022-03-01 16:54:03 +01:00
Radu Nicolau
578da1bd20 net/iavf: support NAT-T / UDP encapsulation
Add support for NAT-T / UDP encapsulated ESP.
This fixes the inline crypto feature for iAVF which will not
function properly without setting the UDP encapsulation options.

Fixes: 6bc987ecb860 ("net/iavf: support IPsec inline crypto")
Cc: stable@dpdk.org

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>
2022-03-01 20:27:31 +01:00
Arek Kusztal
8545c6d2e2 crypto/qat: fix smaller modulus cases for mod exp
This patch fixes not working cases when modulus is
smaller than other arguments.

Fixes: 3b78aa7b2317 ("crypto/qat: refactor asymmetric crypto functions")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2022-03-04 11:20:36 +01:00
Raja Zidane
d2781de684 compress/mlx5: support out-of-space status
When trying to dequeue, an OP may fail due to insufficient
space for the OP output, the compressdev API defines out-of-space
for OP status. The driver can detect out-of-space errors and
report them to the user. Check if hw_error_syndrome specifies
out-of-space and set the OP status accordingly.
Also added an error message for a case of missing B-final flag.

Fixes: f8c97babc9f4 ("compress/mlx5: add data-path functions")
Cc: stable@dpdk.org

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2022-03-04 10:41:20 +01:00
Stephen Hemminger
68eb9a1945 remove extra blank line at EOF
These source files all had unnecessary blank line at end of file.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2022-02-27 21:26:06 +01:00
Michael Baum
9d936f4f1a common/mlx5: support remote PD and CTX
Add option to probe common device using import CTX/PD functions instead
of create functions.
This option requires accepting the context FD and the PD handle as
devargs.

This sharing can be useful for applications that use PMD for only some
operations. For example, an app that generates queues itself and uses
PMD just to configure flow rules.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2022-02-25 17:33:31 +01:00
Michael Baum
0777921a61 common/mlx5: glue device and PD import
Add support for rdma-core API to import device.
The API gets ibv_context file descriptor and returns an ibv_context
pointer that is associated with the given file descriptor.
Add also support for rdma-core API to import PD.
The API gets ibv_context and PD handle and returns a protection domain
(PD) that is associated with the given handle in the given context.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2022-02-25 17:33:31 +01:00
Michael Baum
c2e3059a10 common/mlx5: consider local functions as internal
The functions which are not explicitly marked as internal
were exported because the local catch-all rule was missing in the
version script.
After adding the missing rule, all local functions are hidden.
The function mlx5_get_device_guid is used in another library,
so it needs to be exported (as internal).

Because the local functions were exported as non-internal
in DPDK 21.11, any change in these functions would break the ABI.
An ABI exception is added for this library, considering that all
functions are either local or internal.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2022-02-25 17:33:31 +01:00
Sean Zhang
5c4d491791 net/mlx5: support matching GRE optional fields
This patch adds matching on the optional fields (checksum/key/sequence)
of GRE header. The matching on checksum and sequence fields requests
support from rdma-core with the capability of misc5 and tunnel_header 0-3.

For patterns without checksum and sequence specified, keep using misc for
matching as before, but for patterns with checksum or sequence, validate
capability first and then use misc5 for the matching.

Signed-off-by: Sean Zhang <xiazhang@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2022-02-25 16:34:08 +01:00
Tomasz Duszynski
64e63c1929 common/cnxk: support CNF95xx B0 variant
Add CNF95xx B0 variant to the list of supported models.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-02-25 11:24:55 +01:00
Satha Rao
d120c08958 common/cnxk: check SQ node before setting BP config
Validate sq_node and parent before accessing their fields.
SQ was created without any associated TM node, this is valid negative
case, so return success while stopping TM without SQ node.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-25 08:47:53 +01:00
Satha Rao
0b7e667ee3 common/cnxk: enable packet marking
cnxk platforms supports packet marking when TM enabled with
valid shaper rates. VLAN DEI, IP ECN, or IP DSCP inside
packet will be updated based on mark flags selected.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-25 08:45:53 +01:00
Vidya Sagar Velumuri
582085ed2f common/cnxk: configure reassembly parameters
When reassembly is enabled by application, set corresponding
flags in SA during creation.

Provide ROC API to configure reassembly unit with active and
zombie limits and step size.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-24 21:31:53 +01:00
Vamsi Attunuru
bea5d990a9 net/cnxk: support outbound soft expiry notification
Add support for soft expiry notification mechanism in outbound
path by creating required number of ring buffers and a common poll
thread which polls for soft expiry events enqueued by microcode.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-24 21:31:28 +01:00
Tomasz Duszynski
040f0bda7c common/cnxk: extend log on model mismatch
Model is uniquely identified by 4 numbers. Print them all in case
model being populated is not on a list of known models. This makes
debugging a bit easier.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-02-24 21:30:02 +01:00
Rahul Bhansali
8fbad405c2 common/cnxk: add CN10K specific xstats
Add cn10k specific Rx xstats of bandwidth profile,
CPT and IPsec counters.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-24 05:17:33 +01:00
Viacheslav Ovsiienko
7dac7abe0a common/mlx5: check send on time capability
The patch provides check for send scheduling on time hardware capability.
With this capability enabled hardware is able to handle Wait WQEs
with directly specified timestamp values. No Clock Queue is needed
anymore to handle send scheduling.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2022-02-24 13:46:52 +01:00
Nithin Dabilpuram
fe5846bcc0 net/cnxk: add devargs for min-max SPI
Add support for inline inbound SPI range via devargs
instead of just max SPI value and range being 0..max.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:38:20 +01:00
Nithin Dabilpuram
82529cff18 net/cnxk: fix inline device RQ tag mask
Fix inline device RQ  tagmask to get packets with receive errors
as type ETHDEV packets to callback handler so that packet buffers
can get freed. Currently only IPsec denied packets get the right
tag mask.

Fixes: ee48f711f3b0 ("common/cnxk: support NIX inline inbound and outbound setup")
Cc: stable@dpdk.org

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:36:45 +01:00
Satha Rao
90b361368c common/cnxk: remove tracking of mark actions
Removed roc NPC APIs which tracks addition and deletion of
mark actions. It was earlier needed to track number of mark
actions added as part of flow rules. If mark actions count
is > 0, then the function pointer for Rx would get updated
to even read mark value from CQE/WQE and populate in mbuf.
Now the same switch is done based on new Rx meta data negotiate
ethdev API.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:36:38 +01:00
Nithin Dabilpuram
a9207715c1 common/cnxk: allow force use of SSO device for outb inline
Allow force use of SSO device even when inline dev is available
so that in case driver needs events directly delivered to
event device.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:35:58 +01:00
Nithin Dabilpuram
f598200aca common/cnxk: use SSO time counter threshold for IRQ
Enable time counter based threshold for raising SSO
EXE_INT instead of IAQ threshold. Time counter based
threshold helps getting periodic interrupts and process
pkts in burst instead of getting HW to raise an interrupt
for every new work.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:35:48 +01:00
Nithin Dabilpuram
c8c967e117 common/cnxk: support enabling AURA tail drop for RQ
Add support to enable AURA tail drop via RQ specifically
for inline device RQ's pkt pool. This is better than RQ
RED drop as it can be applied to all RQ's that are not
having security enabled but using same packet pool.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:35:38 +01:00
Vidya Sagar Velumuri
350b7a536a common/cnxk: enable L3 header write back in SA
Enable the field in SA to write back L2, L3 headers in case
of errors during inline processing.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:35:04 +01:00
Vidya Sagar Velumuri
5ece02e736 common/cnxk: use common SA init API for default options
Use common SA init API before doing initialization based on
params. This is better so that all HW specific default values
are at single place for lookaside and inline.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:34:54 +01:00
Vidya Sagar Velumuri
4af4e36a93 common/cnxk: support inline device API without ROC NIX
Update the inline device functions to work when roc_nix is NULL.
This is required, as IPsec driver have to use these APIs to work
with inline IPsec device, but the IPsec driver might not have roc_nix
information.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:34:44 +01:00
Satha Rao
02bf1662ef common/cnxk: adjust shaper rates to lower boundaries
Provide a method to get floor values for a requested shaper rate,
which can assure packets should never be transmitted at a rate higher
than configured.

Keep the old API to get HW suggested values.
And introduce new parameter to select appropriate API.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:34:34 +01:00
Nithin Dabilpuram
7e9a94909e common/cnxk: realloc inline device XAQ AURA
Add support to realloc inline device XAQ AURA with more
buffers of new packet pool AURA.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:34:24 +01:00
Satha Rao
650101241b common/cnxk: increase SMQ resource count
CN10K supports up to 832 resources at SMQ level, so increase
bitmap count to 1024.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:34:10 +01:00
Sunil Kumar Kori
20d02329cd common/cnxk: support priority flow control
CNXK platforms support priority flow control(802.1qbb) to pause
respective traffic per class on that link.

Adds RoC interface to configure priority flow control on MAC
block i.e. CGX on cn9k and RPM on cn10k.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:34:04 +01:00
Michael Baum
a6b9d5a538 common/mlx5: update doorbell mapping parameter name
The "tx_db_nc" devarg forces doorbell register mapping to non-cached
region eliminating the extra write memory barrier. This argument was
used in creating the UAR for Tx and thus affected its performance.

Recently [1] its use has been extended to all UAR creation in all mlx5
drivers, and now its name is no longer so accurate.

This patch changes its name to "sq_db_nc" to suit any send queue that
uses it. The old name will still work for backward compatibility.

[1] commit 5dfa003db53f ("common/mlx5: fix post doorbell barrier")

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Raslan Darawsheh <rasland@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2022-02-23 15:57:43 +01:00
Shun Hao
38eb5c9f35 net/mlx5: fix E-Switch manager vport ID
One of the E-Switch vports plays the special role - it is assigned as
"E-Switch manager" and has some special exclusive rights and duties - it
maintains all the representors, manages FDB domain flows, etc. By
default, the E-Switch vport index was supposed to be zero on standalone
NICs (regular ConnectX) and 0xFFFE SmartNIC (BlueField), but that was
not always correct - this index can be assigned with any value by
kernel/hypervisor.

Currently the E-Switch manager vport id is supposed to be default - 0
for standalone NICs, and 0xFFFE for the SmartNICs, and is deduced from
the device PCI id.

To handle this and do not suggest any default values, can use DevX API
to query E-Switch manager vport ID directly from the firmware during
initialization, and use that value by default. If the new method is not
provided (legacy firmware), fallback to use the PCI id approach.

Fixes: a564038699f9 ("net/mlx5: support E-Switch manager egress traffic match")
Cc: stable@dpdk.org

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2022-02-23 15:57:39 +01:00
Yajun Wu
05b54bf089 common/mlx5: fix queue pair ack timeout configuration
VDPA driver creates two QPs(1 queue pair include 1 send queue
and 1 receive queue) per virtio queue to get traffic events
from NIC to SW.
Two QPs(called FW QP and SW QP) are created as loopback QP
and FW QP'SQ is connected to SW QP'RQ internally.

When packet receive or send out, HW will send WQE by FW QP'SQ,
then SW will get CQE from the CQ of SW QP.

With large scale and heavy traffic, the SQ's request may fail
to get ACK from RQ HW, because HW is busy.
SQ will retry the request with qpc.retry_count times and each time
wait for 4.096 uS *2^(ack_timeout) for the response. If still can’t
get RQ’s HW response, SQ will go to an error state.

16 is experienced value. It should not be too high or too low.
Too high will make QP waits too long in case it’s packet drop.
Too low will cause QP to go to an error state(retry-exceeded) easily.

Fixes: 15c3807e86ab ("common/mlx5: support DevX QP operations")
Cc: stable@dpdk.org

Signed-off-by: Yajun Wu <yajunw@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2022-02-23 15:57:30 +01:00
Michael Baum
a729d2f093 common/mlx5: refactor devargs management
Improve the devargs handling in two aspects:
 - Parse the devargs string only once.
 - Return error and report for unknown keys.

The common driver parses once the devargs string into a dictionary, then
provides it to all the drivers' probe. Each driver updates within it
which keys it has used, then common driver receives the updated
dictionary and reports about unknown devargs.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2022-02-21 11:36:56 +01:00
Michael Baum
c089eb9358 common/mlx5: check common devargs in probing again
MLX5 common driver supports probing again in two scenarios:
 - Add new driver under existing device. common probe function gets
   it in devargs, then calls the requested driver's probe function
   (regardless of the driver's own support in probing again) with the
   existing device as parameter.
 - Transfer the probing again support of the drivers themselves
   (currently only net). In this scenario, the existing device is sent
   as a parameter to the existing driver's probe too.

In both cases it gets a new set of arguments that do not necessarily
match the configured arguments in the existing device.
Some of the arguments belong to the configuration of the existing
device, so they can't be updated in the probing again. On the other
hand, there are arguments that belong to a specific driver or specific
port and might get a new value in the probing again.
The user might generate any argument he wants in probing again, but when
he generates arguments belonging to the common device configuration, it
does not affect.

This patch adds an explicit check for the devargs belonging to the
common device configuration. If there is no match to the existing
configuration, it returns an error.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2022-02-21 11:36:55 +01:00
Michael Baum
c4c3e8afef common/mlx5: share VF check function
The check if device is VF work for Linux as same as Windows.
This patch removes it to the function implemented in the folder shared
between the operating systems, removing the duplication.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2022-02-21 11:36:46 +01:00
Ivan Malov
a3b2ade480 common/sfc_efx/base: add missing handler for 1-byte fields
One may set RECIRC_ID in a MAE action rule specification.
This field is not a network one, and its handling goes
to the code snippet which does not recognise field
sizes other than 4 bytes. Add the missing handler.

Fixes: 3a73dcfdb255 ("common/sfc_efx/base: match on recirc ID in action rules")
Cc: stable@dpdk.org

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2022-02-18 16:22:25 +01:00
Ivan Malov
b4dd34c7f7 common/sfc_efx/base: fix recirculation ID set in outer rules
Recirculation ID field of MAE outer rule insert MCDI is
part of the lookup control structure and it has non-zero
bit offset relative to the byte offset of the structure.

Fixes: 5cf153e79c6c ("common/sfc_efx/base: support recirculation ID in outer rules")
Cc: stable@dpdk.org

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2022-02-18 16:22:25 +01:00
Kiran Kumar K
fbc0fa7499 net/cnxk: keep flow rules across restart
Adding changes to enable keep flow rule device capability.
With this change, flow rules will be kept across device restart.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Reviewed-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2022-02-18 08:39:50 +01:00
Gowrishankar Muthukrishnan
244a996f01 common/cnxk: fix uninitialized pointer read
Fix uninitialized pointer read reported in coverity scan.

Coverity issue: 370214, 370217, 370219, 370220, 370221
Coverity issue: 370223, 370224, 370225, 372065
Fixes: c34ea71b878d ("common/cnxk: add NPC parsing API")
Cc: stable@dpdk.org

Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-18 05:20:47 +01:00
Gowrishankar Muthukrishnan
2447b0b669 common/cnxk fix unintended sign extension
This patch fixes unintended sign extensions reported in coverity
scan.

Coverity issue: 373258
Fixes: 8ca851cdc598 ("common/cnxk: support dual VLAN insert and strip actions")
Cc: stable@dpdk.org

Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-18 05:20:41 +01:00
Gowrishankar Muthukrishnan
14f7e5d4bf common/cnxk: add missing checks of return values
This patch fixes coverity issue by adding checks on return values.

Coverity issue: 373628, 374858, 370213, 370215
Fixes: af75aac78978 ("common/cnxk: support telemetry for NIX")
Fixes: d61138d4f0e2 ("drivers: remove direct access to interrupt handle")
Fixes: fcdef46b6698 ("common/cnxk: support NIX TM debug and misc utils")
Fixes: df405df95eeb ("common/cnxk: add NIX TM helper to alloc/free resource")
Cc: stable@dpdk.org

Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-18 05:09:16 +01:00
Ankur Dwivedi
8540d7dbfc common/cnxk: fix NPC key extraction validation
The x->len is passed as argument to npc_prep_mcam_ldata().
In the function, the len is used to reference elements of
int_info and int_info_mask array.
The arrays are of length NPC_MAX_EXTRACT_DATA_LEN.

Validating the x->len value so that it is not greater than
NPC_MAX_EXTRACT_DATA_LEN.

This patch also resolves warning observed with gcc 12 compiler.

log:
 ../drivers/common/cnxk/roc_npc_utils.c:13:26: warning: writing 16 bytes
 into a region of size 0 [-Wstringop-overflow=]
 ptr[idx] = data[len - 1 - idx];

 ../drivers/common/cnxk/roc_npc_utils.c:163:17: note: at offset 64 into
 destination object ‘int_info’ of size 64
 uint8_t int_info[NPC_MAX_EXTRACT_DATA_LEN];

Bugzilla ID: 854
Fixes: 665b6a7400bf ("common/cnxk: add NPC helper API")
Cc: stable@dpdk.org

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-02-17 14:02:24 +01:00
Harman Kalra
f2566bfa80 common/cnxk: enable NIX Tx interrupts errata
An errata exists whereby NIX may incorrectly overwrite the value in
NIX_SQ_CTX_S[SQ_INT]. This may cause set interrupts to get cleared or
causing an QINT when no error is outstanding.
As a workaround, software should always read all SQ debug registers
and not just rely on NIX_SQINT_E bits set in NIX_SQ_CTX_S[SQ_INT].
Also for detecting SQB faults software must read SQ context and
check id next_sqb is NULL.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-17 10:26:30 +01:00
Satheesh Paul
0fb2b46be7 common/cnxk: fix base rule merge
Egress rules do not have a base steering rule and the
current base steering rule is applicable only for ingress
rules. Hence, when creating a flow rule, merge base steering
rule only for ingress rules.

Fixes: f9af90807466 ("common/cnxk: add mcam utility API")
Cc: stable@dpdk.org

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-02-17 09:12:08 +01:00
Satheesh Paul
542e27e99b common/cnxk: fix log level during MCAM allocation
Changed log level from info to debug for a couple of log
messages printed during MCAM allocation.

Fixes: 1f66919817ee ("common/cnxk: improve MCAM entries management")
Cc: stable@dpdk.org

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-02-17 08:21:25 +01:00
Satheesh Paul
40257b81b8 common/cnxk: fix flow deletion
When a flow is deleted, the counters are deleted without
being cleared first. This results in counter values being
retained and shown in flows created later. Hence, counter
is cleared before being deleted.

Updated driver to clear and delete counters upon flow deletion.

Fixes: a07f7ced436d ("common/cnxk: add NPC init and fini")
Cc: stable@dpdk.org

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-02-17 07:33:16 +01:00
Satheesh Paul
9132292e99 common/cnxk: fix null access in IPv6 flow parsing
Added null check in IPv6 flow pattern parsing.

Fixes: 474e275b1bc6 ("common/cnxk: support extensions attributes in IPv6 item")

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2022-02-17 05:33:09 +01:00
Arek Kusztal
6c25a68adc crypto/qat: add ECPM algorithm
This patch adds Elliptic Curve Multiplication
algorithm to Intel QuickAssist Technology PMD.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2022-02-23 10:17:06 +01:00
Arek Kusztal
b5324d3854 crypto/qat: add ECDSA algorithm
This patch adds ECDSA algorithm to Intel
QuickAssist Technology PMD.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2022-02-23 10:16:53 +01:00