1299 Commits

Author SHA1 Message Date
Shiri Kuzin
e649994972 net/mlx5: fix ICMPv6 header rewrite action validation
ICMPv6 header contains the checksum field, that includes the IP
addresses from IP header.

The ConnectX-5 hardware does not support ICMPv6 checksum calculation
and in case of IP header modification the checksum will contain
the wrong value.

The patch rejects the header modification actions related to IP
addresses if ICMPv6 protocol is detected in pattern.
This issue was also partly fixed in commit below which rejects
flows with the pattern "ipv6 proto is 58".

Fixes: 0e2ceb639d8a ("net/mlx5: fix ICMPv6 header rewrite actions")
Cc: stable@dpdk.org

Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-19 15:17:30 +01:00
Bing Zhao
72dcb91773 net/mlx5: fix matching for ICMP fragments
The hardware can recognize and mark the layer 4 protocol type for TCP,
UDP and IPSec non-fragmented packets. For all the fragmented packets,
L4 type will be considered as None. This can be used when creating a
flow with L4 matching, then hops number will be reduced and a better
performance could be gained.

But for ICMP packets, it cannot be recognized correctly because it is
not a L4 protocol in the stack, even if the packet format is similar.

All the fragmented and non-fragmented ICMP will have the None L4 type.
Fragmented packets with incomplete headers could not hit the flow,
even for the first fragment. Because then it will make it complex to
defragment for both HW and SW. For other types, the implicit rules
could be used directly and all the fragments will miss the flow.

For ICMP packets, this should be done explicitly because all packets
have None type. The first fragment will still hit the flow if there is
no explicit rule.

All ICMP fragments will still hit the rules like ETH, ETH + IP, and
ETH + IP + "ICMP protocol" only since they are wildcard rules, and
there is no next layer protocol specified field in such rules.

Fixes: d53aa89aea91 ("net/mlx5: support matching on ICMP/ICMP6")
Cc: stable@dpdk.org

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-02-19 13:51:06 +01:00
Raslan Darawsheh
58b4a2b13e net/mlx5: add BlueField-2 device ID
This adds new device id to the list of Mellanox devices
that runs mlx5 PMD.
- BlueField-2 integrated ConnectX-6 Dx network controller

This device is not ready yet, it is in development stage.

Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-19 13:51:06 +01:00
Matan Azrad
050bfe033c net/mlx5: fix tunnel flow priority
The PMD manages internally the priority of the flows in addition to the
user configured priority.

So, 2 flows with the same user priority may get different priority.

The method:
As much as the flow is more specific it gets higher priority
(higher means first to be matched).

In addition, When the user creates a RSS flow the PMD splits the flows
according to the flow RSS layers as the HW requests for RSS TIR.
The internal priority for each flow is decided by the flow last layer.
L2, L3 and L4 (L2 low and L4 high).

The tunnel layer was wrongly decided to be L4 all the time, even when
the flow is configured with inner-RSS.

Hence, the first RSS split which takes the tunnel layer priority all the
time will be matched before the more specific splits.

Change the priority of tunnel layer to be L2 when inner-RSS is
configured.

Fixes: d4a405186b73 ("net/mlx5: support tunnel RSS level")
Cc: stable@dpdk.org

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-02-19 13:51:06 +01:00
Suanming Mou
431f199883 net/mlx5: fix meter header modify before decap
The meter flows are split into three subflows each, the prefix subflow
with meter action color the packet, the meter subflow filters out the
colored packets, the suffix subflow applies all the remaining actions
to the passed packets. The tag header modify action is added to the
prefix subflow to make the suffix subflow to match the packets from the
prefix subflow.

Currently, the tag header modify action is added at the beginning in the
prefix subflow even before decap action. The header modify action does
not make sense to the later decap action, so the flow create will be
validated as incorrect flow rule and failed.

Move the tag header modify action just before meter action in the prefix
subflow to make the flow with decap action to do the decap first, then
do the tag and meter to fix that issue.

Fixes: 9ea9b049a960 ("net/mlx5: split meter flow")
Cc: stable@dpdk.org

Reported-by: Tonghao Zhang <xiangxia.m.yue@gmail.com>
Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-14 12:42:12 +01:00
Dekel Peled
00f75a4057 net/mlx5: fix VLAN match for DV mode
Currently MLX5 PMD can't match on untagged packets specifically.
Tagged traffic still hits the flows intended for untagged packets.
If the flow has ETH, it will catch all matching packets, tagged
and untagged.
The solution is to use cvlan_tag bit.
If mask=1 and value=0 it matches on untagged traffic.
If mask=1 and value=1 it matches on tagged traffic.
This is the kernel implementation.

This patch updated MLX5 PMD to set cvlan_tag mask and value according
to flow rule contents.
This update is relevant when using DV flow engine (dv_flow_en=1).

See example at https://doc.dpdk.org/guides/nics/mlx5.html#limitations.

Fixes: fc2c498ccb94 ("net/mlx5: add Direct Verbs translate items")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-14 12:42:12 +01:00
Wisam Jaddo
a262726ed4 net/mlx5: fix blocker for push VLAN on Rx
The blocker should take FDB into consideration, since FDB all directions
have transfer ingress in it.

Fixes: 55060e62e4d2 ("net/mlx5: block push VLAN action on Rx")
Cc: stable@dpdk.org

Signed-off-by: Wisam Jaddo <wisamm@mellanox.com>
Acked-by: Raslan Darawsheh <rasland@mellanox.com>
2020-02-14 12:42:12 +01:00
Thomas Monjalon
b689a78173 net/mlx: replace hardcoded value with macro
Replace checking against 65535 limit,
with a simpler form using RTE_MIN and UINT16_MAX macros.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-14 12:42:12 +01:00
Viacheslav Ovsiienko
7593cf1d35 net/mlx5: fix legacy multi-packet write session
To provide the better PCIe bandwidth utilization the ConnectX-4LX
NIC supports the multi-packet write (MPW) sessions allowing to
pack multiple packets into one descriptor (WQE). This is legacy
feature and it has some limitations on the packets and data
description segments. To provide the best performance all inline
packets must be put into shared data segment and the total length
of MPW session must be limited. The limit is controlled with
txq_inline_mpw devarg.

Fixes: 82e75f8323bf ("net/mlx5: fix legacy multi-packet Tx descriptors")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-14 12:42:12 +01:00
Matan Azrad
06387be8ea net/mlx5: fix encap/decap validation
The encapsulation and decapsulation actions are divided into 2 types:
L2 and L3.
In order to configure L3 xcapsulation actions the user should use both
RAW_DECAP and RAW_ENCAP and setting the appropriated data sizes in
their action configuration structures.

The PMD flow validation wrongly didn't detect the RAW_DECAP
and RAW_ENCAP combination to distinguish between L3_DECAP and L3_ENCAP.
Thus, some xcapsulation related validation failed.
For example, when configuring modify header action before L3_DECAP.

Simplify the xcapsulation defines and fix the L3 xcapsulation detection
using the action configuration data sizes.

By the way, add the hairpin validation in this area.

Fixes: d85c7b5ea59f ("net/mlx5: split hairpin flows")
Fixes: 8ba9eee4ce32 ("net/mlx5: add raw data encap/decap to Direct Verbs")
Cc: stable@dpdk.org

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-02-14 12:42:12 +01:00
Thomas Monjalon
43e34a229d build: remove redundant config include
The header file rte_config.h is always included by make or meson.
If required in an exported API header file, it must be included
in the public header file for external applications.
In the internal files, explicit include of rte_config.h is useless,
and can be removed.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Matan Azrad <matan@mellanox.com>
Acked-by: David Marchand <david.marchand@redhat.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
2020-02-11 16:50:59 +01:00
Dekel Peled
ff44839929 net/mlx5: fix dirty array of actions
Previous patch changed the format of struct
mlx5_flow_dv_modify_hdr_resource, to use a flexible array for
modification actions.
In __flow_dv_translate() a union was defined with item of this struct,
and an array of maximal possible size.
Array elements are filled in several functions.
In function flow_dv_convert_action_set_reg(), array element is filled
partially, while the other fields of this array element are left
uninitialized.
This may cause failure of flow_dv_modify_hdr_resource_register()
when calling driver function with the 'dirty' array.

This patch updates flow_dv_convert_action_set_reg(), setting the
selected array element fields while clearing the other fields.
Other functions that fill the same array elements are also updated
for clarity and proofing future use.

Fixes: 024e95759c16 ("net/mlx5: fix modify actions support limitation")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 11:15:53 +01:00
Michael Baum
4f8e6befe7 net/mlx5: fix memory regions release deadlock
The mpx5 PMD maintains the list of devices for those the memory
operation callback routines must be invoked to keep the device MRs (MR
is the entity backing the hardware DMA transactions) consistent with the
mapped memory.
Each device context in the list is protected with dedicated lock on per
device basis, which might be taken inside the callback routine.

When device is closing the PMD frees all MRs by calling
mlx5_mr_release(), that might call rte_free() under the taken device
lock.  If this rte_free call triggers the entire memory segment freeing
it, in its turn, invokes the callback routine and attempt to take the
lock inside this one causes the deadlock.

The patch proposes the remove the device from the callback list first
and then call mlx5_mr_release() and free the remaining device MRs
explicitly.

Fixes: 0e3d0525b2f2 ("net/mlx5: fix memory event callback list")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-05 11:15:53 +01:00
Alexander Kozyrev
26f1bae837 net/mlx5: add Rx/Tx burst mode info
Get a burst mode information for Rx/Tx queues in mlx5.
Provide callback functions to show this information in
a "show rxq info" and "show txq info" output.

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:21 +01:00
Raslan Darawsheh
90456726eb net/mlx5: fix VXLAN-GPE item translation
Currently, when using VXLAN-GPE or VXLAN item in the flow
both are being treated the same with flags 0x8 in VXLAN
header. Which mean the matching of the item VXLAN-GPE
will match any VXLAN packet.

This fixes the translation of VXLAN GPE item into PMD flow
item. Which will by default set the flags to VXLAN-GPE
to be 0xc.

Fixes: 3d69434113d1 ("net/mlx5: add Direct Verbs validation function")
Cc: stable@dpdk.org

Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-05 09:51:21 +01:00
Alexander Kozyrev
8e46d4e18f common/mlx5: improve assert control
Use the MLX5_ASSERT macros instead of the standard assert clause.
Depends on the RTE_LIBRTE_MLX5_DEBUG configuration option to define it.
If RTE_LIBRTE_MLX5_DEBUG is enabled MLX5_ASSERT is equal to RTE_VERIFY
to bypass the global CONFIG_RTE_ENABLE_ASSERT option.
If RTE_LIBRTE_MLX5_DEBUG is disabled, the global CONFIG_RTE_ENABLE_ASSERT
can still make this assert active by calling RTE_VERIFY inside RTE_ASSERT.

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:21 +01:00
Alexander Kozyrev
0afacb04f5 common/mlx5: remove NDEBUG
Use the RTE_LIBRTE_MLX5_DEBUG configuration flag to get rid of dependency
on the NDEBUG definition. This is a preparation step to switch
from standard assert clauses to DPDK RTE_ASSERT ones in MLX5 driver.

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:21 +01:00
Viacheslav Ovsiienko
cacb44a099 net/mlx5: add no-inline Tx flag
This patch adds support for dynamic flag that hints transmit
datapath do not copy data to the descriptors. This flag is
useful when data are located in the memory of another (not NIC)
physical device and copying to the host memory is undesirable.

This hint flag is per mbuf for multi-segment packets.

This hint flag might be partially ignored if:

- hardware requires minimal data header to be inline into
  descriptor, it depends on the hardware type and its configuration.
  In this case PMD copies the minimal required number of bytes to
  the descriptor, ignoring the no inline hint flag, the rest of data
  is not copied.

- VLAN tag insertion offload is requested and hardware does not
  support this options. In this case the VLAN tag is inserted by
  software means and at least 18B are copied to descriptor.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-05 09:51:20 +01:00
Ori Kam
efa79e68c8 net/mlx5: support fine grain dynamic flag
The inline feature is designed to save PCI bandwidth by copying some
of the data to the wqe. This feature if enabled works for all packets.

In some cases when using external memory, the PCI bandwidth is not
relevant since the memory can be accessed by other means.

This commit introduce the ability to control the inline with mbuf
granularity.

In order to use this feature the application should register the field
name, and restart the port.

Signed-off-by: Ori Kam <orika@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
fbde43310f net/mlx5: make FDB default rule optional
There are RDMA-CORE versions which are not supported multi-table for
some Mellanox mlx5 devices.

Hence, the optimization added in commit [1] which forwards all the FDB
traffic to table 1 cannot be configured.

Make the above optimization optional:
Do not fail when either table 1 cannot be created or the jump rule
(all =>jump to table 1) is not configured successfully.
In this case, all the flows will be configured to table 0.

[1] commit b67b4ecbde22 ("net/mlx5: skip table zero to improve
insertion rate")

Cc: stable@dpdk.org

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
654810b568 common/mlx5: share Netlink commands
Move Netlink mechanism and its dependencies from net/mlx5 to
common/mlx5 in order to be ready to use by other mlx5 drivers.

The dependencies are BITFIELD defines, the ppc64 compilation workaround
for bool type and the function mlx5_translate_port_name.

Update build mechanism accordingly.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
f22442cb5d net/mlx5: reduce Netlink commands dependencies
As an arrangment for Netlink command moving to the common library,
reduce the net/mlx5 dependencies.

Replace ethdev class command parameters.

Improve Netlink sequence number mechanism to be controlled by the
mlx5 Netlink mechanism.

Move mlx5_nl_check_switch_info to mlx5_nl.c since it is the only one
which uses it.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
c12671e3b7 net/mlx5: separate Netlink command interface
The Netlink commands interfaces is included in the mlx5.h file with a
lot of other PMD interfaces.

As an arrangement to make the Netlink commands shared with different
PMDs, this patch moves the Netlink interface to a new file called
mlx5_nl.h.

Move non Netlink pure vlan commands from mlx5_nl.c to the
mlx5_vlan.c.

Rename Netlink commands and structures to use prefix mlx5_nl.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
d768f324d6 net/mlx5: select driver by class device argument
There might be a case that one Mellanox device can be probed by
multiple mlx5 drivers.

One case is that any mlx5 vDPA device can be probed by both net/mlx5
and vdpa/mlx5.

Add a new mlx5 common API to get the requested driver by devargs:
class=[net/vdpa].

Skip net/mlx5 PMD probing while the device is selected to be probed by
the vDPA driver.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
53ec4db032 common/mlx5: support DevX indirect mkey creation
Add option to create an indirect mkey by the current
mlx5_devx_cmd_mkey_create command.

Indirect mkey points to set of direct mkeys.
By this way, the HW\SW can reference fragmented memory by one object.

Align the net/mlx5 driver usage in the above command.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
8fc7421759 common/mlx5: share CQ entry check
The CQE has owner bit to indicate if it is in SW control or HW.

Share a CQE check for all the mlx5 drivers.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
e415f348e3 common/mlx5: share devices information
Move the vendor information, vendor ID and device IDs from net/mlx5 PMD
to the common mlx5 file.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
93e3098296 common/mlx5: share PCI device detection
Move PCI detection by IB device from mlx5 PMD to the common code.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
7b4f1e6bd3 common/mlx5: introduce common library
A new Mellanox vdpa PMD will be added to support vdpa operations by
Mellanox adapters.

This vdpa PMD design includes mlx5_glue and mlx5_devx operations and
large parts of them are shared with the net/mlx5 PMD.

Create a new common library in drivers/common for mlx5 PMDs.
Move mlx5_glue, mlx5_devx_cmds and their dependencies to the new mlx5
common library in drivers/common.

The files mlx5_devx_cmds.c, mlx5_devx_cmds.h, mlx5_glue.c,
mlx5_glue.h and mlx5_prm.h are moved as is from drivers/net/mlx5 to
drivers/common/mlx5.

Share the log mechanism macros.
Separate also the log mechanism to allow different log level control to
the common library.

Build files and version files are adjusted accordingly.
Include lines are adjusted accordingly.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
543e218fa5 net/mlx5: separate DevX commands interface
The DevX commands interface is included in the mlx5.h file with a lot
of other PMD interfaces.

As an arrangement to make the DevX commands shared with different PMDs,
this patch moves the DevX interface to a new file called mlx5_devx_cmds.h.

Also remove shared device structure dependency on DevX commands.

Replace the DevX commands log mechanism from the mlx5 driver log
mechanism to the EAL log mechanism.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Suanming Mou
792e749e92 net/mlx5: fix register usage in meter
Flow with meter will split to three subflows, the prefix subflow with
meter action do the color, the meter subflow  filter the packets, the
suffix subflow do all the left actions for packets pass the filter.
Both the color and the subflow match between prefix and suffix use the
register to store the tag.

For some of the NICs with meter color register share capability, it
only uses 8 LSB of the register for color, the left 24 MSB can be used
for flow id match between meter prefix subflow and suffix subflow.

Currently, one entire register is allocated for flow matching which
causes the NICs with limited registers don't have enough register for
other matching.

Add the meter color share capability checking to fix lacking of
registers issue.

Fixes: 9ea9b049a960 ("net/mlx5: split meter flow")
Cc: stable@dpdk.org

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Suanming Mou
30a3687d99 net/mlx5: support maximum flow id allocation
The id allocated is for the register unique id match. Some registers may
not use the full 32 bits. Add the maximum id to avoid allocate id over
the register restriction.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Shiri Kuzin
0e2ceb639d net/mlx5: fix ICMPv6 header rewrite actions
The ConnectX-5 HW cannot calculate the checksum for ICMPv6,
therefore flows with pattern 'ipv6 proto is 58' with actions that change
the header should be rejected. the actions that change the header
in this type of flow are 'set_ipv6_src' and 'set_ipv6_dst'.

Fixes: 4bb14c83df95 ("net/mlx5: support modify header using Direct Verbs")
Cc: stable@dpdk.org

Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
813f9bfa12 net/mlx5: fix setting of port ID for egress rules
Previous patch fixed the setting of port-id for eswitch rules, which
are ingress only.
This patch expands the fix, to support NIC rules as well, which can
be ingress or egress.

Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-02-05 09:51:20 +01:00
Eli Britstein
27767e217f net/mlx5: fix zero out UDP checksum in encap data
The cited commit zeroed the UDP checksum for raw-encap case.
Add the same handling for vxlan-encap case.

Fixes: bf1d7d9a033a ("net/mlx5: zero out UDP checksum in encapsulation")
Cc: stable@dpdk.org

Signed-off-by: Eli Britstein <elibr@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-02-05 09:51:20 +01:00
Matan Azrad
99d49f47b3 net/mlx5: fix build with clang 3.4.2
Compilation massage example:
"dpdk/drivers/net/mlx5/mlx5_flow_dv.c:1087:10: error: comparison of
unsigned enum expression < 0 is always false
[-Werror,-Wtautological-compare]
        if (reg < 0)
            ~~~ ^ ~
"

enum modify_reg holds only non-negative integers and in some places in
the code it was used to be compared with negative value, hence
compilation was failed.

Change all thus places to use integer instead of enum modify_reg.

Fixes: 3e8edd0ef848 ("net/mlx5: update metadata register ID query")
Fixes: 55deee1715f0 ("net/mlx5: extend flow mark support")
Cc: stable@dpdk.org

Signed-off-by: Matan Azrad <matan@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
41dcaff4ad net/mlx5: update description of validation functions
Description of several functions is not accurate.
This patch updates the description, parameter names etc.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
5a2ab34d81 net/mlx5: fix VLAN VID action validation
Validation function of 'set VLAN VID' action checks twice for existing
same action in flow rule.

This patch updates the validation function logic, to check the same
restrictions more efficiently.

Fixes: 5f163d520cff ("net/mlx5: support modify VLAN ID on existing VLAN header")
Fixes: b8c0372bc5ac ("net/mlx5: fix set VLAN ID/PCP in new header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
581476d641 net/mlx5: fix pop VLAN action validation
Validation function of 'POP VLAN' action includes check for other
'POP VLAN' actions present in flow.
It doesn't check for 'PUSH VLAN' actions present in flow.

This patch adds check for 'PUSH VLAN' actions present in flow.

Fixes: b41e47da2592 ("net/mlx5: support pop flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
159e9217a5 net/mlx5: block pop VLAN action on Tx
Add missing check in validation function of 'pop VLAN' action.
Action is not allowed for egress flow rules.

Fixes: b41e47da2592 ("net/mlx5: support pop flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
55060e62e4 net/mlx5: block push VLAN action on Rx
Add missing check in validation function of 'push VLAN' action.
Action is not allowed for ingress flow rules.

Fixes: 9aee7a8418d4 ("net/mlx5: support push flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
70faf9ae0a net/mlx5: unify validation of drop action
According to PRM: "Drop action is mutually-exclusive with any other
action, except for Count action".
In current code this limitation is checked separately in validation
function of each action.

This patch removes the discrete checks, and adds a single check common
for all actions.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
5507cb7927 net/mlx5: allow push VLAN without VID
Currently the push VLAN action requires a VID value, either from
existing VLAN item, or from following 'set VLAN vid' action.

This patch removes this limitation, allowing a push VLAN action with
vid value 0.

Fixes: b8c0372bc5ac ("net/mlx5: fix set VLAN ID/PCP in new header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
82e4aca2ca net/mlx5: fix bit mask to validate push VLAN
Validation function of 'push VLAN' action uses (POP_VLAN or PUSH_VLAN)
actions flags, instead of using a mask of both flags.

This patch replaces it to use existing VLAN_ACTIONS mask.

Fixes: 9aee7a8418d4 ("net/mlx5: support push flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
a2268a4cfb net/mlx5: fix check for VLAN actions
Flow validation function includes, after all items and actions are
validated discretely, a check for VLAN and VXLAN actions.
This check is incorrect and redundant.

This patch removes the invalid check from validation function.
Check is incorrect, action_flags bit map is checked against
items mask MLX5_FLOW_LAYER_TUNNEL.
Check is also redundant, because VLAN push/pop actions can be used
together with packet reformat actions.

Fixes: b41e47da2592 ("net/mlx5: support pop flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Dekel Peled
06742ada54 net/mlx5: fix masks of encap and decap actions
PUSH_VLAN and POP_VLAN actions flags were added to ENCAP_ACTIONS
and DECAP_ACTIONS bit masks, respectively.
This is incorrect, because VLAN actions are considered as 'modify
header' actions, not as 'packet reformat' actions.

This patch removes the PUSH_VLAN and POP_VLAN actions flags from
ENCAP_ACTIONS and DECAP_ACTIONS bit masks.

Fixes: 9aee7a8418d4 ("net/mlx5: support push flow action on VLAN header")
Fixes: b41e47da2592 ("net/mlx5: support pop flow action on VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-02-05 09:51:20 +01:00
Bing Zhao
024e95759c net/mlx5: fix modify actions support limitation
In the root table, there is some limitation of total number of header
modify actions, 16 or 8 for each. But in other tables, there is no
such strict limitation. In an IPv6 case, the IP fields modifying
will occupy more actions than that in IPv4, so the total support
number should be increased in order to support as many actions as
possible for an IPv6 + TCP packet.
And in the meanwhile, the memory consumption should also be taken
into consideration because sometimes only several actions are needed.
The root table checking could also be done in low layer driver and
the error code will be returned if the actions number is over the
maximal supported value.

Fixes: 0e9d00027686 ("net/mlx5: check maximum modify actions number")
Cc: stable@dpdk.org

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-01-20 18:02:17 +01:00
Suanming Mou
64927f72a7 net/mlx5: fix meter suffix flow
The meter suffix flow item pointer restore is not correct to decrease
a fixed value. The incorrect operation will cause incorrect match to
the meter suffix flow, the flow create will fail once the magic number
in the wrong offset memory start with RTE_FLOW_ITEM_TYPE_END.
The pointer should decrease the real offset it increases.

Set the decrease value to the real offset the pointer increases to fix
the issue.

Fixes: 9ea9b049a960 ("net/mlx5: split meter flow")
Cc: stable@dpdk.org

Reported-by: Tonghao Zhang <xiangxia.m.yue@gmail.com>
Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-01-20 18:02:17 +01:00
Dekel Peled
f31d7a0171 net/mlx5: support GTP
This patch adds to MLX5 PMD support of matching on GTP item,
fields msg_type and teid, according to RFC [1].
GTP item validation and translation functions are added and called.
GTP tunnel type is added to supported tunnels.

[1] http://mails.dpdk.org/archives/dev/2019-December/152799.html

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-01-20 18:02:17 +01:00
Dekel Peled
70ccb60568 net/mlx5: optimize Rx hash fields conversion
Previous fix added translation of Rx hash fields to PRM format.

This patch optimizes the fix, to perform value translation only
if value is not zero.
In case value is zero, there is no need to translate it.

Fixes: c3e33304a7f6 ("net/mlx5: fix setting of Rx hash fields")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-01-20 18:02:17 +01:00