Commit Graph

28791 Commits

Author SHA1 Message Date
Dmitry Kozlyuk
e8c90926bd doc: fix build on Windows with Meson 0.58
The `doc` target used `echo` as its command.
On Windows, `echo` is always a shell built-in, there is no binary.
Starting from meson 0.58, `run_target()` always searches for command
executable and no longer accepts `echo` as such on Windows.
Replace plain `echo` with a Python one-liner.

Fixes: d02a2dab2d ("doc: support building HTML guides with meson")
Cc: stable@dpdk.org

Reported-by: Rob Scheepens <rob.scheepens@nutanix.com>
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-07-09 14:53:39 +02:00
Juraj Linkeš
bf66003b51 build: use platform for generic and native builds
The current meson option 'machine' should only specify the ISA, which is
not sufficient for Arm, where setting ISA implies other settings as well
(and is used in Arm configuration as such).
Use the existing 'platform' meson option to differentiate the type of
the build (native/generic) and set ISA accordingly, unless the user
chooses to override it with a new option, 'cpu_instruction_set'.
The 'machine' option set the ISA in x86 builds and set native/default
'build type' in aarch64 builds. These two new variables, 'platform' and
'cpu_instruction_set', now properly set both ISA and build type for all
architectures in a uniform manner.
The 'machine' option also doesn't describe very well what it sets. The
new option, 'cpu_instruction_set', is much more descriptive. Keep
'machine' for backwards compatibility.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-07-09 14:50:54 +02:00
David Marchand
5898abedeb net/octeontx/base: fix debug build with clang
Remove conflicting declaration of this symbol.

Fixes: d0d6549860 ("net/octeontx: support event Rx adapter")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
2021-07-09 13:18:56 +02:00
Tejasree Kondoj
4a3e72a2ee crypto/cnxk: fix build with asserts
Removing usage of unavailable macro.

Fixes: baee42a6be ("crypto/cnxk: add IPsec datapath")

Reported-by: Ali Alnubani <alialnu@nvidia.com>
Suggested-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
2021-07-09 13:18:56 +02:00
Anoob Joseph
b146c30d3c crypto/cnxk: add PCI ID for cn9k
Add PCI ID for crypo_cn9k PMD.

To avoid conflicting PCI ID in crypto_octeontx2 and crypto_cn9k PMDs,
disable crypto_cn9k PMD when built with octeontx2 config.

The lack of PCI ID is causing debug build to fail on Ubuntu 18.04
for crypto_cn9k PMD.

Reported-by: Ali Alnubani <alialnu@nvidia.com>
Suggested-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2021-07-09 13:18:56 +02:00
Dapeng Yu
75e4023dd7 net/ixgbe: fix flow entry access after freeing
The original code use a heap pointer after it is freed.
This patch fix it.

Fixes: a14de8b498 ("net/ixgbe: destroy consistent filter")
Cc: stable@dpdk.org

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Reviewed-by: Haiyue Wang <haiyue.wang@intel.com>
2021-07-09 09:31:52 +02:00
Joyce Kong
65b2ec7b4f net/i40e: fix descriptor scan on Arm
For Arm platforms, reading descs can get re-ordered, then the
status of DD bits will be discontinuous, so add the logic to
only process continuous descs by checking DD bits.

Fixes: 4861cde461 ("i40e: new poll mode driver")
Cc: stable@dpdk.org

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-07-09 05:05:19 +02:00
Dapeng Yu
a87688852d net/ice: fix VXLAN flow director creation
In original implementation, error returned when creating VXLAN flow
director with SCTP or TCP as layer 4 protocol of inner segment.

There are several root causes for the error:
1. ice_fdir_input_set_hdrs() set ICE_FLOW_SEG_HDR_UDP into protocol
header flag of inner segment of VXLAN FDIR rule, even if it shall be
ICE_FLOW_SEG_HDR_TCP or ICE_FLOW_SEG_HDR_SCTP
2. ice_fdir_input_set_hdrs() set ICE_FLOW_SEG_HDR_VXLAN into protocol
header flag of segments of VXLAN FDIR rule, it not necessary, and can
be set automatically by ice_flow_set_fld() later
3. flow type: ICE_FLTR_PTYPE_NONF_IPV4_UDP_VXLAN hides the flow type of
inner segment of VXLAN FDIR rule, then further causes function:
ice_fdir_get_gen_prgm_pkt() cannot write correct protocol id into inner
segment of training packet.

This patch fixes those defects described above.

Fixes: 855d23a07b ("net/ice: support VXLAN VNI field in flow director")
Cc: stable@dpdk.org

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-09 05:05:19 +02:00
Dapeng Yu
a7e1e2f764 net/ice/base: fix VXLAN flow director creation
In original implementation, error returned when creating VXLAN flow
director with SCTP or TCP as layer 4 protocol of inner segment.

There are several root causes for the error:
1. ice_fdir_udp4_vxlan_pkt[] is not adapted to the TCP and SCTP protocol.
Its length cannot hold TCP header, only UDP protocol was supported in
original implementation
2. VXLAN VNI offset: 45 is inconsistent with IETF RFC 7348

This patch fixes those defects described above.

Fixes: 608cd0a5e2 ("net/ice/base: support VXLAN VNI field in flow director")
Cc: stable@dpdk.org

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-09 05:05:19 +02:00
Ting Xu
931ee54072 net/ice: support QoS bandwidth config after VF reset in DCF
When VF reset happens, the QoS bandwidth configuration will be lost. If
the reset is not caused by DCB change, it is supposed to replay the
bandwidth configuration to VF by DCF. In this patch, when a vsi update
PF event is received from PF after VF reset, and it is confirmed that
DCB is not changed, bandwidth configuration will be replayed.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-09 05:05:19 +02:00
Ting Xu
3442a8d66a net/ice: fix check for QoS in DCF
This patch fixed some unreasonable error check. Move all checks into one
helper function before configuring. Skip the check for DCF (VF0).

Fixes: 3a6bfc37ea ("net/ice: support QoS config VF bandwidth in DCF")
Cc: stable@dpdk.org

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-09 05:05:19 +02:00
Wenjun Wu
00af17037d net/iavf: simplify flow director rules for IP fragment
This patch simplify the pattern of flow rules of FDIR for IP fragment.

Flow rule can be created by the following command:
1. flow create 0 ingress pattern eth /
   ipv4 fragment_offset spec 0x2000 fragment_offset mask 0x2000 /
   end <actions>
2. flow create 0 ingress pattern eth / ipv6 /
   ipv6_frag_ext fragment_offset spec 0x0001 fragment_offset mask 0x0001 /
   end <actions>

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-09 05:05:19 +02:00
Wenjun Wu
5ae0906ee7 net/ice: simplify flow director rules for IP fragment
This patch simplify the pattern of flow rules of FDIR for IP fragment.

Flow rule can be created by the following command:
1. flow create 0 ingress pattern eth /
   ipv4 fragment_offset spec 0x2000 fragment_offset mask 0x2000 /
   end <actions>
2. flow create 0 ingress pattern eth / ipv6 /
   ipv6_frag_ext fragment_offset spec 0x0001 fragment_offset mask 0x0001 /
   end <actions>

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-09 05:05:19 +02:00
David Marchand
850989f938 net/ice: fix memzone leak when firmware is missing
Caught by our QE.
When the firmware is missing, memzones were not released.

$ dpdk-testpmd -c 0x1f -a 0:0:0.0 -- -i
...

testpmd> dump_memzone
...
Zone 6: name:<RTE_METRICS>, len:0x15040, virt:0x1661b24c0, socket_id:0,
flags:0
physical segments used:
  addr: 0x140000000 iova: 0x140000000 len: 0x40000000 pagesz: 0x40000000

testpmd> port attach 0000:5e:00.0
Attaching a new port...
EAL: Using IOMMU type 1 (Type 1)
EAL: Probe PCI driver: net_ice (8086:159b) device: 0000:5e:00.0 (socket 0)
ice_load_pkg(): failed to open file: /lib/firmware/intel/ice/ddp/ice.pkg

ice_dev_init(): Failed to load the DDP package,Use safe-mode-support=1 to
 enter Safe Mode
EAL: Releasing PCI mapped resource for 0000:5e:00.0
EAL: Calling pci_unmap_resource for 0000:5e:00.0 at 0x2200000000
EAL: Calling pci_unmap_resource for 0000:5e:00.0 at 0x2202000000
EAL: Driver cannot attach the device (0000:5e:00.0)
EAL: Failed to attach device on primary process
testpmd: Failed to attach port 0000:5e:00.0

testpmd> dump_memzone
...
Zone 139: name:<ice_dma_17168374657430093156>, len:0x1000,
  virt:0x1660ed800, socket_id:0, flags:0 physical segments used:
  addr: 0x140000000 iova: 0x140000000 len: 0x40000000 pagesz: 0x40000000

With 20 tries attaching a net/ice port, we would end up with:

EAL: Probe PCI driver: net_ice (8086:159b) device: 0000:5e:00.0 (socket 0)
EAL: memzone_reserve_aligned_thread_unsafe(): Number of requested memzone
  segments exceeds RTE_MAX_MEMZONE
ice_dev_init(): Failed to initialize HW

Fixes: a4c8c48fe3 ("net/ice: load OS default package")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2021-07-09 04:34:07 +02:00
Viacheslav Ovsiienko
0fd928bbba common/mlx5: fix compatibility with OFED port query API
The compilation flag HAVE_MLX5DV_DR_DEVX_PORT depends on presence
of mlx5dv_query_devx_port routine in rdma-core library.

The mlx5dv_query_devx_port routine exists only in OFED versions
of rdma-core library and is being planned to be removed and replaced
with Upstream compatible mlx5dv_query_port.

As mlx5dv_query_devx_port is being removed all the dependencies on
the HAVE_MLX5DV_DR_DEVX_PORT compilation flag are reconsidered.

The new compilation flag HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT is for
backward compatibility with older OFED versions.

Fixes: 6cfe84fbe7 ("net/mlx5: fix port action for LAG")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:38 +02:00
Viacheslav Ovsiienko
d0cf77e8c2 common/mlx5: use new port query API if available
In order to get E-Switch vport identifiers the mlx5 PMD relies
on two approaches:
  [a] use port query API if it is provided by rdma-core library
  [b] otherwise, deduce vport ids from the related VF index
The latter is not reliable and may not work with newer kernel
drivers and in some configurations (LAG), causing E-Switch
malfunction. Hence, engaging the port query API is highly
desirable.

Depending on rdma-core version the port query API is:
  - very old OFED versions have no query API (approach [b])
  - rdma-core OFED < 5.5 provides mlx5dv_query_devx_port,
    HAVE_MLX5DV_DR_DEVX_PORT flag is defined (approach [a])
  - rdma-core OFED >= 5.5 has mlx5dv_query_port, flag
    HAVE_MLX5DV_DR_DEVX_PORT_V35 is defined (approach [a])
  - future OFED versions might remove mlx5dv_query_devx_port
    and HAVE_MLX5DV_DR_DEVX_PORT will not be defined
  - Upstream rdma-core < v35 has no port query API (approach [b])
  - Upstream rdma-core >= v35 has  mlx5dv_query_port, flag
    HAVE_MLX5DV_DR_DEVX_PORT_V35 is defined (approach [a])

In order to support the new mlx5dv_query_port routine, the
conditional compilation flag HAVE_MLX5DV_DR_DEVX_PORT_V35
is introduced by this patch. The flag HAVE_MLX5DV_DR_DEVX_PORT
is kept for compatibility with previous rdma-core versions.

Despite this patch is not a bugfix (it follows the introduced API
variation in underlying library), it resolves the compatibility
issue and is highly desired to be ported to DPDK LTS.

Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:37 +02:00
Jiawei Wang
e39226bde5 net/mlx5: control flow rules with identical pattern
In order to allow\disallow configuring rules with identical
patterns, the new device argument 'allow_duplicate_pattern'
is introduced.
If allow, these rules be inserted successfully and only the
first rule take affect.
If disallow, the first rule will be inserted and other rules
be rejected.

The default is to allow.
Set it to 0 if disallow, for example:
	-a <PCI_BDF>,allow_duplicate_pattern=0

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:35 +02:00
Shun Hao
a3b7af90ba net/mlx5: validate meter action in policy
This adds the validation when creating a policy with meter action.

Currently meter action is only allowed for green color in policy, and
8 meters are supported at maximum in one meter hierarchy.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:35 +02:00
Shun Hao
f890b030e0 net/mlx5: add meter hierarchy destroy and cleanup
When creating hierarchy meter, its color rules will increase next
meter's reference count, so when destroy the hierarchy meter, also
need to dereference the next meter's count.

During flushing all meters of a port, need to destroy all hierarchy
meters and their policies first, to dereference the last meter in
hierarchy. Then all meters have no reference and can be destroyed.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:34 +02:00
Shun Hao
8e5c9fea44 net/mlx5: support meter hierarchy drop count
When using meter hierarchy with multiple meters, every meter may have
drop counter, so a packet being set red color by one meter should be
counted to that specific meter only.

To support this, add tag action in the color rule so packet going to
next new meter can have its meter id, so as to be counted to the
correct drop counter in drop table.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:33 +02:00
Shun Hao
50cc92dde8 net/mlx5: support meter action in meter policy
This makes the meter policy support meter action. So multiple meters
can be chained as a meter hierarchy.

Only termination meter is allowed as the last meter in a hierarchy,
and there're two cases:
1. The last meter has non-RSS policy, can directly create sub-policy
and color rules during each meter's policy creation.
2. The last meter has RSS policy, don't create sub-policy/rules when
creating meter policy. Only when a RTE flow is using the meter hierarchy,
will iterate all meters of the hierarchy and create needed sub-
policies and color rules for them.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:33 +02:00
Xiaoyu Min
a26cc30fa0 net/mlx5: limit inner RSS expansion for MPLS
If user wants to do MPLS inner RSS and only provides pattern
till MPLS without inner items [1], RSS expansion will expand flows
into 13 sub-flows[2] which is too many and it impacts flow insert
rate, stack usage becomes large as well.

This expansion into 13 sub-flows seems not worthy of and it can
be significantly reduced (i.e, 7 sub-flows [3]) by user providing
at least one inner L2/L3 item [4].

[1]:
pattern eth / ipv4 / udp / mpls / end actions rss type tcp udp ip
end level 2 / end

[2]:
eth / ipv4 / udp / mpls
eth / ipv4 / udp / mpls / ipv4
eth / ipv4 / udp / mpls / ipv4 / udp
eth / ipv4 / udp / mpls / ipv4 / tcp
eth / ipv4 / udp / mpls / ipv6
eth / ipv4 / udp / mpls / ipv6 / udp
eth / ipv4 / udp / mpls / ipv6 / tcp
eth / ipv4 / udp / mpls / eth / ipv4
eth / ipv4 / udp / mpls / eth / ipv4 / udp
eth / ipv4 / udp / mpls / eth / ipv4 / tcp
eth / ipv4 / udp / mpls / eth / ipv6
eth / ipv4 / udp / mpls / eth / ipv6 / udp
eth / ipv4 / udp / mpls / eth / ipv6 / tcp

[3]:
eth / ipv4 / udp / mpls / eth
eth / ipv4 / udp / mpls / eth / ipv4 / udp
eth / ipv4 / udp / mpls / eth / ipv4 / tcp
eth / ipv4 / udp / mpls / eth / ipv6
eth / ipv4 / udp / mpls / eth / ipv6 / udp
eth / ipv4 / udp / mpls / eth / ipv6 / tcp

[4]:
pattern eth / ipv4 / udp / mpls / eth / end actions rss type tcp udp ip
level 2 / end

Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:32 +02:00
Xiaoyu Min
84f4764c22 net/mlx5: fix MPLS RSS expansion
MPLSoUDP and MPLSoGRE are supported by PMD from
rte flow point of view.

RSS expansion doesn't support above but, instead, supports
normal MPLS over L2, which actually will be rejected by PMD.

This patch removes RSS expansion support of the MPLS over L2
and adds support of MPLSoUDP and MPLSoGRE.

In addition to above, support for eth over MPLS expansion is
added too.

Fixes: a4a5cd21d2 ("net/mlx5: add flow MPLS item")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:31 +02:00
Xiaoyu Min
14ad99d78a net/mlx5: remove unsupported flow item MPLS over IP
HW doesn't support match MPLS over IP traffic.

Remove related code.

Fixes: d1abe664dd ("net/mlx5: add MPLS to Direct Verbs flow engine")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:31 +02:00
Alexander Kozyrev
8762718d72 net/mlx5: fix offset calculation for modify field action
Offsets are not taken into account during MAC addresses
manipulation for the MODIFY_FIELD action. That leads to
a wrong split between 0-15 and 16-47 bits and corrupted
data being copied to/from MAC addresses. Use both source
and destination offsets to calcucate the proper modify
header action specification.

Fixes: fdd0c046f4 ("net/mlx5: fix modify field action order for MAC")
Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-08 22:09:30 +02:00
Gregory Etelson
cdc32d127e net/mlx5: fix L4 integrity translation
MLX5 PMD supports L3 and L4 integrity bits.
L4 checksum-ok bit was not translated correctly.
The patch updates the l4_csum_ok integrity bit translation.

Fixes: 79f8952783 ("net/mlx5: support integrity flow item")
Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-08 22:09:30 +02:00
Viacheslav Ovsiienko
32d1e4dbad common/mlx5: fix Netlink receive message buffer size
If there are many VFs the Netlink message length sent by kernel
in reply to RTM_GETLINK request can be large. We should query
the size of message being received in advance and allocate
the large enough buffer to handle these large messages.

Fixes: ccdcba53a3 ("net/mlx5: use Netlink to add/remove MAC addresses")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-08 22:09:29 +02:00
Xiaoyu Min
4b1cb50a86 net/mlx5: fix match MPLS over GRE with key
Currently PMD needs previous layer information in order to set
corresponding match field for MPLSoGRE or MPLSoUDP.

GRE_KEY item is missing as supported previous layer when translate
item MPLS, which causes flow[1] cannot match MPLS over GRE traffic.

According to RFC4023, MPLS over GRE tunnel with optional key
field needs to be supported too.

By adding missing GRE_KEY as supported previous layer fix problem.

[1]:
flow create 0 ingress pattern eth / ipv6 / gre k_bit is 1 / gre_key /
mpls label is 966138 / end actions queue index 1 / mark id 0xa / end

Fixes: a7a0365565 ("net/mlx5: match GRE key and present bits")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:28 +02:00
Gregory Etelson
be548b9c9d net/mlx5: fix pattern expansion in RSS flow rules
Flow rule pattern may be implicitly expanded by the PMD if the rule
has RSS flow action. The expansion adds network headers to the
original pattern. The new pattern lists all network levels that
participate in the rule RSS action.

The patch validates that buffer for expanded pattern has enough bytes
for new flow items.

Fixes: c7870bfe09 ("ethdev: move RSS expansion code to mlx5 driver")
Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-08 22:09:28 +02:00
Haifei Luo
5db9318f76 net/mlx5: add more details to flow dump
Currently the flow dump provides few information about actions
- just the pointers. Add implementations to display details for
counter, modify_hdr and encap_decap actions.

For counter, the regular flow operation query is engaged and
the counter content information is provided, including hits
and bytes values.For modify_hdr, encap_and decap actions,
the information stored in the ipool objects is dumped.

There are the formats of information presented in the dump:
	Counter: rec_type,id,hits,bytes
	Modify_hdr: rec_type,id,actions_number,actions
	Encap_decap: rec_type,id,buf

Signed-off-by: Haifei Luo <haifeil@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-08 22:09:27 +02:00
Feifei Wang
1c196da274 net/mlx5: fix r/w lock usage in DMA unmap
For mlx5 DMA unmap, write lock should be used for rebuilding memory
region cache table rather than read lock.

Fixes: 989e999d93 ("net/mlx5: support PCI device DMA map and unmap")
Cc: stable@dpdk.org

Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-08 22:09:27 +02:00
Shun Hao
48fbc1be82 net/mlx5: fix meter policy flow match item
Currently when creating meter policy, a src port_id match item will
always be added in switch domain. So if one meter is used by another
port, it will not work correctly.

This issue is solved:
1. If policy fate action is port_id, add the src port_id match item,
and the meter cannot be shared by another port.
2. If policy fate action isn't port_id, don't add the src port_id
match, meter can be shared by another port.

This fix enables one meter being shared by different ports. User can
create a meter flow using a port_id match item to make this meter
shared by other port.

Fixes: afb4aa4f12 ("net/mlx5: support meter policy operations")
Cc: stable@dpdk.org

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:26 +02:00
Shun Hao
3c481324ba net/mlx5: fix meter flow direction check
When preparing prefix flow using ASO meter, if it's tx flow, need
to make meter action the first one.

Currently the check of flow direction in switch domain is incorrect
that it checks the flow dev port only.

This adds the fix for the check that if there's port_id match item
in flow, use that port_id as src port to determine flow direction.

Fixes: c99b4f8bc2 ("net/mlx5: support ASO meter action")
Cc: stable@dpdk.org

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:25 +02:00
Shun Hao
efcce4dcdc net/mlx5: fix meter policy ID table container
The meter policy handlers are managed by user IDs and the driver used l3
table in order to map the user ID to the internal driver handler of the
policy.

The l3 table was wrongly saved in the shared device structure which
manages all the switch domain ports what made the user IDs shared
between different ethdev ports.

Move the policy l3 table to be per port by saving it in the port private
structure.

Fixes: afb4aa4f12 ("net/mlx5: support meter policy operations")
Cc: stable@dpdk.org

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:25 +02:00
Shun Hao
a295c69a8b net/mlx5: optimize meter profile lookup
Currently a list is used to save all meter profile ids, which is
not efficient when looking up profile from huge amount of profiles.

This changes to use an l3 table instead to save meter profile ids,
so as to improve the lookup performance.

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:24 +02:00
Dmitry Kozlyuk
e60561cc95 doc: add limitation for ConnectX-4 with L2 in mlx5 guide
ConnectX-4 and ConnectX-4 Lx NICs require all L2 headers of transmitted
packets to be inlined. By default only first 18 bytes are inlined,
which is insufficient if additional encapsulation is used, like Q-in-Q.
Thus, default settings caused such traffic to be dropepd on Tx.
Document a recommendation to increase inlined data size in such cases.

Fixes: 505f1fe426 ("net/mlx5: add Tx devargs")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-08 22:09:23 +02:00
Viacheslav Ovsiienko
52e1ece50a net/mlx5: fix TSO multi-segment inline length
The inline data length for TSO ethernet segment should be
calculated from the TSO header instead of the inline size
configured by txq_inline_min devarg or reported by the NIC.
It is imposed by the nature of TSO offload - inline header
is being duplicated to every output TCP packet.

Fixes: cacb44a099 ("net/mlx5: add no-inline Tx flag")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-08 22:09:23 +02:00
Jiawei Wang
b3880af2ce net/mlx5: fix representor ID check for sampling
The representor definition was introduced in the latest code.
For non-representor port, like PF port, use the 0xffff instead of -1.

This patch updates the representor id checking during splitting sample
flow.

Fixes: cb95feefdd ("net/mlx5: support sub-function representor")
Cc: stable@dpdk.org

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Xueming Li <xuemingl@nvidia.com>
2021-07-08 22:09:22 +02:00
Michael Baum
2f6c2adbe5 common/mlx5: fix memory region leak
All the mlx5 drivers using MRs for data-path must unregister the mapped
memory when it is freed by the dpdk process.

Currently, only the net/eth driver unregisters MRs in free event.

Move the net callback handler from net driver to common.

Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:22 +02:00
Jiawei Wang
3057f33779 net/mlx5: fix flow modify action validation
The introduced MODIFY_FIELD action was used to manipulate
the packet header field through copy or set operations.

These modify header actions should be counted as one action
in low level, the current code used wrong actions flags
checking for modify field action.

This patch update the action flags checking into the correct
MODIFY_HDR_ACTIONS set.

Fixes: 641dbe4fb0 ("net/mlx5: support modify field flow action")
Cc: stable@dpdk.org

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-08 22:09:21 +02:00
Viacheslav Ovsiienko
ec837ad0fc net/mlx5: fix multi-segment inline for the first segments
Before 19.08 release the Tx burst routines of mlx5 PMD
provided data inline for the first short segments of the
multi-segment packets. In the release 19.08 mlx5 Tx datapath
was refactored and this behavior was broken, affecting the
performance.

For example, the T-Rex traffic generator might use small
leading segments to handle packet headers and performance
degradation was noticed.

If the first segments of the multi-segment packet are short
and the overall length is below the inline threshold it
should be inline into the WQE to fix the performance.

Fixes: 18a1c20044 ("net/mlx5: implement Tx burst template")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-08 22:09:20 +02:00
Li Zhang
9f4a192328 net/mlx5: fix meter policy with RSS action
When creating the meter sub-policy RSS rule,
the RSS descriptor was used before its update.
It also need update tunnel bit in RSS descriptor
after flow translate.

Use it only when it is updated.

Fixes: ec962bad14 ("net/mlx5: fix metering cleanup on stop")
Cc: stable@dpdk.org

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:20 +02:00
Tal Shnaiderman
a6a18d06f5 net/mlx5: add TCP and IPv6 to supported items for Windows
WINOF2 2.70 Windows kernel driver allows DevX rule creation
of types TCP and IPv6.

Added the types to the supported items in mlx5_flow_os_item_supported
to allow them to be created in the PMD.

Added description of new rules support in Windows kernel driver WINOF2 2.70
to the mlx5 driver guide.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-08 22:09:13 +02:00
Ajit Khaparde
5ba7c65864 net/bnxt: fix Rx interrupt setting
Don't set rxq interrupt config
Applications can set the rxq interrupt config to 1 or 0 as needed.
If an application is not interested in handling Rx interrupts and
prefers to poll Rx rings, there is no need for the PMD to set this
config option to 1.

Fixes: 1fe427fd08 ("net/bnxt: support enable/disable interrupt")
Cc: stable@dpdk.org

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
2021-07-08 05:55:57 +02:00
Ajit Khaparde
b3fa83945a net/bnxt: fix ring allocation and free
Fix handling of ring alloc and free logic to fix check for invalid ring and
context IDs. This also avoids code duplication.

Fixes: 6133f20797 ("net/bnxt: add Rx queue create/destroy")
Fixes: 51c87ebafc ("net/bnxt: add Tx queue create/destroy")
Cc: stable@dpdk.org

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
2021-07-08 05:55:56 +02:00
Ajit Khaparde
0105ea1296 net/bnxt: support runtime queue setup
Add support for runtime Rx and Tx queue setup. This will allow
Rx/Tx queue setup after the interface is started.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-07-08 05:55:56 +02:00
Lance Richardson
df100ffe25 net/bnxt: remove dead code
Code related to maintaining completion ring "valid" state is
no longer needed, remove it.

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
2021-07-08 05:55:55 +02:00
Lance Richardson
2b5a36f4df net/bnxt: fix scalar Tx completion handling
Preserve the raw (unmasked) transmit completion ring
consumer index.

Remove cache prefetches that have no measurable performance
benefit.

Fixes: c7de4195cc ("net/bnxt: modify ring index logic")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-07-08 05:55:54 +02:00
Lance Richardson
ce5c57ac01 net/bnxt: fix Tx descriptor status implementation
With Tx completion batching, a single transmit completion
can correspond to one or more transmit descriptors, adjust
implementation to account for this.

RTE_ETH_TX_DESC_DONE should be returned for descriptors that
are available for use instead of RTE_ETH_TX_DESC_UNAVAIL.

Fixes: 5735eb2419 ("net/bnxt: support Tx batching")
Fixes: 478ed3bb7b ("net/bnxt: support Tx descriptor status")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-07-08 05:55:53 +02:00
Lance Richardson
c6c90a33de net/bnxt: fix ring and context memory allocation
Use requested socket ID when allocating memory for transmit rings,
receive rings, and completion queues. Use device NUMA ID when
allocating context memory, notification queue rings, async
completion queue rings, and VNIC attributes.

Fixes: 6eb3cc2294 ("net/bnxt: add initial Tx code")
Fixes: 9738793f28 ("net/bnxt: add VNIC functions and structs")
Fixes: f8168ca0e6 ("net/bnxt: support thor controller")
Fixes: bd0a14c99f ("net/bnxt: use dedicated CPR for async events")
Fixes: 683e5cf792 ("net/bnxt: use common NQ ring")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-07-08 05:55:52 +02:00