Commit Graph

2887 Commits

Author SHA1 Message Date
Hemant Agrawal
ef18dafef4 net/dpaa2: support L3 and L4 checksum offload
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
bee61d863e net/dpaa2: attach the buffer pool to dpni
This patch configures a MC-DPNI based DPAA2 PMD network
port with a DPBP based buffer pool.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
33fad4326c net/dpaa2: configure MAC address at init
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
89c2ea8f54 net/dpaa2: add RSS flow distribution
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
3e5a335d3f net/dpaa2: add basic operations
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
e6b82573f6 net/dpaa2: support MC dpni object
This patch add support for dpni object support in MC driver.

DPNI represent a network interface object in DPAA2.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
d401ead13f net/dpaa2: support debug log
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
c147eae01c net/dpaa2: introduce NXP DPAA2 driver
add support for fsl-mc bus based dpaa2 pmd driver.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
5dc43d22b5 mempool/dpaa2: add hardware offloaded mempool
DPAA2 Hardware Mempool handlers allow enqueue/dequeue from NXP's
QBMAN hardware block.
CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS is set to 'dpaa2', if the pool
is enabled.

This memory pool currently supports packet mbuf type blocks only.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
a0d5c9caf0 bus/fslmc: add frame queue based dq storage
This patch adds generic functions for allowing dq storage
for the frame queues.
As the frame queues are common resource for different drivers
this is helpful.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
352db38111 bus/fslmc: support DMA mapping for ARM SMMU
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
df0011c923 bus/fslmc: add physical-virtual address translation helpers
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
d64abecf57 bus/fslmc: add packet FLE definitions
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
3d6a286ca6 bus/fslmc: define VLAN header length
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
d08e662a4b bus/fslmc: introduce true and false macros
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
beb2a7865d bus/fslmc: define hardware annotation area size
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
73cddc740c bus/fslmc: define queues for DPAA2 devices
Before DPAA2 devices can communicate using hardware queues, this patch
adds queue definitions in the FSLMC bus which the DPAA2 devices would
instantiate.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
d93818e1d1 bus/fslmc: affine dpio to crypto threads
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
3981b74fc7 bus/fslmc: support hardware mempool object
Each mempool instance is represented by a DPBP object
from the FSL-MC bus.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
5374e50f10 bus/fslmc: add dpio portal driver
The portal driver is bound to DPIO objects discovered on the fsl-mc bus and
provides services that:
- allow other drivers, such as the Ethernet driver, to enqueue and dequeue
  frames for their respective objects

A system will typically allocate 1 DPIO object per CPU to allow queuing
operations to happen simultaneously across all CPUs.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
52d4f4c765 bus/fslmc: support debug log
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
14ec4ddd2e bus/fslmc: scan for net and crypto device
This patch will add support in fslmc vfio process to
scan and parse the dpni and dpseci object for net and crypto
devices. It will add the scanned devices to the fslmc bus.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
70e58cf74c bus/fslmc: support VFIO
Add support for using VFIO for dpaa2 based fsl-mc bus.

There are some differences in the way vfio used for fsl-mc bus
from the eal vfio.
 - The scanning of bus for individual objects on the basis of
   the DPRC container.
 - The use and mapping of MC portal for object access

With the evolution of bus model, they can be further aligned with
eal vfio code.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
7ee4686401 bus/fslmc: support MC dpbp object
DPBP object represent a hw based buffer pool instance
in the DPAA2 hardware.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
2c63db040e bus/fslmc: support MC dpio object
This patch adds the DPIO object support in MC driver.

DPIO - Data Path Input Output represent the processing
context to access the QBMAN HW for packet I/O.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
3af733ba8d bus/fslmc: introduce MC object functions
This patch introduces the DPAA2 MC(Management complex Driver).

This is a minimal set of low level functions to send and
receive commands to the fsl-mc. It includes support for basic
management commands and commands to manipulate MC objects.

This is common to be used by various DPAA2 PMDs. e.g.net, crypto
and other drivers.

This is a low level library also used in kernel.

Signed-off-by: Cristian Sovaiala <cristian.sovaiala@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
531b17a780 bus/fslmc: add QBMAN driver to bus
QBMAN, is a hardware block which interfaces with the other
accelerating hardware blocks (For e.g., WRIOP) on NXP's DPAA2
SoC for queue, buffer and packet scheduling.

This patch introduces a userspace driver for interfacing with
the QBMAN hw block.

The qbman-portal component provides APIs to do the low level
hardware bit twiddling for operations such as:
  -initializing Qman software portals
  -building and sending portal commands
  -portal interrupt configuration and processing

This same/similar code is used in kernel and compat file is used
to make it working in user space.

Signed-off-by: Geoff Thorpe <geoff.thorpe@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Hemant Agrawal
7e7df6d0a4 bus/fslmc: introduce fsl-mc bus driver
The fslmc bus driver is a rte_bus driver which scans the fsl-mc bus
for NXP DPAA2 SoCs.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-04-19 15:37:37 +02:00
Michal Krawczyk
bc5ef57d43 net/ena: calculate partial checksum if DF bit is disabled
When TSO is disabled we still have to calculate partial checksum if DF bit
if turned off. This is caused by firmware bug.

First of all, we must make sure that we are dealing with IPV4 packet.
If not, we will just skip further checking of this packet and move to
the next one.

If application will not set m2_len field, we assume we that it was Ethernet
frame because we have to look inside the packet to check for the DF flag.
To make it work properly, PMD is assuming that before sending
packet application called function rte_eth_tx_prepare().

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Jakub Palider <jpalider@gmail.com>
Acked-by: Jan Medala <jan.medala@outlook.com>
2017-04-19 15:37:37 +02:00
Michal Krawczyk
2732e07ad1 net/ena: cleanup if refilling of Rx descriptors fails
If wrong number of descriptors for refilling was passed to the Rx
repopulate function, there was memory leak which caused memory pool to
run out of resources in longer go.

In case of fail when refilling Rx descriptors, all additional mbufs
have to be released.

Fixes: 1173fca25a ("ena: add polling-mode driver")
Cc: stable@dpdk.org

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Jakub Palider <jpalider@gmail.com>
Acked-by: Jan Medala <jan.medala@outlook.com>
2017-04-19 15:37:37 +02:00
Michal Krawczyk
ec78af6bc0 net/ena: fix delayed cleanup of Rx descriptors
On RX path, after receiving bunch of packets, variable tracking
available descriptors in HW queue was not updated.

To fix this issue, variable tracking used descriptors must be updated
after receiving packets - it must be reduced by the amount of received
descriptors in current batch.

Additionally, variable next_to_clean in rx_ring must be updated before
entering ena_populate_rx_queue() to keep it up to date with the current
ring state.

Fixes: 1daff5260f ("net/ena: use unmasked head and tail")
Cc: stable@dpdk.org

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Jakub Palider <jpalider@gmail.com>
Acked-by: Jan Medala <jan.medala@outlook.com>
2017-04-19 15:37:37 +02:00
Michal Krawczyk
a467e8f37a net/ena: fix Rx descriptors allocation
When application tried to allocate 1024 descriptors, device was not
initializing properly.

This patch solves it by avoiding allocation of all descriptors in the
ring in one attempt. At least one descriptor must remain unused in the
HW ring.

Fixes: 1173fca25a ("ena: add polling-mode driver")
Cc: stable@dpdk.org

Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Jakub Palider <jpalider@gmail.com>
Acked-by: Jan Medala <jan.medala@outlook.com>
2017-04-19 15:37:37 +02:00
Ed Czeck
9ff8fe95dc net/ark: report hardware status on init
Expose additional fpga status registers.
Report hardware status during PMD init.

Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
Acked-by: John Miller <john.miller@atomicrules.com>
2017-04-19 15:37:37 +02:00
Ed Czeck
3574222fc4 net/ark: set mbuf time stamp field on Rx
Time stamp was carried in the packet meta data, but not
place in the mbuf. The new time stamp field is the proper
destination.

Remove the setting of data offset since this is done by
rte_pktmbuf_free()

Signed-off-by: Ed Czeck <ed.czeck@atomicrules.com>
Acked-by: John Miller <john.miller@atomicrules.com>
2017-04-19 15:37:37 +02:00
Nélio Laranjeiro
6703d83634 net/mlx5: remove extra check on Rx
Removing this check improves performance as VLAN and CRC stripping are
enabled most of the time.

Convert MLX5_CQE_VLAN_STRIPPED to network order to speed up the check
instead of doing it on the completion queue entry field.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-04-19 15:37:37 +02:00
Marcin Wilk
695cd416ce net/thunderx: fix stats access out of bounds
Trying to assign more queues to stats struct break only from one loop
when the maximum size is reached. Outside loop iteration is continued.
This leads to access an array out of bounds.

Fixes: 21e3fb0050 ("net/thunderx: add final bits for secondary queue support")
Cc: stable@dpdk.org

Signed-off-by: Marcin Wilk <marcin.wilk@caviumnetworks.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-04-19 15:37:37 +02:00
Wenzhuo Lu
a3bc447b40 net/ixgbe: move private APIs to a specific file
Create a new file rte_pmd_ixgbe.c for all the private
APIs. Move all the related code to the new file.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2017-04-19 15:37:37 +02:00
Wenzhuo Lu
96974a6600 net/i40e: move private APIs to a specific file
Create a new file rte_pmd_i40e.c for all the private
APIs. Move all the related code to the new file.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2017-04-19 15:37:37 +02:00
Jingjing Wu
1d43099033 net/i40e: fix default PFC setting
To keep consistent with previous release, Priority Flow Control (PFC)
need to be disabled by default. This patch fixes it.

This also fixes an issue where traffic was not forwarded by testpmd
occasionally. In those cases ~4770 pps seen on one of the ports rather
than the full rate (>20mpps).

Fixes: 6f0a707e5b ("net/i40e: enable DCB on SRIOV VFs")

Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Tested-by: David Hunt <david.hunt@intel.com>
2017-04-19 15:37:37 +02:00
Jeff Guo
e711f8a8cd net/i40e: fix hash input set on X722
There are some new PCTYPEs on X722, but they have not been announced
on the RTE lib, so if it can not set corresponding hash input set for
these packet type, the hash function won’t work.

So we need to handle them base on the translation of the new
PCTYPE and the original PCTYPE.

Fixes: b6a0ec4182 ("i40e: use AQ for Rx control register read/write")

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
2017-04-19 15:37:37 +02:00
John Daley
fb83a23eeb net/enic: remove initialization of some mbuf fields
Remove initialization of next and nb_segs mbuf fields in the Rx path
since they are now initialized in the mbuf pool.

See commit 8f094a9ac5 ("mbuf: set mbuf fields while in pool").

Signed-off-by: John Daley <johndale@cisco.com>
2017-04-19 15:37:37 +02:00
Jerin Jacob
5ba411079f net/thunderx: use internal byte ordering macros
The base code was using native GCC macros
for endian detection. Change to portable
rte_byteorder.h based endian detection.

Fixes: 262d43fe20 ("net/thunderx/base: add HW register definitions")

Suggested-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-04-19 15:37:37 +02:00
Pascal Mazon
69ebb8ae17 net/tap: update driver param string
Fixes: 2bc06869cd ("net/tap: add remote netdevice traffic capture")

Signed-off-by: Pascal Mazon <pascal.mazon@6wind.com>
2017-04-19 15:37:37 +02:00
Konstantin Ananyev
b81f5fa27f net/ixgbe: remove option to disable offload flags
Having packets received without any offload flags given in the mbuf is not
very useful, and performance tests with testpmd indicates little
benefit is got with the current code by turning off the flags. This makes
the build-time option pointless, so we can remove it.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2017-04-19 15:37:37 +02:00
Konstantin Ananyev
f160666a10 net/ixgbe: eliminate mbuf write on rearm
With the mbuf rework, we now have 8 contiguous bytes to be rearmed in the
mbuf just before the 8-bytes of olflags. If we don't do the rearm write
inside the descriptor ring replenishment function, and delay it to
receiving the packet, we can do a single 16B write inside the RX function
to set both the rearm data, and the flags together.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2017-04-19 15:37:37 +02:00
Jianbo Liu
309f95f2b6 net/i40e: sync between x86 and arm64 vector PMD
Porting two changes from x86 SSE implematation.
    net/i40e: fix checksum flag in x86 vector Rx
    net/i40e: eliminate mbuf write on rearm

Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>
2017-04-19 15:37:37 +02:00
Bruce Richardson
c3f7edcd8c net/i40e: remove option to disable offload flags
Having packets received without any offload flags given in the mbuf is not
very useful, and performance tests with testpmd indicates little to no
benefit is got with the current code by turning off the flags. This makes
the build-time option pointless, so we can remove it.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
2017-04-19 15:37:37 +02:00
Bruce Richardson
f4356d7ca1 net/i40e: eliminate mbuf write on rearm
With the mbuf rework, we now have 8 contiguous bytes to be rearmed in the
mbuf just before the 8-bytes of olflags. If we don't do the rearm write
inside the descriptor ring replenishment function, and delay it to
receiving the packet, we can do a single 16B write inside the RX function
to set both the rearm data, and the flags together.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
2017-04-19 15:37:37 +02:00
Shijith Thotton
21ea96388e net/liquidio: fix null pointer check
Fix null pointer check in release Rx/Tx queue APIs.

Coverity issue: 1423923
Coverity issue: 1423924
Fixes: 9a30013b98 ("net/liquidio: add API to release Rx queue")
Fixes: cf6bfcbea1 ("net/liquidio: add API to release Tx queue")

Signed-off-by: Shijith Thotton <shijith.thotton@caviumnetworks.com>
2017-04-19 15:37:37 +02:00
Shijith Thotton
de6d0f59f0 net/liquidio/base: fix mbox command initialization
Initialize mail box command to request VF FLR. Data field was
uninitialized before as it was not required and caused the following
error during scan.

Coverity issue: 1384518
Fixes: cdb166963c ("net/liquidio: add API for VF FLR")

Signed-off-by: Shijith Thotton <shijith.thotton@caviumnetworks.com>
2017-04-19 15:37:37 +02:00