67 Commits

Author SHA1 Message Date
Thomas Monjalon
f5862ae99e cryptodev: revert Chacha20-Poly1305 AEAD algorithm
API makes think that rte_cryptodev_info_get() cannot return
a value >= 3 (RTE_CRYPTO_AEAD_LIST_END in 19.11).
20.02-rc1 was returning 3 (RTE_CRYPTO_AEAD_CHACHA20_POLY1305).
So the ABI compatibility contract was broken.

It could be solved with some function versioning,
but because a lack of time, the feature is reverted for now.

This reverts following commits:
- 6c9f3b347e21 ("cryptodev: add Chacha20-Poly1305 AEAD algorithm")
- 2c512e64d600 ("crypto/qat: support Chacha Poly")
- d55e01f579e1 ("test/crypto: add Chacha Poly cases")

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-02-05 15:14:46 +01:00
Arek Kusztal
2c512e64d6 crypto/qat: support Chacha Poly
This patchset adds Chacha20-Poly1305 implementation to Intel
QuickAssist Technology pmd.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-01-16 17:10:36 +01:00
Sunila Sahu
40726a9ad5 crypto/octeontx2: support ECPM
Add support asymmetric operation EC Point MUltiplication,
in crypto_octeontx2 PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
2020-01-15 15:01:55 +01:00
Sunila Sahu
99faef8325 crypto/octeontx: support ECPM
Add support for asymmetric operation EC Point Multiplication,
in crypto_octeontx PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
2020-01-15 15:01:55 +01:00
Balakrishna Bhamidipati
e98dc331e9 cryptodev: support ECPM
Asymmetric crypto library is extended to add ECPM (Elliptic Curve Point
Multiplication). The required xform type and op parameters are
introduced.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-01-15 15:01:55 +01:00
Sunila Sahu
2e12bd06fe crypto/octeontx2: support ECDSA
Adding support for ECDSA asymmetric crypto
operations in crypto_octeontx2 PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Balakrishna Bhamidipati <bbhamidipati@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
2020-01-15 15:01:55 +01:00
Sunila Sahu
aa2cbd32e9 crypto/octeontx: support ECDSA
Adding support for ECDSA asymmetric crypto operations
in crypto_octeontx PMD.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
2020-01-15 15:01:55 +01:00
Ayuj Verma
7bb4ea3246 cryptodev: support ECDSA
Asymmetric crypto library is extended to add ECDSA. Elliptic curve
xform and ECDSA op params are introduced.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-01-15 15:01:56 +01:00
Arek Kusztal
6c9f3b347e cryptodev: add Chacha20-Poly1305 AEAD algorithm
This patch adds Chacha20-Poly1305 AEAD algorithm to Cryptodev.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-01-15 13:34:02 +01:00
Akhil Goyal
b795e127e8 crypto/openssl: support in-place scatter gather
As per current support, Scatter Gather is only supported
for out of place input and output buffers.
This patch add support for Scatter Gather for in-place buffers.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2019-11-20 12:35:51 +01:00
Pablo de Lara
4b70152374 crypto/aesni_gcm: support in-place chained mbufs
IPSec Multi buffer library supports encryption on multiple segments.
When dealing with chained buffers (multiple segments), as long as
the operation is in-place, the destination buffer does not have to
be contiguous (unlike in the case of out-of-place operation).
Therefore, the limitation of not supporting in-place chained mbuf
can be removed.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2019-11-08 13:51:16 +01:00
Arek Kusztal
539a3216e1 crypto/qat: support RSA CRT in asym
This commit extends RSA implementation by CRT option

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-23 16:57:06 +02:00
Arek Kusztal
e2c5f4ea99 crypto/qat: support RSA in asym
This commit adds RSA algorithm to asymmetric pmd
using pair (n, d) private key

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-23 16:57:06 +02:00
Arek Kusztal
e1ed5a73cd crypto/qat: support session-less for asym ops
This patch adds option to use asymmetric crypto pmd with
session-less support.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-23 16:57:06 +02:00
Kanaka Durga Kotamarthy
364b9bfc81 crypto/octeontx2: add asymmetric session
This patch adds asymmetric session setup and free routines.
RSA and modexp operations are supported.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Kanaka Durga Kotamarthy <kkotamarthy@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Anoob Joseph
6aa9ceaddf crypto/octeontx2: add symmetric capabilities
This patch adds the symmetric capabilities
for OCTEON TX2 crypto PMD.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Anoob Joseph
2f8a1b963e crypto/octeontx2: add PMD skeleton
Adding OCTEON TX2 crypto PMD skeleton.
Enabling the driver by default in common_base.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Kanaka Durga Kotamarthy
33bcaae5f8 crypto/octeontx: add asymmetric session operations
Add asymmetric session setup and free functions. RSA and modexp
operations are supported.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Kanaka Durga Kotamarthy <kkotamarthy@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Hemant Agrawal
c5788a1097 crypto/dpaa_sec: support SNOW3G and ZUC
This patch add support for ZUC and SNOW 3G in
non-PDCP offload mode.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Arek Kusztal
f2b2a44971 cryptodev: add asymmetric session-less
This commit adds asymmetric session-less option to
rte_crypto_asym_op. Feature flag for session-less is added
to rte_cryptodev.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-23 16:57:06 +02:00
Nagadheeraj Rottela
9282bdee5c crypto/nitrox: add cipher auth chain processing
Add cipher auth crypto chain processing functionality in symmetric
request manager. Update the release notes.

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Hemant Agrawal
b69ee13859 crypto/dpaa2_sec: support ZUC ciphering/integrity
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Hemant Agrawal
9ecbe824af crypto/dpaa2_sec: support SNOW3G cipher/integrity
Adding basic framework to use snow3g f8 and f9 based
ciphering or integrity with direct crypto apis.
This patch does not support any combo usages yet.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 11:50:12 +02:00
Damian Nowak
40002f6c2a crypto/qat: extend support for digest-encrypted auth-cipher
This patch adds condition to be met when using
out-of-place auth-cipher operations. It checks
if the digest location overlaps with the data to
be encrypted or decrypted and if so, treats as a
digest-encrypted case.
Patch adds checking, if the digest is being
encrypted or decrypted partially and extends PMD
buffers accordingly.
It also adds feature flag for QuickAssist
Technology to emphasize it's support for digest
appended auth-cipher operations.

Signed-off-by: Damian Nowak <damianx.nowak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-07-05 15:28:14 +02:00
Damian Nowak
90197eb094 cryptodev: add digest encrypted feature flag
Some PMDs can only support digest being
encrypted separately in auth-cipher operations.
Thus it is required to add feature flag in PMD
to reflect if it does support digest-appended
both: digest generation with encryption and
decryption with digest verification.
This patch also adds information about new
feature flag to the release notes.

Signed-off-by: Damian Nowak <damianx.nowak@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-07-05 15:28:14 +02:00
Arek Kusztal
bfd84d7e7f doc: update guide and release notes for QAT crypto
This patch adds release notes to 19.05 release document, and more
detailed description to Intel QuickAssist Technology driver
documentation files for asymmmetric crypto PMD.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2019-05-01 16:12:47 +02:00
Fiona Trahe
7df9d02e68 doc: fix missing asymmetric crypto table
Fixes: 11e5ba72cf67 ("doc: add crypto asymmetric feature list")
Cc: stable@dpdk.org

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-18 16:01:28 +02:00
Pablo de Lara
81fe96a0ce crypto/aesni_gcm: use architecture independent API
IPSec Multi-buffer library has recently added API
that sets pointers depending on the architecture, at initiliazation,
in version 0.52.

AESNI MB PMD was updated with these changes, but not
the AESNI GCM PMD, which also uses the same library.

This makes the PMD to be only compatible with version 0.52,
but makes both PMD consistent on version compatibility,
plus adds support for AVX512.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2019-04-18 16:01:28 +02:00
Pablo de Lara
5ecb687a56 doc: add missing algorithms for AESNI-MB PMD
The supported algorithm tables for AESNI MB PMD were
missing some supported algorithms.

Fixes: 0e9f8507afcb ("crypto/aesni_mb: support AES-GCM algorithm")
Fixes: e5eecd3dc838 ("crypto/aesni_mb: support AES-GMAC")
Fixes: 11fdbf1b7866 ("crypto/aesni_mb: support plain SHA")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-18 16:01:28 +02:00
Ayuj Verma
378e08eba8 crypto/openssl: set RSA private op feature flag
openssl PMD support RSA private key operation
using both qt and exp key type.
Set rsa key type feature flag

Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Shally Verma <shallyv@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Ayuj Verma
398ba4c13f cryptodev: add RSA private key feature flag
Add feature flag to reflect RSA private key
operation support using quintuple (crt) or
exponent type key. if PMD support both,
then it should set both.

App should query cryptodev feature flag to check
if Sign and Decryt with CRT keys or exponent is
supported, thus call operation with relevant
key type.

Signed-off-by: Ayuj Verma <ayverma@marvell.com>
Signed-off-by: Shally Verma <shallyv@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-04-02 16:50:24 +02:00
Fan Zhang
2d0c29a37a crypto/aesni_mb: enable out of place processing
Add out-of-place processing, i.e. different source and
destination m_bufs, plus related capability update, tests
and documentation.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Paul Luse <paul.e.luse@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2019-04-02 16:50:24 +02:00
Damian Nowak
7d5ef3bb32 crypto/qat: support XTS
This patch adds XTS capabilities and enables
XTS cipher mode on QAT.
It also updates the documentation for newly
supported AES XTS mode on QAT.

Signed-off-by: Damian Nowak <damianx.nowak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-03-22 15:54:24 +01:00
Hemant Agrawal
f4eed1292f doc: add CAAM JR guide
add caam jr driver details, supported features and algorithms
in the document.

release note and MAINTAINERS are also updated.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2018-10-17 12:23:40 +02:00
Tomasz Cel
91c1daa4e1 crypto/qat: support AES-CMAC
This patch add AES-CMAC support. CMAC is a keyed hash function
that is based on a symmetric key block cipher. It is One-Key
CBC MAC improvement over XCBC-MAC. RFC 4493. NIST SP 800-38B.

Signed-off-by: Tomasz Cel <tomaszx.cel@intel.com>
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2018-10-17 12:23:40 +02:00
Anoob Joseph
9c4491cf5c doc: add OCTEON TX crypto guide
Adding feature file and guide for OCTEON TX crypto PMD

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Tomasz Duszynski
7af56296d7 crypto/mvsam: update features list
Add following features to the device's features list
and update documentation accordingly:
* OOP SGL in LB out
* OOP LB in LB out

Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
2018-10-17 12:16:54 +02:00
Dmitri Epshtein
3af63cae98 doc: update mvsam guide
Update mvsam documentation.

Signed-off-by: Dmitri Epshtein <dima@marvell.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
Signed-off-by: Natalie Samsonov <nsamsono@marvell.com>
2018-10-17 12:16:54 +02:00
Anoob Joseph
0ad08d3c29 doc: add cryptodev features
Adding 3DES-ECB & AES-XTS to the list of ciphers supported

Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2018-09-26 14:32:07 +02:00
Tomasz Cel
7bd6f76ee6 doc: fix missing CCM to QAT feature list
Update the QAT documentation to show that it supports CCM.

Fixes: ab56c4d9ed9a ("crypto/qat: support AES-CCM")
Cc: stable@dpdk.org

Signed-off-by: Tomasz Cel <tomaszx.cel@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Marko Kovacevic <marko.kovacevic@intel.com>
2018-09-25 16:13:00 +02:00
Ashish Gupta
11e5ba72cf doc: add crypto asymmetric feature list
Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
2018-07-25 08:22:14 +02:00
Marko Kovacevic
06c761d6fb crypto/aesni_mb: support 3DES
Added support for 3DES cipher algorithm which
will support 8, 16 and 24 byte keys, which also has been
added in the v0.50 of the IPSec Multi-buffer lib.

Signed-off-by: Marko Kovacevic <marko.kovacevic@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
2717246ecd cryptodev: replace mbuf scatter gather flag
The current mbuf scatter gatter feature flag is
too ambiguous, as it is not clear if input and/or output
buffers can be scatter gather mbufs or not, plus
if in-place and/or out-of-place is supported.

Therefore, five new flags will replace this flag:
- RTE_CRYPTODEV_FF_IN_PLACE_SGL
- RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT
- RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT
- RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT
- RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2018-07-11 03:57:24 +02:00
Tomasz Duszynski
e95faac151 crypto/mrvl: rename PMD to mvsam
Picking a company stock ticker for a PMD name might not be a best approach
in a long run since name is too generic.

This patch addresses that and renames mrvl to mvsam.

Signed-off-by: Natalie Samsonov <nsamsono@marvell.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
2018-05-10 17:46:19 +01:00
Jay Zhou
3a78b2f732 doc: add virtio crypto PMD guide
This patch adds the guide for virtio crypto PMD.

Signed-off-by: Jay Zhou <jianjay.zhou@huawei.com>
Reviewed-by: Fan Zhang <roy.fan.zhang@intel.com>
2018-04-23 18:20:10 +01:00
Ravi Kumar
4433ced9aa doc: add AMD CCP guide
Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
2018-04-23 18:20:09 +01:00
Marko Kovacevic
6491dbbece crypto/aesni_mb: support AES CMAC
Added support for AES CMAC hash algorithm with 128-bit key,
which has been added in the v0.49 of the IPSec Multi-buffer lib.

Signed-off-by: Marko Kovacevic <marko.kovacevic@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-04-23 17:01:48 +01:00
Akhil Goyal
a74af788c6 crypto/dpaa_sec: support scatter gather
Signed-off-by: Alok Makhariya <alok.makhariya@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-01-29 20:22:33 +01:00
Akhil Goyal
37f96eb01b crypto/dpaa2_sec: support scatter gather
Signed-off-by: Alok Makhariya <alok.makhariya@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-01-29 20:22:33 +01:00
Akhil Goyal
42c3576d44 doc: update feature list for cryptodevs
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-01-29 20:22:33 +01:00