numam-dpdk/drivers
Ashwin Sekhar T K 14a4e2844b common/cnxk: align NPA stack to ROC cache line size
Network Pool accelerator (NPA) is part of ROC (Rest Of Chip). So
NPA structures should be aligned to ROC Cache line size and not
CPU cache line size.

Non alignment of NPA stack to ROC cache line will result in
undefined runtime NPA behaviour.

Fixes: f765f56112 ("common/cnxk: add NPA pool HW operations")
Cc: stable@dpdk.org

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-21 11:08:55 +02:00
..
baseband version: 21.11-rc0 2021-08-17 08:37:52 +02:00
bus bus/fslmc: move experimental function to internal 2021-09-24 18:44:00 +02:00
common common/cnxk: align NPA stack to ROC cache line size 2021-09-21 11:08:55 +02:00
compress compress/mlx5: fix leak on QP setup failure 2021-09-06 21:46:34 +02:00
crypto common/cnxk: support tunnel header verification 2021-09-28 17:49:10 +02:00
event cryptodev: expose driver interface as internal 2021-09-08 09:35:12 +02:00
mempool version: 21.11-rc0 2021-08-17 08:37:52 +02:00
net net/octeontx: fix access to indirect buffers 2021-09-21 10:42:31 +02:00
raw drivers: remove warning with Meson 0.59 2021-08-27 15:51:34 +02:00
regex regex/mlx5: fix leak after probing failure 2021-09-22 21:21:31 +02:00
vdpa vdpa/mlx5: fix large VM memory region registration 2021-09-27 17:24:22 +02:00
meson.build build: fix essential drivers in disable list 2021-09-15 11:00:15 +02:00