Xiaoyun Li 657cd1370d raw/ntb: fix write memory barrier ... All buffers and ring info should be written before tail register update. This patch relocates the write memory barrier before updating tail register to avoid potential issues. Fixes: 11b5c7daf0 ("raw/ntb: add enqueue and dequeue functions") Cc: stable@dpdk.org Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Acked-by: Jingjing Wu <jingjing.wu@intel.com>		2020-01-20 09:58:43 +01:00
..
Makefile
meson.build
ntb_hw_intel.c
ntb_hw_intel.h
ntb.c	raw/ntb: fix write memory barrier	2020-01-20 09:58:43 +01:00
ntb.h
rte_pmd_ntb.h
rte_rawdev_ntb_version.map