a339694621
According to latest DSA spec[1], the work-queue config register size
should be based off a value read from the WQ capabilities register.
Update driver to read this value and base the start of each WQ config
off that value.
[1] https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html
Fixes:
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.. | ||
dpdk_idxd_cfg.py | ||
idxd_pci.c | ||
idxd_vdev.c | ||
ioat_common.c | ||
ioat_private.h | ||
ioat_rawdev_test.c | ||
ioat_rawdev.c | ||
ioat_spec.h | ||
meson.build | ||
rte_ioat_rawdev_fns.h | ||
rte_ioat_rawdev.h | ||
version.map |