The hardware descriptor (WQE) length field is 6 bits wide
and we have the native limitation for the overall descriptor
length. To improve the PCIe bandwidth the packet data can be
inline into descriptor. If PMD was configured to inline large
amount of data it happened there was no enough space remaining
in the descriptor to specify all the packet data segments and
PMD rejected problematic packets.
The patch tries to adjust the inline data length conservatively
and allows to avoid error occurring.
Fixes: 18a1c20044 ("net/mlx5: implement Tx burst template")
Fixes: e2259f93ef ("net/mlx5: fix Tx when inlining is impossible")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
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