Sathesh Edara e98f583129 common/cnxk: set MTU size on SDP based on SoC type ... Set maximum frame size on SDP NIX side to 16KB for CN93 A0 and B0, CNF95N A0 and CNF95O A0 SOC type. Rest of the SoCs SDP NIX to 64KB. Signed-off-by: Sathesh Edara <sedara@marvell.com>		2022-10-18 12:35:51 +02:00
..
cnxk	common/cnxk: set MTU size on SDP based on SoC type	2022-10-18 12:35:51 +02:00
cpt	common/cpt: fix build with GCC 12	2022-06-21 20:04:49 +02:00
dpaax	replace zero-length arrays with flexible ones	2022-06-07 16:44:21 +02:00
iavf	common/iavf: support flow subscription	2022-09-07 20:33:26 +02:00
mlx5	common/mlx5: fix null check in devargs parsing	2022-10-26 13:33:45 +02:00
mvep	drivers: change indentation in build files	2021-04-21 14:04:09 +02:00
octeontx	eal: remove unneeded includes from a public header	2022-09-21 15:31:03 +02:00
qat	crypto/qat: support SM3 hash algorithm	2022-10-02 20:33:24 +02:00
sfc_efx	common/sfc_efx/base: use avail and used terms for indexes	2022-10-04 17:22:56 +02:00
meson.build	drivers: remove octeontx2 drivers	2022-01-12 15:36:32 +01:00