aa728ea474
Add support to override soft expiry poll frequency via devargs.
Also provide helper API to indicate reassembly support on a chip
and documentation for devargs that are already present.
Fixes: 780b9c8924 ("net/cnxk: support zero AURA for inline meta")
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
264 lines
9.6 KiB
C
264 lines
9.6 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2021 Marvell.
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*/
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#ifndef _ROC_NIX_INL_H_
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#define _ROC_NIX_INL_H_
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/* ONF INB HW area */
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#define ROC_NIX_INL_ONF_IPSEC_INB_HW_SZ \
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PLT_ALIGN(sizeof(struct roc_onf_ipsec_inb_sa), ROC_ALIGN)
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/* ONF INB SW reserved area */
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#define ROC_NIX_INL_ONF_IPSEC_INB_SW_RSVD 384
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#define ROC_NIX_INL_ONF_IPSEC_INB_SA_SZ \
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(ROC_NIX_INL_ONF_IPSEC_INB_HW_SZ + ROC_NIX_INL_ONF_IPSEC_INB_SW_RSVD)
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#define ROC_NIX_INL_ONF_IPSEC_INB_SA_SZ_LOG2 9
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/* ONF OUTB HW area */
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#define ROC_NIX_INL_ONF_IPSEC_OUTB_HW_SZ \
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PLT_ALIGN(sizeof(struct roc_onf_ipsec_outb_sa), ROC_ALIGN)
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/* ONF OUTB SW reserved area */
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#define ROC_NIX_INL_ONF_IPSEC_OUTB_SW_RSVD 128
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#define ROC_NIX_INL_ONF_IPSEC_OUTB_SA_SZ \
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(ROC_NIX_INL_ONF_IPSEC_OUTB_HW_SZ + ROC_NIX_INL_ONF_IPSEC_OUTB_SW_RSVD)
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#define ROC_NIX_INL_ONF_IPSEC_OUTB_SA_SZ_LOG2 8
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/* ON INB HW area */
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#define ROC_NIX_INL_ON_IPSEC_INB_HW_SZ \
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PLT_ALIGN(sizeof(struct roc_ie_on_inb_sa), ROC_ALIGN)
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/* ON INB SW reserved area */
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#define ROC_NIX_INL_ON_IPSEC_INB_SW_RSVD 640
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#define ROC_NIX_INL_ON_IPSEC_INB_SA_SZ \
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(ROC_NIX_INL_ON_IPSEC_INB_HW_SZ + ROC_NIX_INL_ON_IPSEC_INB_SW_RSVD)
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#define ROC_NIX_INL_ON_IPSEC_INB_SA_SZ_LOG2 10
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/* ONF OUTB HW area */
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#define ROC_NIX_INL_ON_IPSEC_OUTB_HW_SZ \
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PLT_ALIGN(sizeof(struct roc_ie_on_outb_sa), ROC_ALIGN)
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/* ONF OUTB SW reserved area */
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#define ROC_NIX_INL_ON_IPSEC_OUTB_SW_RSVD 256
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#define ROC_NIX_INL_ON_IPSEC_OUTB_SA_SZ \
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(ROC_NIX_INL_ON_IPSEC_OUTB_HW_SZ + ROC_NIX_INL_ON_IPSEC_OUTB_SW_RSVD)
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#define ROC_NIX_INL_ON_IPSEC_OUTB_SA_SZ_LOG2 9
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/* OT INB HW area */
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#define ROC_NIX_INL_OT_IPSEC_INB_HW_SZ \
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PLT_ALIGN(sizeof(struct roc_ot_ipsec_inb_sa), ROC_ALIGN)
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/* OT INB SW reserved area */
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#define ROC_NIX_INL_OT_IPSEC_INB_SW_RSVD 128
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#define ROC_NIX_INL_OT_IPSEC_INB_SA_SZ \
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(ROC_NIX_INL_OT_IPSEC_INB_HW_SZ + ROC_NIX_INL_OT_IPSEC_INB_SW_RSVD)
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#define ROC_NIX_INL_OT_IPSEC_INB_SA_SZ_LOG2 10
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/* OT OUTB HW area */
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#define ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ \
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PLT_ALIGN(sizeof(struct roc_ot_ipsec_outb_sa), ROC_ALIGN)
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/* OT OUTB SW reserved area */
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#define ROC_NIX_INL_OT_IPSEC_OUTB_SW_RSVD 128
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#define ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ \
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(ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ + ROC_NIX_INL_OT_IPSEC_OUTB_SW_RSVD)
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#define ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ_LOG2 9
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/* Alignment of SA Base */
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#define ROC_NIX_INL_SA_BASE_ALIGN BIT_ULL(16)
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#define ROC_NIX_INL_SA_SOFT_EXP_ERR_MAX_POLL_COUNT 25
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#define ROC_NIX_SOFT_EXP_ERR_RING_MAX_ENTRY_LOG2 16
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#define ROC_NIX_SOFT_EXP_PER_PORT_MAX_RINGS 4
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#define ROC_NIX_MAX_TOTAL_OUTB_IPSEC_SA \
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(ROC_IPSEC_ERR_RING_MAX_ENTRY * ROC_NIX_SOFT_EXP_PER_PORT_MAX_RINGS)
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#define ROC_NIX_INL_MAX_SOFT_EXP_RNGS \
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(PLT_MAX_ETHPORTS * ROC_NIX_SOFT_EXP_PER_PORT_MAX_RINGS)
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/* Reassembly configuration */
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#define ROC_NIX_INL_REAS_ACTIVE_LIMIT 0xFFF
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#define ROC_NIX_INL_REAS_ACTIVE_THRESHOLD 10
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#define ROC_NIX_INL_REAS_ZOMBIE_LIMIT 0xFFF
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#define ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD 10
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static inline struct roc_ie_on_inb_sa *
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roc_nix_inl_on_ipsec_inb_sa(uintptr_t base, uint64_t idx)
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{
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uint64_t off = idx << ROC_NIX_INL_ON_IPSEC_INB_SA_SZ_LOG2;
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return PLT_PTR_ADD(base, off);
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}
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static inline struct roc_ie_on_outb_sa *
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roc_nix_inl_on_ipsec_outb_sa(uintptr_t base, uint64_t idx)
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{
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uint64_t off = idx << ROC_NIX_INL_ON_IPSEC_OUTB_SA_SZ_LOG2;
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return PLT_PTR_ADD(base, off);
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}
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static inline void *
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roc_nix_inl_on_ipsec_inb_sa_sw_rsvd(void *sa)
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{
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return PLT_PTR_ADD(sa, ROC_NIX_INL_ON_IPSEC_INB_HW_SZ);
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}
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static inline void *
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roc_nix_inl_on_ipsec_outb_sa_sw_rsvd(void *sa)
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{
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return PLT_PTR_ADD(sa, ROC_NIX_INL_ON_IPSEC_OUTB_HW_SZ);
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}
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static inline struct roc_onf_ipsec_inb_sa *
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roc_nix_inl_onf_ipsec_inb_sa(uintptr_t base, uint64_t idx)
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{
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uint64_t off = idx << ROC_NIX_INL_ONF_IPSEC_INB_SA_SZ_LOG2;
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return PLT_PTR_ADD(base, off);
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}
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static inline struct roc_onf_ipsec_outb_sa *
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roc_nix_inl_onf_ipsec_outb_sa(uintptr_t base, uint64_t idx)
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{
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uint64_t off = idx << ROC_NIX_INL_ONF_IPSEC_OUTB_SA_SZ_LOG2;
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return PLT_PTR_ADD(base, off);
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}
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static inline void *
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roc_nix_inl_onf_ipsec_inb_sa_sw_rsvd(void *sa)
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{
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return PLT_PTR_ADD(sa, ROC_NIX_INL_ONF_IPSEC_INB_HW_SZ);
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}
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static inline void *
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roc_nix_inl_onf_ipsec_outb_sa_sw_rsvd(void *sa)
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{
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return PLT_PTR_ADD(sa, ROC_NIX_INL_ONF_IPSEC_OUTB_HW_SZ);
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}
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static inline struct roc_ot_ipsec_inb_sa *
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roc_nix_inl_ot_ipsec_inb_sa(uintptr_t base, uint64_t idx)
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{
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uint64_t off = idx << ROC_NIX_INL_OT_IPSEC_INB_SA_SZ_LOG2;
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return PLT_PTR_ADD(base, off);
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}
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static inline struct roc_ot_ipsec_outb_sa *
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roc_nix_inl_ot_ipsec_outb_sa(uintptr_t base, uint64_t idx)
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{
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uint64_t off = idx << ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ_LOG2;
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return PLT_PTR_ADD(base, off);
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}
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static inline void *
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roc_nix_inl_ot_ipsec_inb_sa_sw_rsvd(void *sa)
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{
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return PLT_PTR_ADD(sa, ROC_NIX_INL_OT_IPSEC_INB_HW_SZ);
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}
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static inline void *
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roc_nix_inl_ot_ipsec_outb_sa_sw_rsvd(void *sa)
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{
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return PLT_PTR_ADD(sa, ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ);
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}
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/* Inline device SSO Work callback */
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typedef void (*roc_nix_inl_sso_work_cb_t)(uint64_t *gw, void *args,
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uint32_t soft_exp_event);
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typedef int (*roc_nix_inl_meta_pool_cb_t)(uint64_t *aura_handle, uint32_t blk_sz, uint32_t nb_bufs,
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bool destroy);
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struct roc_nix_inl_dev {
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/* Input parameters */
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struct plt_pci_device *pci_dev;
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uint32_t ipsec_in_min_spi;
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uint32_t ipsec_in_max_spi;
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bool selftest;
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bool is_multi_channel;
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uint16_t channel;
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uint16_t chan_mask;
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bool attach_cptlf;
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uint16_t wqe_skip;
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uint8_t spb_drop_pc;
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uint8_t lpb_drop_pc;
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uint32_t soft_exp_poll_freq; /* Polling disabled if 0 */
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uint32_t nb_meta_bufs;
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uint32_t meta_buf_sz;
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/* End of input parameters */
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#define ROC_NIX_INL_MEM_SZ (1280)
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uint8_t reserved[ROC_NIX_INL_MEM_SZ] __plt_cache_aligned;
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} __plt_cache_aligned;
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/* NIX Inline Device API */
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int __roc_api roc_nix_inl_dev_init(struct roc_nix_inl_dev *roc_inl_dev);
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int __roc_api roc_nix_inl_dev_fini(struct roc_nix_inl_dev *roc_inl_dev);
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void __roc_api roc_nix_inl_dev_dump(struct roc_nix_inl_dev *roc_inl_dev, FILE *file);
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bool __roc_api roc_nix_inl_dev_is_probed(void);
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void __roc_api roc_nix_inl_dev_lock(void);
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void __roc_api roc_nix_inl_dev_unlock(void);
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int __roc_api roc_nix_inl_dev_xaq_realloc(uint64_t aura_handle);
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uint16_t __roc_api roc_nix_inl_dev_pffunc_get(void);
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/* NIX Inline Inbound API */
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int __roc_api roc_nix_inl_inb_init(struct roc_nix *roc_nix);
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int __roc_api roc_nix_inl_inb_fini(struct roc_nix *roc_nix);
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bool __roc_api roc_nix_inl_inb_is_enabled(struct roc_nix *roc_nix);
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uintptr_t __roc_api roc_nix_inl_inb_sa_base_get(struct roc_nix *roc_nix,
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bool inl_dev_sa);
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uint32_t __roc_api roc_nix_inl_inb_spi_range(struct roc_nix *roc_nix,
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bool inl_dev_sa, uint32_t *min,
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uint32_t *max);
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uint32_t __roc_api roc_nix_inl_inb_sa_sz(struct roc_nix *roc_nix,
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bool inl_dev_sa);
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uintptr_t __roc_api roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix,
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bool inl_dev_sa, uint32_t spi);
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void __roc_api roc_nix_inb_mode_set(struct roc_nix *roc_nix, bool use_inl_dev);
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void __roc_api roc_nix_inl_inb_set(struct roc_nix *roc_nix, bool ena);
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int __roc_api roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq, bool ena);
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int __roc_api roc_nix_inl_dev_rq_put(struct roc_nix_rq *rq);
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bool __roc_api roc_nix_inb_is_with_inl_dev(struct roc_nix *roc_nix);
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struct roc_nix_rq *__roc_api roc_nix_inl_dev_rq(struct roc_nix *roc_nix);
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int __roc_api roc_nix_inl_inb_tag_update(struct roc_nix *roc_nix,
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uint32_t tag_const, uint8_t tt);
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int __roc_api roc_nix_reassembly_configure(uint32_t max_wait_time,
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uint16_t max_frags);
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int __roc_api roc_nix_inl_ts_pkind_set(struct roc_nix *roc_nix, bool ts_ena,
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bool inb_inl_dev);
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int __roc_api roc_nix_inl_rq_ena_dis(struct roc_nix *roc_nix, bool ena);
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int __roc_api roc_nix_inl_meta_aura_check(struct roc_nix_rq *rq);
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bool __roc_api roc_nix_has_reass_support(struct roc_nix *nix);
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/* NIX Inline Outbound API */
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int __roc_api roc_nix_inl_outb_init(struct roc_nix *roc_nix);
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int __roc_api roc_nix_inl_outb_fini(struct roc_nix *roc_nix);
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bool __roc_api roc_nix_inl_outb_is_enabled(struct roc_nix *roc_nix);
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uintptr_t __roc_api roc_nix_inl_outb_sa_base_get(struct roc_nix *roc_nix);
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struct roc_cpt_lf *__roc_api
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roc_nix_inl_outb_lf_base_get(struct roc_nix *roc_nix);
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uint16_t __roc_api roc_nix_inl_outb_sso_pffunc_get(struct roc_nix *roc_nix);
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int __roc_api roc_nix_inl_cb_register(roc_nix_inl_sso_work_cb_t cb, void *args);
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int __roc_api roc_nix_inl_cb_unregister(roc_nix_inl_sso_work_cb_t cb,
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void *args);
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int __roc_api roc_nix_inl_outb_soft_exp_poll_switch(struct roc_nix *roc_nix,
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bool poll);
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uint64_t *__roc_api roc_nix_inl_outb_ring_base_get(struct roc_nix *roc_nix);
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void __roc_api roc_nix_inl_meta_pool_cb_register(roc_nix_inl_meta_pool_cb_t cb);
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/* NIX Inline/Outbound API */
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enum roc_nix_inl_sa_sync_op {
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ROC_NIX_INL_SA_OP_FLUSH,
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ROC_NIX_INL_SA_OP_FLUSH_INVAL,
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ROC_NIX_INL_SA_OP_RELOAD,
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};
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int __roc_api roc_nix_inl_sa_sync(struct roc_nix *roc_nix, void *sa, bool inb,
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enum roc_nix_inl_sa_sync_op op);
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int __roc_api roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr,
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void *sa_cptr, bool inb, uint16_t sa_len);
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void __roc_api roc_nix_inl_outb_cpt_lfs_dump(struct roc_nix *roc_nix, FILE *file);
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#endif /* _ROC_NIX_INL_H_ */
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