Add code to implement the write memory barrier and read/write memory
barrier for ARM 64 platforms.
Change-Id: I8b63db25ba1f70a729874ca143db13501d976676
Signed-off-by: Barry Spinney <spinney@mellanox.com>
Reviewed-on: https://review.gerrithub.io/386534
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
dcfbafeb77