When using DW UART with BUSY detection it is necessary to wait
until all serial transfers are finished before manipulating the
line control. LCR will not be affected when UART is busy.
In addition, if Divisor Latch Access Bit is being set in order to
modify UART divisors:
1. We will get BUSY interrupt if interrupts are enabled.
2. Because LCR will not be affected the THR and (even worse) IER
contents will be corrupted. This will lead to console hang.
Approved by: cognet (mentor)
A10 uart is derived from Synopsys DesignWare uart and requires
to read Uart Status Register when IIR_BUSY has detected.
Also this change includes FDT check, where it checks device
specific properties defined in dts and sets the busy_detect variable.
broken_txfifo is also needed to be set in order to make it work for
A10 uart case.
Reviewed by: marcel@
Approved by: gonzo@
- Rename REG_DL to REG_DLL and REG_DLH.
- Always treat DLL and DLH as two separate 8-bit registers instead of one
16-bit register.
Additionally, remove the probe for the high 4 bits of IER being 0 and don't
assume we can always read/write 0 to/from those bits.
These changes allow uart(4) to drive the UARTs on the Intel XScale PXA255.
Reviewed by: marcel
not used and aliases for other defines.
o Add REG_DATA as an alias for com_data. Likewise for other register
defines.
o Add LCR_SBREAK and make CFCR_SBREAK an alias for it. Likewise for
the other LCR register bits that are known with the CFCR prefix.
o Add MCR_IE and make MCR_IENABLE an alias for it.
o Add LSR_TEMT and make LSR_TSRE an alias for it.
o Add LSR_THRE and make LSR_TXRDY as alias for it.
o Add FCR_ENABLE and make FIFO_ENABLE as alias for it. Likewise for
the other FCR register bits that are known with the FIFO prefix.
o Add EFR_CTS and make EFR_AUTOCTS an alias for it.
o Add EFR_RTS and make EFR_AUTORTS an alias for it.
This is a first step in cleaning up the definitions in this file.
and some of their bits (i.e., fifo trigger levels, frequency multipliers
and divisors, and bits to select the registers for these). This
attempts to completely describe the 16950's complicated register selects
for 16950-specific registers only.
the description of the data latch registers (they were described as
readonly).
Added some better and worse aliases for standard registers, mostly taken
from the 16950 data sheet. Define deprecated aliases in terms of the
preferred one.
Don't define com_efr in terms of com_fifo. It is unrelated (in a
different bank).
Merged comments to match (put them at the right of the #defines instead
of duplicating them).
Sorted the resulting sections on UART type and register bank. Added a
comment for each bank.
to ns16550.h. The organization of these files was sort of backwards.
The bits in the registers have no driver or bus dependencies but they
but the offsets of the registers in bus space are very bus-dependent.
However, it does no harm to keep the definitions of the register offsets
in ns16550.h provided they are thought of as internal ns*50 offsets.
This will make a number of things easier in the future, as well as (finally!)
avoiding the Id-smashing problem which has plagued developers for so long.
Boy, I'm glad we're not using sup anymore. This update would have been
insane otherwise.
(1) Add PC98 support to apm_bios.h and ns16550.h, remove pc98/pc98/ic
(2) Move PC98 specific code out of cpufunc.h (to pc98.h)
(3) Let the boot subtrees look more alike
Submitted by: The FreeBSD(98) Development Team
<freebsd98-hackers@jp.freebsd.org>
