Commit Graph

2538 Commits

Author SHA1 Message Date
John Baldwin
068d8643ad Fix various NIC drivers to properly cleanup static DMA resources.
In particular, don't check the value of the bus_dma map against NULL
to determine if either bus_dmamem_alloc() or bus_dmamap_load() succeeded.
Instead, assume that bus_dmamap_load() succeeeded (and thus that
bus_dmamap_unload() should be called) if the bus address for a resource
is non-zero, and assume that bus_dmamem_alloc() succeeded (and thus
that bus_dmamem_free() should be called) if the virtual address for a
resource is not NULL.

In many cases these bugs could result in leaks when a driver was detached.

Reviewed by:	yongari
MFC after:	2 weeks
2014-06-11 14:53:58 +00:00
Pyun YongHyeon
52ee8ac027 Increase the number of TX DMA segments from 32 to 35. It turned
out 32 is not enough to support a full sized TSO packet.
While I'm here fix a long standing bug introduced in r169632 in
bce(4) where it didn't include L2 header length of TSO packet in
the maximum DMA segment size calculation.

In collaboration with:	rmacklem
MFC after:		2 weeks
2014-03-31 01:54:59 +00:00
Marius Strobl
f1a5f291dd - Implement the RX EARLYOFF and RXDV GATED bits as done by RealTek's Linux
driver as version 8.037.00 for RTL8168{E-VL,EP,F,G,GU} and RTL8111B. This
  makes reception of packets work with the RTL8168G (HW rev. 0x4c000000) in
  my Shuttle DS47.
- Consistently use RL_MSI_MESSAGES.
In joint forces with:	yongari

MFC after:	5 days
2014-02-05 23:13:40 +00:00
Marius Strobl
3b78c64b35 Try to make the style used here consistent. 2014-02-05 22:27:49 +00:00
Pyun YongHyeon
c3767eab77 Add preliminary support for RTL8168EP.
Submitted by:	Edward O'Callaghan (eocallaghan <> alterapraxis dot com)
2013-10-29 05:37:05 +00:00
Pyun YongHyeon
ab9f923ebf Add preliminary support for RTL8168G, RTL8168GU and RTL8411B.
RTL8168GU has two variants(GMII and MII) but it uses the same chip
revision id.  Driver checks PCI device id of controller and
sets internal capability flag(i.e. jumbo frame and link speed down
in WOL).

H/W donated by:	RealTek Semiconductor Corp.
2013-10-29 05:30:21 +00:00
Gleb Smirnoff
76039bc84f The r48589 promised to remove implicit inclusion of if_var.h soon. Prepare
to this event, adding if_var.h to files that do need it. Also, include
all includes that now are included due to implicit pollution via if_var.h

Sponsored by:	Netflix
Sponsored by:	Nginx, Inc.
2013-10-26 17:58:36 +00:00
Pyun YongHyeon
214c71f64d Add preliminary support for RTL8106E PCIe FastEthernet.
H/W donated by:	RealTek Semiconductor Corp.
2013-10-21 06:27:20 +00:00
Pyun YongHyeon
fd3ae0f5be Correct MAC revision bits. Previously it always cleared bit 20 and
bit 21.
2013-10-21 06:22:20 +00:00
Scott Long
c68534f1d5 Update PCI drivers to no longer look at the MEMIO-enabled bit in the PCI
command register.  The lazy BAR allocation code in FreeBSD sometimes
disables this bit when it detects a range conflict, and will re-enable
it on demand when a driver allocates the BAR.  Thus, the bit is no longer
a reliable indication of capability, and should not be checked.  This
results in the elimination of a lot of code from drivers, and also gives
the opportunity to simplify a lot of drivers to use a helper API to set
the busmaster enable bit.

This changes fixes some recent reports of disk controllers and their
associated drives/enclosures disappearing during boot.

Submitted by:	jhb
Reviewed by:	jfv, marius, achadd, achim
MFC after:	1 day
2013-08-12 23:30:01 +00:00
Gabor Kovesdan
8fb3bbe770 - Corrrect mispellings of word useful
Submitted by:	Christoph Mallon <christoph.mallon@gmx.de> (via private mail)
2013-04-17 11:45:15 +00:00
Gleb Smirnoff
c43b22be02 Fix build. 2013-02-21 12:52:18 +00:00
Warner Losh
62c658aa9f Most other giant locked storage drivers in the tree don't use
splsoftclock to note the need for future locking, so remove it from
here.
2013-02-21 02:40:20 +00:00
Warner Losh
34bed74372 Kill now-bogus splhigh() -- it is a nop 2013-02-21 00:36:12 +00:00
John Baldwin
a8df530ddc Mark 'ticks', 'time_second', and 'time_uptime' as volatile to prevent the
compiler from caching their values in tight loops.

Reviewed by:	bde
MFC after:	1 week
2013-01-28 19:38:13 +00:00
Pyun YongHyeon
16796cb910 Add D-Link DFE-520TX rev C1.
Tested by:	Ruslan Makhmatkhanov < cvs-src <> yandex dot ru >
MFC After:	1 week
2013-01-16 01:30:46 +00:00
Gleb Smirnoff
eb1b1807af Mechanically substitute flags from historic mbuf allocator with
malloc(9) flags within sys.

Exceptions:

- sys/contrib not touched
- sys/mbuf.h edited manually
2012-12-05 08:04:20 +00:00
Dimitry Andric
29658c96ce Remove duplicate const specifiers in many drivers (I hope I got all of
them, please let me know if not).  Most of these are of the form:

static const struct bzzt_type {
	[...list of members...]
} const bzzt_devs[] = {
	[...list of initializers...]
};

The second const is unnecessary, as arrays cannot be modified anyway,
and if the elements are const, the whole thing is const automatically
(e.g. it is placed in .rodata).

I have verified this does not change the binary output of a full kernel
build (except for build timestamps embedded in the object files).

Reviewed by:	yongari, marius
MFC after:	1 week
2012-11-05 19:16:27 +00:00
Andriy Gapon
8b452ff57a intpm: add ATI IXP400 pci id
PR:		kern/136762
Submitted by:	Aurelien Mere <freebsd@amc-os.com>
Tested by:	Jens Link <jens.link@gmx.de>
MFC after:	5 days
2012-04-16 10:33:46 +00:00
Andriy Gapon
2885c2e4bb intpm: return only SMB bus error codes from SMB methods
PR:		kern/25733
MFC after:	5 days
2012-04-08 20:48:39 +00:00
Andriy Gapon
32048b2bff intpm: reflect the fact that SB800 and later AMD chipsets are not supported
They do not have compatible configuration registers in PCI configuration
space.  Instead their configuration resides in AMD "PM I/O" space
(accessed via a pair of I/O space registers).

MFC after:	5 days
2012-04-08 19:58:38 +00:00
Pyun YongHyeon
e7e7593cd8 Use correct Config registers for RTL8139 family. Unlike RTL8168 and
RTL810x family , RTL8139 has different register map for Config
registers.

While here, follow the lead of re(4) in WOL configuration.
 - Disable WOL_UCAST and WOL_MCAST capabilities by default.
 - Config5 register write does not need to unlock EEPROM access
   on RTL8139 family but unlocking EEPROM access does not affect
   its operation and make it consistent with re(4).

Reported by:	Matt Renzelmann  mjr <> cs dot wisc dot edu
2012-02-25 04:54:51 +00:00
Pyun YongHyeon
6830588dd1 To save more power, switch to 10/100Mbps link when controller is
put into suspend/shutdown.  Old PCI controllers performed that
operation in firmware but for RTL8111C or newer controllers, it's
responsibility of driver.  It's not clear whether the firmware of
RTL8111B still downgrades its speed to 10/100Mbps so leave it as it
was.
2011-11-23 23:29:18 +00:00
Pyun YongHyeon
eef0e49628 Make sure to stop TX MAC before freeing queued TX frames.
For RTL8111DP, check if the TX MAC is active by reading RL_GTXSTART
register.  For RTL8402/8168E-VL/8168F/8411, wait until TX queue is
empty.
2011-11-23 22:07:13 +00:00
Marius Strobl
4b7ec27007 - There's no need to overwrite the default device method with the default
one. Interestingly, these are actually the default for quite some time
  (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
  since r52045) but even recently added device drivers do this unnecessarily.
  Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
  Discussed with: jhb
- Also while at it, use __FBSDID.
2011-11-22 21:28:20 +00:00
Pyun YongHyeon
d467ffaa66 Add preliminary support for RTL8168/8111F PCIe Gigabit ethernet.
H/W donated by:	RealTek Semiconductor Corp.
2011-11-17 22:07:50 +00:00
Pyun YongHyeon
6b0a8e0476 Add preliminary support for second generation RTL8105E PCIe
FastEthernet.

H/W donated by:	RealTek Semiconductor Corp.
2011-11-17 21:24:56 +00:00
Pyun YongHyeon
017f1c8db9 Disable PCIe ASPM (Active State Power Management) for all
controllers.
More and more RealTek controllers started to implement EEE feature.
Vendor driver seems to load a kind of firmware for EEE with
additional PHY fixups.  It is known that the EEE feature may need
ASPM support.  Unfortunately there is no documentation for EEE of
the controller so enabling ASPM may cause more problems.
2011-11-16 23:29:27 +00:00
Pyun YongHyeon
d56f7f5284 Add preliminary support for RTL8411 PCIe Gigabit ethernet with
integrated card reader.

H/W donated by:	RealTek Semiconductor Corp.
2011-11-16 22:05:38 +00:00
Pyun YongHyeon
a9e3362a07 Add preliminary support for RTL8402 PCIe FastEthernet with
integrated card reader.

H/W donated by:	RealTek Semiconductor Corp.
2011-11-16 21:37:45 +00:00
Marius Strobl
8c1093fc50 - Import the common MII bitbang'ing code from NetBSD and convert drivers to
take advantage of it instead of duplicating it. This reduces the size of
  the i386 GENERIC kernel by about 4k. The only potential in-tree user left
  unconverted is xe(4), which generally should be changed to use miibus(4)
  instead of implementing PHY handling on its own, as otherwise it makes not
  much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just
  for the MII bitbang'ing code. The common MII bitbang'ing code also is
  useful in the embedded space for using GPIO pins to implement MII access.
- Based on lessons learnt with dc(4) (see r185750), add bus barriers to the
  MII bitbang read and write functions of the other drivers converted in
  order to ensure the intended ordering. Given that register access via an
  index register as well as register bank/window switching is subject to the
  same problem, also add bus barriers to the respective functions of smc(4),
  tl(4) and xl(4).
- Sprinkle some const.

Thanks to the following testers:
Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4))
Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4).

Reviewed by:	yongari (subset of drivers)
Obtained from:	NetBSD (partially)
2011-11-01 16:13:59 +00:00
Pyun YongHyeon
57c81d92ae Close a race where SIOCGIFMEDIA ioctl get inconsistent link status.
Because driver is accessing a common MII structure in
mii_pollstat(), updating user supplied structure should be done
before dropping a driver lock.

Reported by:	Karim (fodillemlinkarimi <> gmail dot com)
2011-10-17 19:49:00 +00:00
Pyun YongHyeon
caa19d50d1 Add new device id of D-Link DGE-530T Rev. C controller. DGE-503T
Rev A1 and B1 is supported by sk(4) but the DGE-530T Rev. C
controller is re-branded RealTek 8169 controller.

PR:	kern/159116
Approved by:	re (kib)
2011-07-30 01:06:12 +00:00
John Baldwin
3b0a4aef96 Do a sweep of the tree replacing calls to pci_find_extcap() with calls to
pci_find_cap() instead.
2011-03-23 13:10:15 +00:00
Pyun YongHyeon
39e692013a Add initial support for RTL8401E PCIe Fast Ethernet.
PR:	154789
2011-02-16 21:59:42 +00:00
Pyun YongHyeon
54899a96e1 Add support for RTL8105E PCIe Fast Ethernet controller. It seems
the controller has a kind of embedded controller/memory and vendor
applies a large set of magic code via undocumented PHY registers in
device initialization stage. I guess it's a firmware image for the
embedded controller in RTL8105E since the code is too big compared
to other DSP fixups. However I have no idea what that magic code
does and what's purpose of the embedded controller. Fortunately
driver seems to still work without loading the firmware.

While I'm here change device description of RTL810xE controller.

H/W donated by:	Realtek Semiconductor Corp.
2011-01-26 21:14:20 +00:00
Pyun YongHyeon
502be0f749 Do not use interrupt taskqueue on controllers with MSI/MSI-X
capability. One of reason using interrupt taskqueue in re(4) was
to reduce number of TX/RX interrupts under load because re(4)
controllers have no good TX/RX interrupt moderation mechanism.
Basic TX interrupt moderation is done by hardware for most
controllers but RX interrupt moderation through undocumented
register showed poor RX performance so it was disabled in r215025.
Using taskqueue to handle RX interrupt greatly reduced number of
interrupts but re(4) consumed all available CPU cycles to run the
taskqueue under high TX/RX network load.  This can happen even with
RTL810x fast ethernet controller and I believe this is not
acceptable for most systems.

To mitigate the issue, use one-shot timer register to moderate RX
interrupts. The timer register provides programmable one-shot timer
and can be used to suppress interrupt generation. The timer runs at
125MHZ on PCIe controllers so the minimum time allowed for the
timer is 8ns. Data sheet says the register is 32 bits but
experimentation shows only lower 13 bits are valid so maximum time
that can be programmed is 65.528us. This yields theoretical maximum
number of RX interrupts that could be generated per second is about
15260. Combined with TX completion interrupts re(4) shall generate
less than 20k interrupts. This number is still slightly high
compared to other intelligent ethernet controllers but system is
very responsive even under high network load.

Introduce sysctl variable dev.re.%d.int_rx_mod that controls amount
of time to delay RX interrupt processing in units of us. Value 0
completely disables RX interrupt moderation. To provide old
behavior for controllers that have MSI/MSI-X capability, introduce
a new tunable hw.re.intr_filter. If the tunable is set to non-zero
value, driver will use interrupt taskqueue. The default value of
the tunable is 0. This tunable has no effect on controllers that
has no MSI/MSI-X capability or if MSI/MSI-X is explicitly disabled
by administrator.

While I'm here cleanup interrupt setup/teardown since re(4) uses
single MSI/MSI-X message at this moment.
2011-01-26 20:25:40 +00:00
Pyun YongHyeon
d180a66f19 Remove TX taskqueue and directly invoke re_start in interrupt task. 2011-01-25 23:27:28 +00:00
Pyun YongHyeon
4a58fd452a Prefer MSI-X to MSI on controllers that support MSI-X. All
recent PCIe controllers(RTL8102E or later and RTL8168/8111C or
later) supports either 2 or 4 MSI-X messages. Unfortunately vendor
did not publicly release RSS related information yet. However
switching to MSI-X is one-step forward to support RSS.
2011-01-25 22:18:00 +00:00
Pyun YongHyeon
ef278cb4ae Change model names of controller RTL_HWREV_8168_SPIN[123] to real ones.
s/RL_HWREV_8168_SPIN1/RL_HWREV_8168B_SPIN1/g
s/RL_HWREV_8168_SPIN2/RL_HWREV_8168B_SPIN2/g
s/RL_HWREV_8168_SPIN3/RL_HWREV_8168B_SPIN3/g
No functional changes.
2011-01-18 00:46:10 +00:00
Pyun YongHyeon
81eee0ebf8 Implement initial jumbo frame support for RTL8168/8111 C/D/E PCIe
GbE controllers. It seems these controllers no longer support
multi-fragmented RX buffers such that driver have to allocate
physically contiguous buffers.

 o Retire RL_FLAG_NOJUMBO flag and introduce RL_FLAG_JUMBOV2 to
   mark controllers that use new jumbo frame scheme.
 o Configure PCIe max read request size to 4096 for standard frames
   and reduce it to 512 for jumbo frames.
 o TSO/checksum offloading is not supported for jumbo frames on
   these controllers. Reflect it to ioctl handler and driver
   initialization.
 o Remove unused rl_stats_no_timeout in softc.
 o Embed a pointer to structure rl_hwrev into softc to keep track
   of controller MTU limitation and remove rl_hwrev in softc since
   that information is available through a pointer to structure
   rl_hwrev.

Special thanks to Realtek for donating sample hardwares which made
this possible.

H/W donated by:	Realtek Semiconductor Corp.
2011-01-17 03:24:33 +00:00
Pyun YongHyeon
f0431c5bb0 Add initial support for RTL8168E/8111E-VL PCIe GbE.
H/W donated by:	Realtek Semiconductor Corp.
2011-01-17 02:23:50 +00:00
Pyun YongHyeon
d6d7d923ad Implement TSO on RealTek RTL8168/8111 C or later controllers.
RealTek changed TX descriptor format for later controllers so these
controllers require MSS configuration in different location of TX
descriptor. TSO is enabled by default for controllers that use new
descriptor format.
For old controllers, TSO is still disabled by default due to broken
frames under certain conditions but users can enable it.
Special thanks to Hayes Wang at RealTek.

MFC after:	2 weeks
2011-01-10 23:28:46 +00:00
Pyun YongHyeon
45b8980f0e Remove standard PCI configuration space register definitions. 2010-11-08 22:10:51 +00:00
Pyun YongHyeon
19c54b5168 Remove trailing white spaces. 2010-11-08 22:05:11 +00:00
Pyun YongHyeon
314dfe2b28 Consistently use tab character instead of using space character.
No functional changes.
2010-11-08 22:03:40 +00:00
Pyun YongHyeon
483cc44070 Follow the lead of vendor's interrupt moderation mechanism.
It seems RTL8169/RTL8168/RTL810xE has a kind of interrupt
moderation mechanism but it is not documented at all. The magic
value dramatically reduced number of interrupts without noticeable
performance drops so apply it to all RTL8169/RTL8169 controllers.
Vendor's FreeBSD driver also applies it to RTL810xE controllers but
their Linux driver explicitly cleared the register, so do not
enable interrupt moderation for RTL810xE controllers.

While I'm here sort 8169 specific registers.

Obtained from:	RealTek FreeBSD driver
2010-11-08 21:50:50 +00:00
Pyun YongHyeon
0534aae0ce Add simple MAC statistics counter reading support. Unfortunately
useful counters like rl_missed_pkts is 16 bits quantity which is
too small to hold meaningful information happened in a second. This
means driver should frequently read these counters in order not to
lose accuracy and that approach is too inefficient in driver's
view. Moreover it seems there is no way to trigger an interrupt to
detect counter near-full or wraparound event as well as lacking
clearing the MAC counters. Another limitation of reading the
counters from RealTek controllers is lack of interrupt firing at
the end of DMA cycle of MAC counter read request such that driver
have to poll the end of the DMA which is a time consuming process
as well as inefficient. The more severe issue of the MAC counter
read request is it takes too long to complete the DMA. All these
limitation made maintaining MAC counters in driver impractical. For
now, just provide simple sysctl interface to trigger reading the
MAC counters. These counters could be used to track down driver
issues. Users can read MAC counters maintained in controller with
the following command.
#sysctl dev.re.0.stats=1

While I'm here add check for validity of dma map and allocated
memory before unloading/freeing them.

Tested by:	rmacklem
2010-11-05 19:28:00 +00:00
Marius Strobl
8e5d93dbb4 Convert the PHY drivers to honor the mii_flags passed down and convert
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
  addresses; we now let mii_attach() only probe the PHY at the desired
  address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
  off from, partly even based on grabbing and using the softc of the
  parent; we now pass these flags down from the NIC to the PHY drivers
  via mii_attach(). This got us rid of all such hacks except those of
  brgphy() in combination with bce(4) and bge(4), which is way beyond
  what can be expressed with simple flags.

While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).

Reviewed by:	jhb, yongari
2010-10-15 14:52:11 +00:00
Pyun YongHyeon
0759386405 Rewrite interrupt handler to give fairness for both RX and TX.
Previously rl(4) continuously checked whether there are RX events
or TX completions in forever loop. This caused TX starvation under
high RX load as well as consuming too much CPU cycles in the
interrupt handler. If interrupt was shared with other devices which
may be always true due to USB devices in these days, rl(4) also
tried to process the interrupt. This means polling(4) was the only
way to mitigate the these issues.

To address these issues, rl(4) now disables interrupts when it
knows the interrupt is ours and limit the number of iteration of
the loop to 16. The interrupt would be enabled again before exiting
interrupt handler if the driver is still running. Because RX buffer
is 64KB in size, the number of iterations in the loop has nothing
to do with number of RX packets being processed. This change
ensures sending TX frames under high RX load.

RX handler drops a driver lock to pass received frames to upper
stack such that there is a window that user can down the interface.
So rl(4) now checks whether driver is still running before serving
RX or TX completion in the loop.

While I'm here, exit interrupt handler when driver initialized
controller.

With this change, now rl(4) can send frames under high RX load even
though the TX performance is still not good(rl(4) controllers can't
queue more than 4 frames at a time so low TX performance was one of
design issue of rl(4) controllers). It's much better than previous
TX starvation and you should not notice RX performance drop with
this change. Controller still shows poor performance under high
network load but for many cases it's now usable without resorting
to polling(4).

MFC after:	2 weeks
2010-10-13 17:55:19 +00:00