Commit Graph

150970 Commits

Author SHA1 Message Date
Andriy Gapon
32a9ef6d33 MFC r205854: calendar.freebsd: add my entry 2010-04-02 15:33:24 +00:00
Konstantin Belousov
003465f5f1 MFC r205317:
Remove dead statement.
2010-04-02 13:43:16 +00:00
Konstantin Belousov
131e8de2da MFC r205316:
Fix two style issues.
2010-04-02 13:39:30 +00:00
Gleb Smirnoff
033a5be7fa Merge r205082, r205083 that fix 'netstat -f netgraph' functionality. 2010-04-02 11:07:55 +00:00
Qing Li
f3939d3288 MFC 205268
Set the device capabilities to include dynamic link-state for
those modern drivers.

Reviewed by: imp (and suggested by imp)
2010-04-02 05:15:27 +00:00
Qing Li
94190b3925 MFC 205222
Verify interface up status using its link state only
if the interface has such capability. The interface
capability flag indicates whether such capability
exists. This approach is much more backward compatible.
Physical device driver changes will be part of another
commit.

Also updated the ifconfig utility to show the LINKSTATE
capability if present.

Reviewed by:  rwatson, imp, juli
2010-04-02 05:12:46 +00:00
Qing Li
243785f92f MFC 205024
The if_tap interface is of IFT_ETHERNET type, but it
does not set or update the if_link_state variable.
As such RT_LINK_IS_UP() fails for the if_tap interface.

Also, the RT_LINK_IS_UP() needs to bypass all loopback
interfaces because loopback interfaces are considered
up logically as long as the system is running.

This patch fixes the above issues by setting and updating
the if_link_state variable when the tap interface is
opened or closed respectively. Similary approach is
already done in the if_tun device.
2010-04-02 05:05:51 +00:00
Qing Li
c951da56b4 MFC 204902
One of the advantages of enabling ECMP (a.k.a RADIX_MPATH) is to
allow for connection load balancing across interfaces. Currently
the address alias handling method is colliding with the ECMP code.
For example, when two interfaces are configured on the same prefix,
only one prefix route is installed. So connection load balancing
among the available interfaces is not possible.

The other advantage of ECMP is for failover. The issue with the
current code, is that the interface link-state is not reflected
in the route entry. For example, if there are two interfaces on
the same prefix, the cable on one interface is unplugged, new and
existing connections should switch over to the other interface.
This is not done today and packets go into a black hole.

Also, there is a small bug in the kernel where deleting ECMP routes
in the userland will always return an error even though the command
is successfully executed.
2010-04-02 05:02:50 +00:00
Qing Li
ca2d42b2a1 MFC 201131
introduce a local variable rte acting as a cache of ro->ro_rt
within ip_output, achieving (in random order of importance):
- a reduction of the number of 'r's in the source code;
- improved legibility;
- a reduction of 64 bytes in the .text
2010-04-02 04:58:17 +00:00
Qing Li
01104d862b MFC 205077
The flow-table module retrieves the destination and source
address as well as the transport protocol port information
from the outbound packets. The routing code is generic and
compares every byte in the given sockaddr object. Therefore
the temporary sockaddr objects must be cleared due to padding
bytes. In addition, the port information must be stripped
or the route search will either fail or return the incorrect
route entry.

Unit testing is done using OpenVPN over the if_tun interface.
2010-04-01 20:23:43 +00:00
Marius Strobl
618de50c3f MFC: r205409
- The firmware of Sun Fire V1280 has a misfeature of setting %wstate to
  7 which corresponds to WSTATE_KMIX in OpenSolaris whenever calling into
  it which totally screws us even when restoring %wstate afterwards as
  spill/fill traps can happen while in OFW. The rather hackish OpenBSD
  approach of just setting the equivalent of WSTATE_KERNEL to 7 also is
  no option as we treat %wstate as a bit field. So in order to deal with
  this problem actually implement spill/fill handlers for %wstate 7 which
  just act as the WSTATE_KERNEL ones except of theoretically also handling
  32-bit, turn off interrupts completely so we don't even take IPIs while
  in OFW which should ensure we only take spill/fill traps at most and
  restore %wstate after calling into OFW once we have taken over the trap
  table. While at it, actually set WSTATE_{,PROM}_KMIX before calling into
  OFW just like OpenSolaris does, which should at least help testing this
  change on non-V1280.
- Remove comments referring to the %wstate usage in BSD/OS.
- Remove the no longer used RSF_ALIGN_RETRY macro.
- Correct some trap table addresses in comments.
- Ensure %wstate is set to WSTATE_KERNEL when taking over the trap table.
- Ensure PSTATE_AM is off when entering or exiting to OFW as well as that
  interrupts are also completely off when exiting to OFW as the firmware
  trap table shouldn't be used to handle our interrupts.
2010-04-01 15:17:50 +00:00
Nathan Whitehorn
3c7ec531af MFC r204694,204719,205370
Update the page table locking for the 64-bit PMAP. One of these revisions
largely reverted the other, so there is a small amount of churn and the
addition of some mtx_assert()s.
2010-04-01 13:27:27 +00:00
Nathan Whitehorn
8941979907 MFC r205163:
Fix two small bugs. The PowerPC 970 does not support non-coherent memory
access, and reflects this by autonomously writing LPTE_M into PTE entries.
As such, we should not panic if LPTE_M changes by itself. While here,
fix a harmless typo in moea64_sync_icache().
2010-04-01 13:21:04 +00:00
Marcel Moolenaar
56a526f031 MFC rev 199602, 200739, 203177, 203350, 203352, 205495, 205527,
205535 and 205569:

Sync MPC85xx/Book-E with 9-current.
2010-04-01 02:41:50 +00:00
Warner Losh
e55b9df7b3 MFC: r197542:
- When we run our trap cleanup handler, echo that we are running this
    handler to make it more clear why we are 'suddenly' running df,
    umount, and mdconfig.
  - Remove trap handler again after we have unconfigured the memory
    device etc.  Before we could end up running the trap handler if a
    later stage failed, which was a bit confusing and not really useful.
  MFC after:      2 weeks
2010-04-01 02:03:28 +00:00
Xin LI
4018626f75 MFC r205656:
Check that gl_pathc is bigger than zero before derefencing gl_pathv.
When gl_pathc == 0, the content of gl_pathv is undefined.

PR:		bin/144761
Submitted by:	David BERARD <contact davidberard fr>
Obtained from:	OpenBSD
2010-04-01 00:38:38 +00:00
Kip Macy
e952596a10 MFC 205066, 205069, 205093, 205097, 205488:
r205066:

Log:
 - restructure flowtable to support ipv6
 - add a name argument to flowtable_alloc for printing with ddb commands
 - extend ddb commands to print destination address or 4-tuples
 - don't parse ports in ulp header if FL_HASH_ALL is not passed
 - add kern_flowtable_insert to enable more generic use of flowtable
   (e.g. system calls for adding entries)
 - don't hash loopback addresses
 - cleanup whitespace
 - keep statistics per-cpu for per-cpu flowtables to avoid cache line contention
 - add sysctls to accumulate stats and report aggregate

r205069:
Log:
 fix stats reporting sysctl

r205093:
Log:
 re-update copyright to 2010
 pointed out by danfe@

r205097:

Log:
 flowtable_get_hashkey is only used by a DDB function - move under #ifdef DDB

 pointed out by jkim@

r205488:

Log:
 - boot-time size the ipv4 flowtable and the maximum number of flows
 - increase flow cleaning frequency and decrease flow caching time
   when near the flow limit
 - stop allocating new flows when within 3% of maxflows don't start
   allocating again until below 12.5%
2010-04-01 00:36:40 +00:00
Marius Strobl
39c9b5507e MFC: r205399
Improve the KVA space sizing of r186682; on machines with large dTLBs we
can actually use all of the available lockable entries of the tiny dTLB
for the kernel TSB. With this change the KVA space sizing happens to be
more in line with the MI one so up to at least 24GB machines KVA doesn't
need to be limited manually. This is just another stopgap though, the
real solution is to take advantage of ASI_ATOMIC_QUAD_LDD_PHYS on CPUs
providing it so we don't need to lock the kernel TSB pages into the dTLB
in the first place.
2010-03-31 22:05:49 +00:00
Marius Strobl
265f3f7642 MFC: r205263
Add macros for the VER.impl of SPARC64 II to VIIIfx.
2010-03-31 22:00:22 +00:00
Marius Strobl
c65c70f0f4 MFC: r205258
- Add TTE and context register bits for the additional page sizes supported
  by UltraSparc-IV and -IV+ as well as SPARC64 V, VI, VII and VIIIfx CPUs.
- Replace TLB_PCXR_PGSZ_MASK and TLB_SCXR_PGSZ_MASK with TLB_CXR_PGSZ_MASK
  which just is the complement of TLB_CXR_CTX_MASK instead of trying to
  assemble it from the page size bits which vary across CPUs.
- Add macros for the remainder of the SFSR bits, which are useful for at
  least debugging purposes.
2010-03-31 21:57:48 +00:00
Marius Strobl
94118d2871 MFC: r204153
Starting with UltraSPARC IV CPUs the CPU caches are described with different
OFW properties.
2010-03-31 21:41:00 +00:00
Marius Strobl
bd742eaf9c MFC: r204152, r204164
Some machines can not only consist of CPUs running at different speeds
but also of different types, f.e. Sun Fire V890 can be equipped with a
mix of UltraSPARC IV and IV+ CPUs, requiring different MMU initialization
and different workarounds for model specific errata. Therefore move the
CPU implementation number from a global variable to the per-CPU data.
Functions which are called before the latter is available are passed the
implementation number as a parameter now.
2010-03-31 21:32:52 +00:00
Jung-uk Kim
3a0a3e0496 MFC: r205855
Print memory model of the video mode except for planar memory model.
'P', 'D', 'C', 'H', and 'V' mean packed pixel, direct color, CGA, Hercules,
and VGA X memory models respectively where they have fixed number of planes.
2010-03-31 16:01:48 +00:00
Jung-uk Kim
516a153f98 MFC: r197185
Enable BIOS modes on amd64.
2010-03-31 15:49:10 +00:00
Jung-uk Kim
7058bb70ff MFC: r205557, r205558, r205564, r205566, r205604, r205653
Sync. pixel mode support for VESA and VGA frame buffers with HEAD.

- Map entire video memory again.  Although we do not use them all directly,
it seems VGA renderer may access unmapped memory region and cause kernel
panic.
- Fall back to VGA palette functions if VESA function failed and DAC is
still in 6-bit mode.  Although we have to check non-VGA compatibility bit
here, it seems there are too many broken VESA BIOSes out to rely on it.
- Be careful when we determine bytes per scan line information.  We compare
mode table data against minimum value.  If the mode table does not make
sense, we set the minimum in the mode info.
- Teach VGA framebuffer about 8-bit palette format for VESA.
- Add my copyright here.
2010-03-31 15:45:11 +00:00
Jung-uk Kim
86a2d033e4 MFC: r205550, r205605, r205865
Sync. pixel mode support for syscons(4) with HEAD.

- Separate 24-bit pixel draw from 32-bit case.  Although it is slower, we do
not want to write a useless zero to inaccessible memory region.
- We only want the dummy palette for direct color mode.
2010-03-31 15:39:46 +00:00
Jung-uk Kim
824d100ff7 MFC: r205297, r205347, r205452, r205455, r205649, r205650
Sync. x86bios with HEAD.

- Detect illegal access to unmapped memory within real mode emulator.
- Map EBDA if available and support memory wraparound above 1MB as VM86 does.
- Set initial %ds to 0x40 as X.org int10 handler does.
- Print the initial memory map when bootverbose is set.
- Optimize real mode page table lookup.
- Add strictly aligned memory access for distant future.
- Update copyright date.
2010-03-31 15:32:36 +00:00
Pietro Cerutti
28f9173691 MFC r205606
Remove const'ness from dlerror(3) prototype, for consistency with POSIX.

Approved by:	cognet
2010-03-31 13:51:31 +00:00
Alexander Motin
174479969c MFC r204705:
Add links to cam(4).
2010-03-31 08:17:32 +00:00
Alexander Motin
307ec4826c MFC r204565:
Some style and language improvements.

Submitted by:	ru
2010-03-31 08:15:32 +00:00
Alexander Motin
22c3955226 MFC r204704:
Reflect added CAM ATA support.
2010-03-31 08:14:07 +00:00
Alexander Motin
f13f3ec755 MFC r204655:
Add some more supported controllers.
Crosslink with CAM ATA man pages.
2010-03-31 08:12:22 +00:00
Alexander Motin
72208ab4ba MFC r205734:
Fix lock leakage.

PR:             kern/145081
2010-03-31 08:03:49 +00:00
Alexander Motin
e30013ae5c MFC r205413:
Add some more codec IDs.
2010-03-31 08:02:16 +00:00
Alexander Motin
80ebd5b059 MFC r205422:
- Spec tells that CCC interrupt is edge triggered. Acknowledge it as such.
- Do not try to enable CCC if it is not supported.
2010-03-31 07:56:32 +00:00
Alexander Motin
3015ec2db6 MFC r205074:
Mask disk_idx to avoid panic because of extra bits set.

PR:             kern/102211
Submitted by:   yoichi
2010-03-31 07:49:59 +00:00
Fabien Thomas
59c32a3bfe MFC r205809:
Wait for pmc name in the log before displaying data.
This will solve an abort in case of low throughput PMCs.
2010-03-31 07:10:40 +00:00
Marcel Moolenaar
1462deea8b <machine/nexusvar.h>, <machine/sapicreg.h> and <machine/sapicvar.h>
removed on ia64.
2010-03-31 05:23:35 +00:00
Marcel Moolenaar
419ee98298 MFC rev 199727, 200888, 201031, 202904, 203054, 203106, 203572, 203884,
204183, 204184, 204185, 204425, 204904, 204905, 205172, 205234, 205357,
205428, 205429, 205431, 205432, 205433, 205434, 205435, 205454, 205665,
205713, 205723, 205726 and 205727:

Bring ia64 machine-dependent changes from 9-current to 8-stable.
2010-03-31 05:05:28 +00:00
Marcel Moolenaar
3559a7713a MFC revs 199502, 199566 and 199574:
Add a seatbelt to the Nested TLB Fault handler to give us a chance
to panic when we have an unexpected TLB fault while interrupt
collection is disabled.
2010-03-31 03:20:14 +00:00
Marcel Moolenaar
e9fa42544e MFC rev 198431:
Have the early USB takeover only enabled for i386 and amd64
by default. This also avoids a panic on PowerPC.
2010-03-31 03:14:40 +00:00
Marcel Moolenaar
dfeca18773 MFC rev 198341 and 198342:
o   Introduce vm_sync_icache() for making the I-cache coherent with
    the memory or D-cache, depending on the semantics of the platform.
    vm_sync_icache() is basically a wrapper around pmap_sync_icache(),
    that translates the vm_map_t argumument to pmap_t.
o   Introduce pmap_sync_icache() to all PMAP implementation. For powerpc
    it replaces the pmap_page_executable() function, added to solve
    the I-cache problem in uiomove_fromphys().
o   In proc_rwmem() call vm_sync_icache() when writing to a page that
    has execute permissions. This assures that when breakpoints are
    written, the I-cache will be coherent and the process will actually
    hit the breakpoint.
o   This also fixes the Book-E PMAP implementation that was missing
    necessary locking while trying to deal with the I-cache coherency
    in pmap_enter() (read: mmu_booke_enter_locked).
2010-03-31 02:43:58 +00:00
Luigi Rizzo
353be77138 A last-minute change in the previous commit broke rule deletion,
so i am fixing it, this time with a more detailed description
of what the code is supposed to do.
2010-03-31 01:51:08 +00:00
Xin LI
73a0004b9d MFC r204533:
Add PCI ID for MCS9901.

Submitted by:	gcooper
PR:		kern/144397
2010-03-31 00:41:32 +00:00
Marius Strobl
8fcbb37733 MFC: r203846
Predict KASSERTs to be true.
2010-03-30 20:46:10 +00:00
Marius Strobl
411fea736d MFC: r203845
- Add the 'cmp' and 'core' pseudo-busses which are used to group CPU cores
  to the exclusion lists as the CPU nodes aren't handled as regular devices
  either. Also add the pseudo-devices found in Sun Fire V1280.
- Allow nexus_attach() and nexus_alloc_resource() to be used by drivers
  derived from nexus(4) for subordinate busses.
- Don't add the zero-sized memory resources of glue devices to the resource
  lists.
2010-03-30 20:44:04 +00:00
Marius Strobl
306d372fa5 MFC: r203843
Resurrect nexusvar.h from r167307.
2010-03-30 20:39:47 +00:00
Marius Strobl
ceaf6ad0fa MFC: r203839
Style fixes
2010-03-30 20:38:18 +00:00
Marius Strobl
9604687663 MFC: r203838
- Search the whole OFW device tree instead of only the children of the
  root nexus device for the CPUs as starting with UltraSPARC IV the 'cpu'
  nodes hang off of from 'cmp' (chip multi-threading processor) or 'core'
  or combinations thereof. Also in large UltraSPARC III based machines
  the 'cpu' nodes hang off of 'ssm' (scalable shared memory) nodes which
  group snooping-coherency domains together instead of directly from the
  nexus.
  It would be great if we could use newbus to deal with the different ways
  the 'cpu' devices can hang off of pseudo ones but unfortunately both
  cpu_mp_setmaxid() and sparc64_init() have to work prior to regular device
  probing.
- Add support for UltraSPARC IV and IV+ CPUs. Due to the fact that these
  are multi-core each CPU has two Fireplane config registers and thus the
  module/target ID has to be determined differently so the one specific
  to a certain core is used. Similarly, starting with UltraSPARC IV the
  individual cores use a different property in the OFW device tree to
  indicate the CPU/core ID as it no longer is in coincidence with the
  shared slot/socket ID.
  This involves changing the MD KTR code to not directly read the UPA
  module ID either. We use the MID stored in the per-CPU data instead of
  calling cpu_get_mid() as a replacement in order prevent clobbering any
  registers as side-effect in the assembler version. This requires CATR()
  invocations from mp_startup() prior to mapping the per-CPU pages to be
  removed though.
  While at it additionally distinguish between CPUs with Fireplane and
  JBus interconnects as these also use slightly different sizes for the
  JBus/agent/module/target IDs.
- Make sparc64_shutdown_final() static as it's not used outside of
  machdep.c.
2010-03-30 20:29:45 +00:00
Marius Strobl
c4adffba57 MFC: r203833
- At least the trap table of the Sun Fire V1280 firmware apparently has
  no cleanwindows handler so just remove trying to trigger it from _start
  and the AP trampoline code as that leads to a crash there. This should
  be okay as leaking data from the OFW via the CPU registers on start of
  the kernel should be no real concern.
- Make the comments of _start and the AP trampoline code regarding the
  initializations they perform match each other and reality.
- Make the comments of the AP trampoline code regarding iTLB accesses
  refer to the right macro.
2010-03-30 20:12:42 +00:00