Commit Graph

1285 Commits

Author SHA1 Message Date
Marius Strobl
20359f8025 Add missing bus_dmamap_sync() calls for the work DMA map.
MFC after:	2 weeks
2011-03-06 13:08:25 +00:00
Marius Strobl
c3719ff443 Add missing bus_dmamap_sync() calls for the work DMA map.
MFC after:	2 weeks
2011-03-06 13:06:41 +00:00
Marius Strobl
1ae5318fe8 - Allocate the DMA memory used for the work area as coherent as at least
the ataahci(4) and atamarvell(4) drivers share it between the host and
  the controller.
- Spell some zeros as BUS_DMA_WAITOK when used as bus_dmamem_alloc() flags.

MFC after:	2 weeks
2011-03-06 12:54:00 +00:00
Nathan Whitehorn
65cb6238bd Add the disk ident and a human-meaningful description (here, the disk model
string) to the geom_disk config XML so that they are easily accessible from
userland.

MFC after:	1 week
2011-02-26 14:58:54 +00:00
Jack F Vogel
bf0477b215 Support for the new Patsburg PCH chipset:
- SMBus Controller
     - SATA Controller
     - HD Audio Controller
     - Watchdog Controller

Thanks to Seth Heasley (seth.heasley@intel.com) for providing us code.

MFC after 3 days
2011-02-01 01:05:11 +00:00
Jack F Vogel
d5267ede37 Support for the new DH89xxCC PCH chipset including:
- SATA controller
      - Watchdog timer
      - SMBus controller
2011-01-31 18:41:52 +00:00
Alexander Motin
f1bfc8aba8 ICH7 SATA controller in legacy mode can provide access to SATA registers
via AHCI-like memory resource at BAR(5). Use it if BIOS was so kind to
allocate memory for that BAR. This allows hot-plug support and connection
speed reporting.

MFC after:	2 weeks
2011-01-24 09:24:20 +00:00
Marius Strobl
1510a2b019 Several chipset drivers alter parameters relevant for the DMA tag creation,
i.e. alignment, max_address, max_iosize and segsize (only max_address is
thought to have an negative impact regarding this issue though), after
calling ata_dmainit() either directly or indirectly so these values have
no effect or at least no effect on the DMA tags and the defaults are used
for the latter instead. So change the drivers to set these parameters
up-front and ata_dmainit() to honor them.

Reviewd by:	mav
MFC after:	1 month
2010-11-28 18:53:29 +00:00
Alexander Motin
8a1d183fb7 Do hard reset before soft reset for SATA channels. Soft reset reported to be
not enough to restore device readiness in some situations.

Tested by: 	Roger Hammerstein <cheeky.m@live.com> on ServerWorks HT1000.
2010-11-27 07:03:31 +00:00
Alexander Motin
95e97044c7 Make ATA_CAM wrapper to report SATA power management capabilities to CAM to
make it configure device to initiate transitions if controller configured
to accept them. This makes hint.ata.X.pm_level=1 mode working.
2010-11-18 19:28:45 +00:00
Alexander Motin
5c2a4ae217 Even if we are skipping SATA hard reset - set power management bits in
SControl register. This should make things consistent and help to avoid
unexpected PHY events that I've noticed in some cases on VIA controllers.
2010-11-18 11:58:17 +00:00
Alexander Motin
1f6aa21d47 Record that there is no devices if SATA reset found none. 2010-11-18 10:34:18 +00:00
Alexander Motin
ee597c8246 Some VIA SATA controllers provide access to non-standard SATA registers via
PCI config space. Use them to implement hot-plug and link speed reporting.
Tested on ASRock PV530 board with VX900 chipset.
2010-11-18 08:03:40 +00:00
Alexander Motin
040545848d Add IDs for VIA VX900 chipset SATA controller.
(Missed part of r215428)
2010-11-17 17:52:04 +00:00
Alexander Motin
2cbfd42740 Add IDs for VIA VX900 chipset SATA controller.
MFC after:	1 week
2010-11-17 16:17:35 +00:00
Rebecca Cran
b1ce21c6ef Fix typos.
PR:	bin/148894
Submitted by:	olgeni
2010-11-09 10:59:09 +00:00
Alexander Motin
ba3a999598 Teach ahci(4), siis(4) and ATA_CAM ata(4) wrapper report to CAM residual
I/O length on underruns, that often happens for some SCSI commands.
2010-11-08 15:36:15 +00:00
Alexander Motin
285ba17329 Mark command submission timeouts as timeouts. This should trigger device
resets and increase chances of getting device back again.
2010-11-06 19:11:49 +00:00
Alexander Motin
618c8d01f2 Add support for odd-sized PIO transfers, sometimes used by ATAPI. 2010-11-06 14:22:50 +00:00
Alexander Motin
82d2b37bc0 Remove stale line, accidentally slipped into r214016.
MFC after:	3 days
2010-11-02 09:31:24 +00:00
Alexander Motin
bda55b6adb Set of legacy mode SATA enchancements:
- Implement proper combined mode decoding for Intel controllers to properly
identify SATA and PATA channels and associate ATA channels with SATA ports.
This fixes wrong reporting and in some cases hard resets to wrong SATA ports.
- Improve SATA registers support to handle hot-plug events and potentially
interface errors. For ICH5/6300ESB chipsets these registers accessible via
PCI config space. For later ones they may be accessible via PCI BAR(5).
- For controllers not generating interrupts on hot-plug events, implement
periodic status polling. Use it to detect hot-plug on Intel and VIA
controllers. Same probably could also be used for Serverworks and SIS.
2010-10-18 11:30:13 +00:00
Alexander Motin
ba8834a379 Revert r132291.
Restore setting PIO/WDMA timings for VIA UDMA133 controllers.
Linux disables only AST register writing there, but no all timings.
2010-09-30 16:09:52 +00:00
Alexander Motin
433d4558c1 Add missing le32toh(), same as recently done in ata-siliconimage.c. 2010-09-24 07:14:14 +00:00
Jayachandran C.
831826341b Add missing byteswap, works on big endian systems now (tested on Netlogic
XLS MIPS processor).

Submitted by:	Sreekanth M. S. <kanthms at netlogicmicro dot com>
Reviewed by:	mav
2010-09-23 05:17:36 +00:00
Nathan Whitehorn
c14e163ad1 Fix a problem where device detection would work unreliably on Serverworks
K2 SATA controllers. The chip's status register must be read first, and
as a long, for other registers to be correctly updated after a command, and
this includes the command sequence in device detection as well as the
previously handled case after interrupts. While here, clean up some
previous hacks related to this controller.

Reported by:	many
Reviewed by:	mav
MFC after:	3 weeks
2010-09-09 13:17:30 +00:00
Alexander Motin
a6c48c7c72 Add fix for SiI3114 and SiI3512 chips bug, which caused sending R_ERR in
response to DMA activate FIS under certain circumstances. This is
recommended fix from chip datasheet. If triggered, this bug most likely
cause write command timeout.

MFC after:	2 weeks
2010-09-02 12:32:29 +00:00
Alexander Motin
a250a687f7 SATA1.x SiliconImage controllers on power-on reset TFD Status register into
value 0xff. On hot-plug this value confuses ata_generic_reset() device
presence detection logic. As soon as we already know drive presence from
SATA hard reset, hint ata_generic_reset() to wait for device signature
until success or full timeout.
2010-09-02 11:18:43 +00:00
Alexander Motin
901c71c704 Increase device reset timeout from 10 to 15 seconds, same as in ahci(4).
Some devices found need about 10-12 seconds to spinup.
2010-09-01 06:43:41 +00:00
Alexander Motin
bfc8500c34 Add Intel Cougar Point PCH SATA Controller DeviceIDs. Correct some existing
entries for Intel Ibex Peak (5 Series/3400 Series) PCH SATA controllers.

Submitted by:	jfv@
MFC after:	1 week
2010-08-28 07:10:51 +00:00
Alexander Motin
8edcf69406 Export PCI IDs of ATA/SATA controllers through CAM and ata(4) layers to
GEOM. This information needed for proper soft-RAID's on-disk metadata
reading and writing.
2010-07-25 15:43:52 +00:00
Alexander Motin
e064bdc08a Make legacy ATA emulation detection more strict. This should fix false
positive legacy detection and attach failure/panic for Marvell 88SX6141
controller and potentially some others.

PR:		kern/145064
2010-07-16 17:27:43 +00:00
Alexander Motin
6332c92180 Improve interrupt setup errors handling. 2010-07-16 10:05:00 +00:00
Alexander Motin
b6ef82a03b Disable multi-sector PIO transfers if ATA_SET_MULTI command failed.
Submitted by:	Mikolaj Golub on fs@
2010-07-13 06:42:47 +00:00
Alexander Motin
cd646aba81 Revert and remake r209883:
Do not grab lock while setting up interrupt, as it causes LOR with
allocation code. Instead make interrupt handler check that CAM bus
initialization completed before touching it.

While there, slightly improve attach errors handling.

Reported by:	kib
2010-07-12 12:16:11 +00:00
Alexander Motin
aecfe194a9 If ata_sata_phy_reset() failed and ata_generic_reset() is not called, mark
channel as having no devices connected. This improves hot-unplug operation
on legacy-emulating SATA controllers.
2010-07-10 15:36:27 +00:00
Alexander Motin
663c22a27d On attach, grab channel lock before setting up interrupt. This fixes crash
in ATA_CAM mode if phy connect event arrive before CAM bus initialization
completed.
2010-07-10 15:27:27 +00:00
Alexander Motin
9a9bce34f1 Make hw.ata.ata_dma_check_80pin tunable affect not only device side, but
also controller side cable checks. Make respective sysctl writable.

PR:		kern/143462
2010-07-10 13:46:14 +00:00
Warner Losh
2a08b0b7a1 Add a safety-belt. If the identified disk has 0 blocks, don't attach
it.  This can happen in some cases when plugging in SD/SmartCard PC
Cards with empty slots.  It is better to detect this bogosity, and
refuse to attach rather than panic with a division by zero (in one of
many places) down stream.
2010-07-04 07:42:52 +00:00
Warner Losh
907659f0dc Minor formatting nits. 2010-07-04 05:58:17 +00:00
Alexander Motin
7ce1f3e580 Add ata(4) ability to limit initial ATA mode for devices via device hints.
After boot this mode can be changed with atacontrol/camcontrol as usual.
It works for both legacy and ATA_CAM wrapper mode.

PR:		kern/123980
2010-07-03 14:14:42 +00:00
Nathan Whitehorn
7248ea35ca Following r209299, level interrupts are low by default on PPC, so remove
the hack here to reprogram the interrupt for K2 SATA devices.
2010-06-18 14:17:45 +00:00
Nathan Whitehorn
351129c7bb Some revisions of the Serverworks K2 SATA controller have a data
corruption bug where if an ATA command is issued before DMA is started,
data will become available to the controller before it knows what to do
with it. This results in either data corruption or a controller crash.

This patch remedies the problem by adopting the workaround employed
by Linux and Darwin: starting the DMA engine prior to sending the ATA
command.

Observer on:	Xserve G5
Reviewed by:	mav
MFC after:	1 week
2010-06-06 14:09:48 +00:00
Nathan Whitehorn
33520e90b2 Correct the comment. We now use level low instead of edge high for this
interrupt.
2010-06-05 16:27:15 +00:00
Nathan Whitehorn
ff6f4d01f1 Partially revert r208162 while waiting for review on a more comprehensive
fix. On Apple OpenPICs, the low/high bit of the interrupt sense is only
respected for interrupt 0. We currently erroneously program all OpenPIC
interrupts level high instead of level low by default, which only matters
for some G5 systems where the SATA controllers use IRQ 0.

This change is a quick fix that will be reverted once the effect of
changing the default interrupt sense on embedded systems is known.

MFC after:	3 days
2010-06-05 16:25:25 +00:00
Alexander Motin
20b964467e Fix possible use after free.
Found with:   Coverity Prevent(tm)
CID:          4634
2010-06-05 08:58:03 +00:00
Alexander Motin
c25d9e1d96 Fix use after free on error.
Found with:   Coverity Prevent(tm)
CID:          4722
2010-06-05 08:44:40 +00:00
Alexander Motin
6ee9deb145 Fix PCH chipset IDs. They are 0x3bxx, not 0x3axx.
Pointy hat to:	me
2010-06-04 07:35:59 +00:00
Alexander Motin
445cc79ca9 Report ATA/SATA channel number to NewBus at location string. 2010-05-22 07:32:47 +00:00
Alexander Motin
6533cd198d Improve suspend/resume support. Make sure controller is idle on suspend
and reset it on resume.
2010-05-21 13:29:28 +00:00
Marius Strobl
4461491b3e Change ad_firmware_geom_adjust() to operate on a struct disk * only and
hook it up to ada(4) also. While at it, rename *ad_firmware_geom_adjust()
to *ata_disk_firmware_geom_adjust() etc now that these are no longer
limited to ad(4).

Reviewed by:	mav
MFC after:	3 days
2010-05-20 12:46:19 +00:00