Commit Graph

1974 Commits

Author SHA1 Message Date
Alexander Motin
9081a9b2c3 Handle the race in cpu_idle() when due to the critical section CPU could get
into sleep after receiving interrupt, delaying interrupt thread execution
indefinitely until the next interrupt arrive.

Reviewed by:	nwhitehorn
MFC after:	3 days
2011-09-29 14:19:34 +00:00
Konstantin Belousov
578113aaa3 Remove locking of the vm page queues from several pmaps, which only
protected the dirty mask updates. The dirty mask updates are handled
by atomics after the r225840.

Submitted by:	alc
Tested by:	flo (sparc64)
MFC after:	2 weeks
2011-09-28 15:01:20 +00:00
Kip Macy
8451d0dd78 In order to maximize the re-usability of kernel code in user space this
patch modifies makesyscalls.sh to prefix all of the non-compatibility
calls (e.g. not linux_, freebsd32_) with sys_ and updates the kernel
entry points and all places in the code that use them. It also
fixes an additional name space collision between the kernel function
psignal and the libc function of the same name by renaming the kernel
psignal kern_psignal(). By introducing this change now we will ease future
MFCs that change syscalls.

Reviewed by:	rwatson
Approved by:	re (bz)
2011-09-16 13:58:51 +00:00
Konstantin Belousov
26ccf4f10f Inline the syscallenter() and syscallret(). This reduces the time measured
by the syscall entry speed microbenchmarks by ~10% on amd64.

Submitted by:	jhb
Approved by:	re (bz)
MFC after:	2 weeks
2011-09-11 16:05:09 +00:00
Konstantin Belousov
3407fefef6 Split the vm_page flags PG_WRITEABLE and PG_REFERENCED into atomic
flags field. Updates to the atomic flags are performed using the atomic
ops on the containing word, do not require any vm lock to be held, and
are non-blocking. The vm_page_aflag_set(9) and vm_page_aflag_clear(9)
functions are provided to modify afalgs.

Document the changes to flags field to only require the page lock.

Introduce vm_page_reference(9) function to provide a stable KPI and
KBI for filesystems like tmpfs and zfs which need to mark a page as
referenced.

Reviewed by:    alc, attilio
Tested by:      marius, flo (sparc64); andreast (powerpc, powerpc64)
Approved by:	re (bz)
2011-09-06 10:30:11 +00:00
Robert Watson
e5a0927394 Follow up to r225203 refining break-to-debugger run-time configuration
improvements:

(1) Implement new model in previously missed at91 UART driver
(2) Move BREAK_TO_DEBUGGER and ALT_BREAK_TO_DEBUGGER from opt_comconsole.h
    to opt_kdb.h (spotted by np)
(3) Garbage collect now-unused opt_comconsole.h

MFC after:	3 weeks
Approved by:	re (bz)
2011-08-27 14:24:27 +00:00
Robert Watson
4cf7545589 Attempt to make break-to-debugger and alternative break-to-debugger more
accessible:

(1) Always compile in support for breaking into the debugger if options
    KDB is present in the kernel.

(2) Disable both by default, but allow them to be enabled via tunables
    and sysctls debug.kdb.break_to_debugger and
    debug.kdb.alt_break_to_debugger.

(3) options BREAK_TO_DEBUGGER and options ALT_BREAK_TO_DEBUGGER continue
    to behave as before -- only now instead of compiling in
    break-to-debugger support, they change the default values of the
    above sysctls to enable those features by default.  Current kernel
    configurations should, therefore, continue to behave as expected.

(4) Migrate alternative break-to-debugger state machine logic out of
    individual device drivers into centralised KDB code.  This has a
    number of upsides, but also one downside: it's now tricky to release
    sio spin locks when entering the debugger, so we don't.  However,
    similar logic does not exist in other device drivers, including uart.

(5) dcons requires some special handling; unlike other console types, it
    allows overriding KDB's own debugger selection, so we need a new
    interface to KDB to allow that to work.

GENERIC kernels in -CURRENT will now support break-to-debugger as long as
appropriate boot/run-time options are set, which should improve the
debuggability of BETA kernels significantly.

MFC after:	3 weeks
Reviewed by:	kib, nwhitehorn
Approved by:	re (bz)
2011-08-26 21:46:36 +00:00
Nathan Whitehorn
9f2c359f16 Add support for the Blu-Ray drive found in the Sony Playstation 3 and fix
some realted minor bugs in PS3 internal storage support.

Submitted by:	glevand <geoffrey.levand@mail.ru>
Approved by:	re (bz)
2011-08-14 00:20:37 +00:00
Konstantin Belousov
d98d0ce27a - Move the PG_UNMANAGED flag from m->flags to m->oflags, renaming the flag
to VPO_UNMANAGED (and also making the flag protected by the vm object
  lock, instead of vm page queue lock).
- Mark the fake pages with both PG_FICTITIOUS (as it is now) and
  VPO_UNMANAGED. As a consequence, pmap code now can use use just
  VPO_UNMANAGED to decide whether the page is unmanaged.

Reviewed by:	alc
Tested by:	pho (x86, previous version), marius (sparc64),
    marcel (arm, ia64, powerpc), ray (mips)
Sponsored by:	The FreeBSD Foundation
Approved by:	re (bz)
2011-08-09 21:01:36 +00:00
Marcel Moolenaar
5ce36fdb77 Cross a T and dot an I:
o   Fix awkward use of braces in combination with mis-indentation.
    A mistake, that happened to yield the right behaviour?
o   Fix typo in comment.

No functional change.

Approved by:	re (blanket)
2011-08-02 23:49:23 +00:00
Marcel Moolenaar
d50c56183e It's invalid to use GLOBAL() for kernload_ap, as the macro switches
to the .data section. We need kernload_ap in the boot page.

Approved by:	re (blanket)
2011-08-02 23:33:44 +00:00
Marcel Moolenaar
d7f74bdca7 There's no ':' after GLOBAL(). Missed due to no SMP testing.
Approved by:	re (blanket)
2011-08-02 23:06:59 +00:00
Marcel Moolenaar
2b5bf115ae Add support for Juniper's loader. The difference between FreeBSD's and
Juniper's loader is that Juniper's loader maps all of the kernel and
preloaded modules at the right virtual address before jumping into the
kernel. FreeBSD's loader simply maps 16MB using the physical address
and expects the kernel to jump through hoops to relocate itself to
it's virtual address. The problem with the FreeBSD loader's approach is
that it typically maps too much or too little. There's no harm if it's
too much (other than wasting space), but if it's too little then the
kernel will simply not boot, because the first thing the kernel needs
is the bootinfo structure, which is never mapped in that case. The page
fault that early is fatal.

The changes constitute:
1.  Do not remap the kernel in locore.S. We're mapped where we need to
    be so we can pretty much call into C code after setting up the
    stack.
2.  With kernload and kernload_ap not set in locore.S, we need to set
    them in pmap.c: kernload gets defined when we preserve the TLB1.
    Here we also determine the size of the kernel mapped. kernload_ap
    is set first thing in the pmap_bootstrap() method.
3.  Fix tlb1_map_region() and its use to properly externd the mapped
    kernel size to include low-level data structures.

Approved by:	re (blanket)
Obtained from:	Juniper Networks, Inc
2011-08-02 15:35:43 +00:00
Marcel Moolenaar
67ad01694a Apply r221124 to Book-E: switch to the new NFS client.
Approved by:	re (blanket)
2011-07-31 18:34:38 +00:00
Marcel Moolenaar
f1a8a35846 Fix r222813: we need to include sys/cpuset.h. because the PIC interface
uses cpuset_t. While here, fix the redundant inclusion of sys/bus.h and
order the includes.

Approved by:	re (blanket)
2011-07-31 18:30:38 +00:00
Marcel Moolenaar
9668a15a6a Fix r224187: .word defines a 16-bit object and size_t is defined as
a 32-bit intergal. Use .long to define sintrcnt and sintrname.

Approved by:	re (blanket)
2011-07-31 18:26:47 +00:00
Nathan Whitehorn
02d9c7407f Fix an error that could cause sysctl -a to enter an infinite loop in the
event of a broken or busy fan due to returning incorrect error codes from
the FCU sysctl handler.

Reported by:	Path Mather <paul at gromit dot dlib dot vt dot edu>1
Approved by:	re (kib)
2011-07-30 00:52:13 +00:00
Andreas Tobler
42f2270475 This a follow up commit from r224216 for powerpc 32-bit. Increase
the storage size for sintrcnt/sintrnames to .long.

Reviewed by: nwhitehorn
Approved by: re (kib)
2011-07-25 20:10:01 +00:00
Attilio Rao
732772c701 On 64 bit architectures size_t is 8 bytes, thus it should use an 8 bytes
storage.
Fix the sintrcnt/sintrnames specification.

No MFC is previewed for this patch.

Reported, reviewed and tested by:	marcel
Approved by:	re (kib)
2011-07-19 12:41:57 +00:00
Attilio Rao
68b739cd6f Add the possibility to specify from kernel configs MAXCPU value.
This patch is going to help in cases like mips flavours where you
want a more granular support on MAXCPU.

No MFC is previewed for this patch.

Tested by:	pluknet
Approved by:	re (kib)
2011-07-19 00:37:24 +00:00
Attilio Rao
521ea19d1c - Remove the eintrcnt/eintrnames usage and introduce the concept of
sintrcnt/sintrnames which are symbols containing the size of the 2
  tables.
- For amd64/i386 remove the storage of intr* stuff from assembly files.
  This area can be widely improved by applying the same to other
  architectures and likely finding an unified approach among them and
  move the whole code to be MI. More work in this area is expected to
  happen fairly soon.

No MFC is previewed for this patch.

Tested by:	pluknet
Reviewed by:	jhb
Approved by:	re (kib)
2011-07-18 15:19:40 +00:00
Nathan Whitehorn
297becf967 Enable PREEMPTION for PowerPC/AIM generic kernels. The last known PREEMPTION
bug on PowerPC was resolved by r223485, and it appears to run stably at this
point.
2011-07-14 15:35:43 +00:00
Nathan Whitehorn
534c6b8916 Follow Linux by unconditionally stripping the RX vlan tag from incoming
packets. It turns out that all firmware versions insert it, whether or not
they support VLAN tagging.

Submitted by:	glevand <geoffrey.levand at mail dot ru>
2011-07-05 15:00:55 +00:00
Attilio Rao
cfdfd32d34 MFC 2011-06-26 17:30:46 +00:00
Nathan Whitehorn
9134df8b6f Add better error handling for RTAS calls. These can potentially cause
machine checks (e.g. invalid PCI configuration cycles), but these can
be caught and recovered from. This change also the RTAS PCI driver to
work without modification as a replacement for the Grackle driver on
Grackle-based Powermacs.
2011-06-26 16:11:36 +00:00
Nathan Whitehorn
1b17fa33dc Revert r223479. It is unnecessary and served only to slightly ameliorate
some manifestations of the bug actually fixed in r223485.
2011-06-26 15:08:14 +00:00
Nathan Whitehorn
373506f71d Turn the minimum PWM fan speed down to 30 from 40. It turns out the burning
smell that caused me to turn this up was due to a failed fan burning, not
a CPU (plus a healthy dose of paranoia).

Submitted by:	Paul Mather <paul at gromit dot dlib dot vt dot edu>
2011-06-26 00:49:17 +00:00
Attilio Rao
de138ec703 MFC 2011-06-24 16:35:40 +00:00
Nathan Whitehorn
e69dff491d Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)
instead of a PCPU field for curthread. This averts a race on SMP systems
with a high interrupt rate where the thread looking up the value of
curthread could be preempted and migrated between obtaining the PCPU
pointer and reading the value of pc_curthread, resulting in curthread being
observed to be the current thread on the thread's original CPU. This played
merry havoc with the system, in particular with mutexes. Many thanks to
jhb for helping me work this one out.

Note that Book-E is in principle susceptible to the same problem, but has
not been modified yet due to lack of Book-E hardware.

MFC after:	2 weeks
2011-06-23 22:21:28 +00:00
Nathan Whitehorn
045aee08f3 Clear any outstanding atomic reservations when traps are taken. This fixes
some interesting bugs (mostly on SMP systems) with atomic operations
silently failing in interrupt heavy situations, especially when using
overflow pages.
2011-06-23 16:34:41 +00:00
Andreas Tobler
dcf496e844 Fix merge typo. 2011-06-23 09:46:12 +00:00
Andreas Tobler
f7688a4194 Add leading zeros when printing the stackframe on __powerpc64__. 2011-06-23 09:43:53 +00:00
Nathan Whitehorn
f574af0d6d Use atomic operations to mask and unmask IRQs. This prevents a problem
(obvious in retrospect) in which interrupts on one CPU that are temporarily
masked can end up permanently masked when a handler on another CPU clobbers
the interrupt mask register with an old copy.
2011-06-23 04:35:45 +00:00
Nathan Whitehorn
1c167648c9 Use 4 KB pages for storage bus devices, which seems to be what the HV uses
internally.
2011-06-23 04:06:33 +00:00
Nathan Whitehorn
98934b1fd5 Rework the PS3 disk driver to support NCQ and do its DMA a little
differently.
2011-06-23 03:37:25 +00:00
Nathan Whitehorn
67de2cd330 Add hypervisor call error codes. 2011-06-23 03:20:11 +00:00
Attilio Rao
9b571ec6b3 MFC 2011-06-22 19:42:32 +00:00
Nathan Whitehorn
cb705160c6 This is more complicated than I expected. Storage devices need the IOMMU
set up, but must not use it.
2011-06-22 02:23:18 +00:00
Nathan Whitehorn
32638a3a01 The IOMMU is not involved for the storage bus. 2011-06-22 02:11:42 +00:00
Attilio Rao
49ea5c076c MFC 2011-06-21 09:09:53 +00:00
Nathan Whitehorn
044ae57637 Work/hack around some race conditions present in the hardware/HV interface.
Partially inspired by a patch from glevand (geoffrey.levand@mail.ru).
2011-06-20 02:17:34 +00:00
Nathan Whitehorn
dfcd47a78d Make this slightly less yelly about regions that the hypervisor protects
from us by not registering them as disks.
2011-06-20 01:43:18 +00:00
Nathan Whitehorn
9ba8a92787 Add an OHCI driver to complement the EHCI one. The infrastructure to attach
both to the parent ps3bus was in r223313. This driver itself comes from the
ps3 project branch.
2011-06-20 00:46:07 +00:00
Nathan Whitehorn
0d3170573e Driver for PS3's internal hard disk. Hopefully this can be CAM-ified in
the future, but presents a set of simple block devices for now. With
(forthcoming) boot loader support or vfs.root.mountfrom, allows booting
PS3s from disk.

Submitted by:	glevand <geoffrey.levand@mail.ru>
2011-06-20 00:17:44 +00:00
Attilio Rao
c7c2767e33 Remove pc_other_cpus and pc_cpumask usage from powerpc support.
Tested and reviewed by:	andreast
2011-06-16 07:27:13 +00:00
Nathan Whitehorn
698ef695bc Follow up r222980 on PowerPC: add sound(4) and common device drivers
to PowerPC GENERIC (along with a small rearrangement).
2011-06-11 12:34:08 +00:00
Attilio Rao
3bce356ea4 MFC 2011-06-04 22:05:20 +00:00
Andreas Tobler
03c6aeca84 Add new fan controller driver for the G4 MDD PowerMac. Submitted and tested
by Justin Hibbits.

Approved by:	nwhitehorn (mentor)
2011-06-04 15:17:35 +00:00
Andreas Tobler
564a091bd2 - Improve error handling.
- Add retry loops for the i2c read/write functions.

Approved by:	nwhitehorn (mentor)
2011-06-04 09:25:59 +00:00
Nathan Whitehorn
d8c6808ade Retry the memory map-related portions of r222613, written by andreast,
after some minor tweaks and an increase in the early-boot stack space in
r222632.
2011-06-04 04:00:40 +00:00
Nathan Whitehorn
4770f5380e Fix a typo derived from a mismerge from mmu_oea that would cause
pmap_sync_icache() to sync random (possibly uncached or nonexisting!)
memory, causing kernel page faults or machine checks, most easily
triggered by using GDB. While here, add an additional safeguard to only
sync cacheable memory.

MFC after:	2 days
2011-06-04 03:22:16 +00:00
Andreas Tobler
7736fb1874 - Introduce a define for ZERO_C_TO_K.
- Fix the printing of the temperature when we exceed the critical value.

Approved by:	nwhitehorn (mentor)
2011-06-03 20:43:12 +00:00
Attilio Rao
d7073a2b3b MFC 2011-06-03 17:09:15 +00:00
Nathan Whitehorn
cd507188bc Quantities stored on the stack on ppc64 tend to be twice as large as on
ppc32, so make the early stack correspondingly twice as big.
2011-06-03 00:11:13 +00:00
Nathan Whitehorn
48174c14b5 Temporarily back out those parts of r222613 related to parsing the memory
map. They cause non-understood boot failures on some Apple machines with
more than 2 GB of RAM (like my work desktop).
2011-06-02 17:43:17 +00:00
Nathan Whitehorn
17763042e4 The POWER7 has only 32 SLB slots instead of 64, like other supported
64-bit PowerPC CPUs. Add infrastructure to support variable numbers of
SLB slots and move the user slot from 63 to 0, so that it is always
available.
2011-06-02 14:25:52 +00:00
Nathan Whitehorn
1dff98d9bb If running under a hypervisor, don't yell at the user about starting
unknown CPU types, instead relying on the hypervisor to have given us a
reasonable environment.
2011-06-02 14:23:36 +00:00
Nathan Whitehorn
20ae1015b9 Explicitly initialize the first thread's MSR to PSL_KERNSET. 2011-06-02 14:21:20 +00:00
Nathan Whitehorn
6dd24ab3f1 Include the modules area in the mapped kernel code. This fixes the kernel's
access to modules and loader metadata when started from real mode, but
without a direct map.
2011-06-02 14:19:18 +00:00
Nathan Whitehorn
97f7cde42c Remove some dead code: unnecessary isyncs and memory sorting, which are
handled in mtmsr() and mem_regions(), respectively.
2011-06-02 14:15:44 +00:00
Nathan Whitehorn
1787909001 MFpseries:
Renovate and improve the AIM Open Firmware support:
- Add RTAS (Run-Time Abstraction Services) support, found on all IBM systems
  and some Apple ones
- Improve support for 32-bit real mode Open Firmware systems
- Pull some more OF bits over from the AIM directory
- Fix memory detection on IBM LPARs and systems with more than one /memory
  node (by andreast@)
2011-06-02 14:12:37 +00:00
Attilio Rao
61b926921f MFC 2011-05-31 21:22:44 +00:00
Nathan Whitehorn
d098f93019 On multi-core, multi-threaded PPC systems, it is important that the threads
be brought up in the order they are enumerated in the device tree (in
particular, that thread 0 on each core be brought up first). The SLIST
through which we loop to start the CPUs has all of its entries added with
SLIST_INSERT_HEAD(), which means it is in reverse order of enumeration
and so AP startup would always fail in such situations (causing a machine
check or RTAS failure). Fix this by changing the SLIST into an STAILQ,
and inserting new CPUs at the end.

Reviewed by:	jhb
2011-05-31 15:11:43 +00:00
Attilio Rao
5b6ea0b538 MFC 2011-05-31 14:18:10 +00:00
Nathan Whitehorn
9d2a3635c1 Use kproc_exit() instead of returning from the management function on
systems with no manageable thermal control devices.
2011-05-29 22:37:23 +00:00
Nathan Whitehorn
d015abb774 Add some error handling here: if a sensor returns an error code (a negative
Kelvin temperature, which is impossible except for some contrived magnetic
spin systems), use the previous measurement from that sensor instead of
corrupting everything and randomly changing the fans or shutting off the
machine.
2011-05-29 20:46:53 +00:00
Nathan Whitehorn
d54e775e1e Add the next digit of precision to temperatures, which I missed when
converting the reporting format from degrees C to 0.1 degree K.
2011-05-29 20:04:02 +00:00
Nathan Whitehorn
cbfd4d0cbc Don't put negative values into the averages. 2011-05-29 19:53:11 +00:00
Nathan Whitehorn
815d7d92c1 Update the I2C-based temperature/fan drivers to connect to the Powermac
thermal control module. This provides automatic fan management on all G5
PowerMacs and Xserves.
2011-05-29 18:35:57 +00:00
Attilio Rao
da3dd8b7ab MFC 2011-05-29 18:33:13 +00:00
Andreas Tobler
d188174a4f Add a new driver, the ad7417, to read temperatures and voltages on some
PowerMac's.

Approved by:	nwhitehorn (mentor)
2011-05-29 14:25:42 +00:00
Attilio Rao
c7df91af4b MFC 2011-05-29 00:59:38 +00:00
Marcel Moolenaar
5f94931e7d The P4080 has 8 cores. Bump MAXCPU to 8 to match. 2011-05-29 00:40:59 +00:00
Marcel Moolenaar
ebfbeb83f6 o Add system versions for the P4040(E) and P4080(E).
o   In bare_probe(), change the logic that determines the maximum
    number of processors/cores into a switch statement and take
    advantage of the fact that bit 3 of the SVR value indicates
    whether we're running on a security enabled version. Since we
    don't care about that here, mask the bit. All -E versions
    are taken care of automatically.
2011-05-29 00:27:42 +00:00
Nathan Whitehorn
66e2bfe830 Adapt smusat(4) to use powermac_thermal. This provides automatic fan
management on dual- and quad-core Powermac G5s, and the last G5 iMacs.
2011-05-28 22:11:22 +00:00
Nathan Whitehorn
ad84e440a6 Require an error instead of a timeout to decide the new-style fan
commands won't work. This prevents a busy system from making smu(4)
suddenly decide its fans use the old-style command set.

MFC after:	3 days
2011-05-28 21:54:18 +00:00
Nathan Whitehorn
84d7767618 Factor out the SMU fan management code into a new module (powermac_thermal)
that will connect all of the various sensors and fan control modules on
Apple hardware with software-controlled fans (e.g. all G5 systems).

MFC after:	1 month
2011-05-28 21:13:22 +00:00
Marcel Moolenaar
8a4b7c64b3 o Determine the number of LAWs in a way the is future proof. Only the
MPC8555(E) has 8 LAWs, so don't make that the default case. Current
    processors have 12 LAWs so use that as the default instead.
o   Determine the target ID of the PCI/PCI-X and PCI-E controllers in
    a way that's more future proof. There's almost a perfect mapping
    from HC register offset to target ID, so use that as the default.
    Handle the MPC8548(E) specially, since it has a non-standard target
    ID for the PCI-E controller. Don't worry about whether the processor
    implements the target ID here, because we should not get called for
    PCI/PCI-X or PCI-E host controllers that don't exist.
2011-05-28 19:14:16 +00:00
Marcel Moolenaar
7591d5a373 Remove unused defines. They're distracting... 2011-05-28 16:30:24 +00:00
Marcel Moolenaar
ebf84ceca7 Better support different kernel hand-offs. When loaded directly
from U-Boot, the kernel is passed a standard argc/argv pair.
The Juniper loader passes the metadata pointer as the second
argument and passes 0 in the first. The FreeBSD loader passes
the metadata pointer in the first argument.

As such, have locore preserve the first 2 arguments in registers
r30 & r31. Change e500_init() to accept these arguments. Don't
pass global offsets (i.e. kernel_text and _end) as arguments to
e500_init(). We can reference those directly.

Rename e500_init() to booke_init() now that we're changing the
prototype.

In booke_init(), "decode" arg1 and arg2 to obtain the metadata
pointer correctly. For the U-Boot case, clear SBSS and BSS and
bank on having a static FDT for now. This allows loading the
ELF kernel and jumping to the entry point without trampoline.
2011-05-28 04:10:44 +00:00
Marcel Moolenaar
7faf44ba96 o The P1020(E) & P2020(E) also have two cores. This conditional has
a tendency to grow unwieldy so we may want to revisit this in due
    time.
o   Simplify the CPU reset function by writing to the reset control
    register irrespective of whether the CPU has one and automatically
    falling back to the debug control register if we didn't reset the
    CPU. The side-effect is that we now properly reset future processors
    without first having to add the system version to the list.
2011-05-27 23:18:41 +00:00
Marcel Moolenaar
6a76463e30 Wire the kernel using TLB1 entry 0 rather than entry 1. A more recent
U-Boot as found on the P1020RDB doesn't like it when we use entry 1
(for some reason) whereas an older U-Boot doesn't mind if we use entry
0. If anything else, this simplifies the code a bit.
2011-05-27 23:09:12 +00:00
Attilio Rao
9cb46334ee MFC 2011-05-27 16:09:10 +00:00
Marcel Moolenaar
df697aa015 o Swap the SVR numbers for MPC8533 & MPC8533E
o   Add SVR defines for P1011(E), P1020(E), P2010(E) & P2020(E)
2011-05-27 05:58:10 +00:00
Marcel Moolenaar
7512c508df Don't assume we have a valid bootinfo pointer. 2011-05-26 20:47:05 +00:00
Attilio Rao
7fcdc9a26f MFC 2011-05-26 17:38:00 +00:00
Nathan Whitehorn
2ec6a5984c Add a missing isync. 2011-05-26 14:34:22 +00:00
Nathan Whitehorn
5c59afe04b Add RTC support for the LV1 clock on the PS3. The hypervisor won't let us
set it, but it's better than nothing.
2011-05-24 02:19:45 +00:00
Attilio Rao
dc6dc1f573 Merge r221614,221696,221737,221840 from largeSMP project branch:
Rewrite atomic operations for powerpc in order to achieve the following:
- Produce a type-clean implementation (in terms of functions arguments
  and returned values) for the primitives.
- Fix errors with _long() atomics where they ended up with the wrong
  arguments to be accepted.
- Follow the sys/type.h specifics that define the numbered types starting
  from standard C types.
- Let _ptr() version to not auto-magically cast arguments, but leave
  the burden on callers, as _ptr() atomic is intended to be used
  relatively rarely.

Fix cfi in order to support the latest point.

In collabouration with:	bde
Tested by:		andreast, nwhitehorn, jceel
MFC after:		2 weeks
2011-05-22 20:55:54 +00:00
Attilio Rao
a713c4a5c3 Fix compilation.
Submitted by:	andreast
2011-05-18 19:46:26 +00:00
Attilio Rao
20bf92c280 Fix usage of cpumask that cannot be used like that anymore.
Reported by:	pluknet
2011-05-18 16:56:36 +00:00
Attilio Rao
c98b35868f Revert r222069,222068 as they were intended to be committed to the
largeSMP branch.

Reported by:	pluknet
2011-05-18 16:50:13 +00:00
Attilio Rao
1a203896c3 Fix warning spit out.
Reported by:	sbruno
2011-05-18 16:42:01 +00:00
Attilio Rao
db4b2ef5a2 Fix newly introduced code.
Reported by:	sbruno
2011-05-18 16:41:38 +00:00
Attilio Rao
fea3a3fa94 MFC 2011-05-17 22:03:01 +00:00
Attilio Rao
7e7a34e520 MFC 2011-05-16 16:34:03 +00:00
Nathan Whitehorn
87065c6765 Fix a </<= mixup. This could result in suboptimal performance on the last
page of physical memory.
2011-05-16 15:20:54 +00:00
Nathan Whitehorn
43db7b0eab Remove a useless check that served only to make 64-bit PPC systems
unbootable after r221855.

Submitted by:	andreast
MFC after:	1 week
2011-05-16 03:32:40 +00:00
Attilio Rao
b2aa562e7b MFC 2011-05-13 20:58:48 +00:00
Matthew D Fleming
cfb00e5aa7 Move the ZERO_REGION_SIZE to a machine-dependent file, as on many
architectures (i386, for example) the virtual memory space may be
constrained enough that 2MB is a large chunk.  Use 64K for arches
other than amd64 and ia64, with special handling for sparc64 due to
differing hardware.

Also commit the comment changes to kmem_init_zero_region() that I
missed due to not saving the file.  (Darn the unfamiliar development
environment).

Arch maintainers, please feel free to adjust ZERO_REGION_SIZE as you
see fit.

Requested by:	alc
MFC after:	1 week
MFC with:	r221853
2011-05-13 19:35:01 +00:00
Attilio Rao
b68eda3b54 MFC 2011-05-10 15:54:37 +00:00
Nathan Whitehorn
919f46b349 Only try to set up IPIs at boot on systems that actually have more than one
CPU. This fixes a panic observed on Heathrow-based systems without
SMP-capable PICs when the kernel had both options SMP and INVARIANTS.

MFC after:	5 days
2011-05-10 14:03:05 +00:00
Attilio Rao
6f8ca31360 Remove strict-aliasing fixup where it is easy to avoid that as it leads to
a faster implementation.

Requested by:	bde
2011-05-10 13:59:33 +00:00
Attilio Rao
7d456f2f3f Make the intended change. 2011-05-10 13:48:21 +00:00
Attilio Rao
c47dd3db8c Add the powerpc support.
Note that there is a dirty hack for calling openpic_write(), but
nwhitehorn approved it.

Discussed with:	nwhitehorn
2011-05-09 16:16:15 +00:00
Attilio Rao
1fcdd308be - Introduce stubs for type-pun from long to int
- Don't auto-cast _ptr operations as initially they were intended to
  be used rarely and consumers had to cast on their own.

Reported by:	bde, andreast
2011-05-09 15:59:34 +00:00
Attilio Rao
9137d17cd9 All architectures define the size-bounded types (uint32_t, uint64_t, etc.)
starting from base C types (int, long, etc).
That is also reflected when building atomic operations, as the
size-bounded types are built from the base C types.

However, powerpc does the inverse thing, leading to a serie of nasty
bugs.
Cleanup the atomic implementation by defining as base the base C type
version and depending on them, appropriately.

Tested by:	jceel
2011-05-08 00:39:49 +00:00
Nathan Whitehorn
6533dd880e SMP has worked perfectly for a very long time on 32-bit PowerPC on both
UP and SMP hardware. Enable it in GENERIC.

MFC after:	2 weeks
2011-05-06 20:43:02 +00:00
John Baldwin
f9a9473702 Retire isa_setup_intr() and isa_teardown_intr() and use the generic bus
versions instead.  They were never needed as bus_generic_intr() and
bus_teardown_intr() had been changed to pass the original child device up
in 42734, but the ISA bus was not converted to new-bus until 45720.
2011-05-06 13:48:53 +00:00
Nathan Whitehorn
cc734417b3 Do not use Open Firmware to open the device and instead program its start
on our own. This prevents hangs at boot when using a bm(4) NIC where the
cable is not plugged in at boot time.

Obtained from:	NetBSD
MFC after:	1 week
2011-05-06 03:26:24 +00:00
Attilio Rao
2be767e069 Add the watchdogs patting during the (shutdown time) disk syncing and
disk dumping.
With the option SW_WATCHDOG on, these operations are doomed to let
watchdog fire, fi they take too long.

I implemented the stubs this way because I really want wdog_kern_*
KPI to not be dependant by SW_WATCHDOG being on (and really, the option
only enables watchdog activation in hardclock) and also avoid to
call them when not necessary (avoiding not-volountary watchdog
activations).

Sponsored by:	Sandvine Incorporated
Discussed with:	emaste, des
MFC after:	2 weeks
2011-04-28 16:02:05 +00:00
Rick Macklem
4309e17add This patch changes head so that the default NFS client is now the new
NFS client (which I guess is no longer experimental). The fstype "newnfs"
is now "nfs" and the regular/old NFS client is now fstype "oldnfs".
Although mounts via fstype "nfs" will usually work without userland
changes, an updated mount_nfs(8) binary is needed for kernels built with
"options NFSCL" but not "options NFSCLIENT". Updated mount_nfs(8) and
mount(8) binaries are needed to do mounts for fstype "oldnfs".
The GENERIC kernel configs have been changed to use options
NFSCL and NFSD (the new client and server) instead of NFSCLIENT and NFSSERVER.
For kernels being used on diskless NFS root systems, "options NFSCL"
must be in the kernel config.
Discussed on freebsd-fs@.
2011-04-27 17:51:51 +00:00
Alexander Motin
97b53e3634 Switch the GENERIC kernels for all architectures to the new CAM-based ATA
stack. It means that all legacy ATA drivers are disabled and replaced by
respective CAM drivers. If you are using ATA device names in /etc/fstab or
other places, make sure to update them respectively (adX -> adaY,
acdX -> cdY, afdX -> daY, astX -> saY, where 'Y's are the sequential
numbers for each type in order of detection, unless configured otherwise
with tunables, see cam(4)).

ataraid(4) functionality is now supported by the RAID GEOM class.
To use it you can load geom_raid kernel module and use graid(8) tool
for management. Instead of /dev/arX device names, use /dev/raid/rX.
2011-04-24 08:58:58 +00:00
Andreas Tobler
c819dfaeba Add leading zeros when printing the physical memory chunks on __powerpc64__.
Approved by:	nwhitehorn (mentor)
2011-04-19 07:49:58 +00:00
Andreas Tobler
415a54c8c5 Adjust debugging string to match the actual function.
Approved by: nwhitehorn (mentor)
2011-04-14 19:37:31 +00:00
Andreas Tobler
8fd7d65779 The macro MOEA_PVO_CHECK is empty and not used. It is a left over from the
NetBSD import. Remove the definition and all its occurrences.

Approved by: nwhitehorn (mentor)
2011-04-14 18:26:50 +00:00
Andreas Tobler
3d20a4803b Add stoppcbs[] arrays on powerpc(64) and have each CPU save its
current context in the IPI_STOP handler. Similar as done on other
architectures.

Approved by: nwhitehorn (mentor)
2011-04-14 18:14:43 +00:00
Nathan Whitehorn
468f2ebf66 Make sure that extra threads in 32-bit processes stay in 32-bit mode. This
fixes operation of threaded 32-bit binaries on 64-bit kernels.
2011-04-13 13:24:27 +00:00
Andreas Tobler
1706df7cfa Remove duplicate definition of FIRSTARG.
Approved by:	nwhitehorn (mentor)
2011-03-17 19:44:00 +00:00
Nathan Whitehorn
f4338dac9f Don't sleep while setting the clock. This can cause panics when
periodic_resettodr() calls CLOCK_SETTIME() and smu tries to sleep while
running from a callout.

Reported by:	Torfinn Ingolfsen
2011-03-13 21:23:25 +00:00
Matthew D Fleming
c77715ef6c Mostly revert r219468, as I had misremembered the C standard regarding
the size of an extern array.

Keep one change from strncpy to strlcpy.
2011-03-11 18:56:55 +00:00
Matthew D Fleming
cd67ac41ae Use MAXPATHLEN rather than the size of an extern array when copying the
kernel name.  Also consistenly use strlcpy().

Suggested by:	Warner Losh
2011-03-10 22:56:00 +00:00
Nathan Whitehorn
797c37ee2b Fix whitespace nit. 2011-03-09 15:03:42 +00:00
Dmitry Chagin
e5d81ef1b5 Extend struct sysvec with new method sv_schedtail, which is used for an
explicit process at fork trampoline path instead of eventhadler(schedtail)
invocation for each child process.

Remove eventhandler(schedtail) code and change linux ABI to use newly added
sysvec method.

While here replace explicit comparing of module sysentvec structure with the
newly created process sysentvec to detect the linux ABI.

Discussed with:	kib

MFC after:	2 Week
2011-03-08 19:01:45 +00:00
Nathan Whitehorn
79c77d726e Turn off default generation of userland dot symbols on powerpc64 now that
we have a binutils that supports it. Kernel dot symbols remain on to assist
DDB.
2011-02-18 21:44:53 +00:00
Alan Cox
e6ffa21488 Remove pmap fields that are either unused or not fully implemented.
Discussed with:	kib
2011-02-17 15:36:29 +00:00
Matthew D Fleming
08b163fa51 Put the general logic for being a CPU hog into a new function
should_yield().  Use this in various places.  Encapsulate the common
case of check-and-yield into a new function maybe_yield().

Change several checks for a magic number of iterations to use
should_yield() instead.

MFC after:	1 week
2011-02-02 16:35:10 +00:00
Marcel Moolenaar
607ebaaf0c Rename INTR_VEC to MAP_IRQ. From the OFW or FDT we obtain a
PIC handle with interrupt pin. This we map to the resource
called SYS_RES_IRQ.
2011-02-02 05:58:51 +00:00
Nathan Whitehorn
5ad703e0c8 Fix boot on SMP systems after r218075 by delaying CPU binding until a
SYSINIT.

Reviewed by:	marcel
2011-01-29 23:26:28 +00:00
Marcel Moolenaar
6d2d7b8c0d Fix the interrupt code, broken 7 months ago. The interrupt framework
already supported nested PICs, but was limited to having a nested
AT-PIC only. With G5 support the need for nested OpenPIC controllers
needed to be added. This was done the wrong way and broke the MPC8555
eval system in the process.

OFW, as well as FDT, describe the interrupt routing in terms of a
controller and an interrupt pin on it. This needs to be mapped to a
flat and global resource: the IRQ. The IRQ is the same as the PCI
intline and as such needs to be representable in 8 bits. Secondly,
ISA support pretty much dictates that IRQ 0-15 should be reserved
for ISA interrupts, because of the internal workins of south bridges.
Both were broken.

This change reverts revision 209298 for a big part and re-implements
it simpler. In particular:
o   The id() method of the PIC I/F is removed again. It's not needed.
o   The openpic_attach() function has been changed to take the OFW
    or FDT phandle of the controller as a second argument. All bus
    attachments that previously used openpic_attach() as the attach
    method of the device I/F now implement as bus-specific method
    and pass the phandle_t to the renamed openpic_attach().
o   Change powerpc_register_pic() to take a few more arguments. In
    particular:
    -   Pass the number of IPIs specificly. The number of IRQs carved
	out for a PIC is the sum of the number of int. pins and IPIs.
    -   Pass a flag indicating whether the PIC is an AT-PIC or not.
	This tells the interrupt framework whether to assign IRQ 0-15
	or some other range.
o   Until we implement proper multi-pass bus enumeration, we have to
    handle the case where we need to map from PIC+pin to IRQ *before*
    the PIC gets registered. This is done in a similar way as before,
    but rather than carving out 256 IRQs per PIC, we carve out 128
    IRQs (124 pins + 4 IPIs). This is supposed to handle the G5 case,
    but should really be fixed properly using multiple passes.
o   Have the interrupt framework set root_pic in most cases and not
    put that burden in PIC drivers (for the most part).
o   Remove powerpc_ign_lookup() and replace it with powerpc_get_irq().
    Remove IGN_SHIFT, INTR_INTLINE and INTR_IGN.

Related to the above, fix the Freescale PCI controller driver, broken
by the FDT code. Besides not attaching properly, bus numbers were
assigned improperly and enumeration was broken in general. This
prevented the AT PIC from being discovered and interrupt routing to
work properly. Consequently, the ata(4) controller stopped functioning.

Fix the driver, and FDT PCI support, enough to get the MPC8555CDS
going again. The FDT PCI code needs a whole lot more work.

No breakages are expected, but lackiong G5 hardware, it's possible
that there are unpleasant side-effects. At least MPC85xx support is
back to where it was 7 months ago -- it's amazing how badly support
can be broken in just 7 months...

Sponsored by: Juniper Networks
2011-01-29 20:58:38 +00:00
Marcel Moolenaar
696703e5ea Have nexus behave the same as the one on ARM (marvell SoCs), so as to
prevent warnings during boot WRT to the fdtbus attachment.
2011-01-29 20:28:17 +00:00
Marcel Moolenaar
2af3fc178e Introduce macro FDT_MAP_IRQ to map from an interrupt controller and
interrupt pin pair to a global IRQ number. When multiple PICs exist
on a board, the interrupt pin alone is not unique.
2011-01-29 20:25:20 +00:00
Dmitry Chagin
a5c1afadeb Add macro to test the sv_flags of any process. Change some places to test
the flags instead of explicit comparing with address of known sysentvec
structures.

MFC after:	1 month
2011-01-26 20:03:58 +00:00
Nathan Whitehorn
a0a3479c06 Disable ATAPI DMA unconditionally on Apple Kauai ATA controllers, like it
is on the MacIO ones. It appears to be unreliable on all DBDMA-based
controllers for unknown reasons, which should be figured out eventually.

Tested by:	Torfinn Ingolfsen
MFC after:	1 week
2011-01-23 17:20:11 +00:00
Sergey Kandaurov
4053b05b91 Make MSGBUF_SIZE kernel option a loader tunable kern.msgbufsize.
Submitted by:	perryh pluto.rain.com (previous version)
Reviewed by:	jhb
Approved by:	kib (mentor)
Tested by:	universe
2011-01-21 10:26:26 +00:00
Andreas Tobler
639d24ce02 Remove unused variables. Spotted by a cppcheck
(devel/cppcheck, http://sourceforge.net/projects/cppcheck) run.

Approved by: nwhitehorn (mentor)
2011-01-20 20:23:03 +00:00
Andreas Tobler
d328763f19 Correct parsing of the grackle and uninorthpci ranges property.
Approved by: nwhitehorn (mentor)
2011-01-20 20:22:19 +00:00
Nathan Whitehorn
1161b88d4a Correct parsing of the cpcht ranges property.
Submitted by:	andreast
MFC after:	2 weeks
2011-01-20 15:02:51 +00:00
Konstantin Belousov
55aabb7fd1 For architectures not using direct map , and requiring real KVA page for
sf buf allocation, use wakeup() instead of wakeup_one() to notify sf
buffer waiters about free buffer.

sf_buf_alloc() calls msleep(PCATCH) when SFB_CATCH flag was given,
and for simultaneous wakeup and signal delivery, msleep() returns
EINTR/ERESTART despite the thread was selected for wakeup_one(). As
result, we loose a wakeup, and some other waiter will not be woken up.

Reported and tested by:	az
Reviewed by:	alc, jhb
MFC after:	1 week
2011-01-18 21:57:02 +00:00
Marcel Moolenaar
e3d4100642 Support booting non FDT-capable loaders:
1.  Allow embedding the FDT into the kernel, just like PowerPC/book-E.
2.  If the loader passes us a pointer to the bootinfo structure, save
    it and use it to fill in the gaps (e.g. bus frequencies, etc).
2011-01-17 23:54:50 +00:00
Jung-uk Kim
2fea643112 Add reader/writer lock around mem_range_attr_get() and mem_range_attr_set().
Compile sys/dev/mem/memutil.c for all supported platforms and remove now
unnecessary dev_mem_md_init().  Consistently define mem_range_softc from
mem.c for all platforms.  Add missing #include guards for machine/memdev.h
and sys/memrange.h.  Clean up some nearby style(9) nits.

MFC after:	1 month
2011-01-17 22:58:28 +00:00
Marcel Moolenaar
951f1334b6 Don't redefine MODINFOMD_BOOTINFO as MODINFOMD_DTBP. This
breaks support for older loaders. Add MODINFOMD_DTBP as
a new tag instead.
2011-01-15 20:18:08 +00:00
Andreas Tobler
49ffb2cf8c Remove unused variables. Spotted by a cppcheck
(devel/cppcheck, http://sourceforge.net/projects/cppcheck) run.

Approved by: nwhitehorn (mentor)
2011-01-15 19:16:05 +00:00
Konstantin Belousov
640c77e126 Enable shared page for the signal trampolines on PowerPC.
Reviewed and tested by:	nwhitehorn
2011-01-14 11:36:44 +00:00
Nathan Whitehorn
ff30eecffe Fix handling of NX pages on capable CPUs. Thanks to kib for prodding me
in the right direction.
2011-01-13 04:37:48 +00:00
Andreas Tobler
bd9aad47ea Add new functions, fcu_fan_set_pwm and fcu_fan_get_pwm, to set and get
the pwm values. We can now set the fan's speed of a PWM controlled fan
with % numbers between 30 and 100 % instead of trying to model a
% number based on rpm.
The fcu chip offers both, the dutycycle and the rpm value of the PWM
controlled fans. I added the rpm value to the list of information
available via sysctl(8).

Tested by: Paul Mather <paul at gromit dlib vt edu>

Approved by: nwhitehorn (mentor)
2011-01-11 21:18:29 +00:00
John Baldwin
58ccf5b41c Remove unneeded includes of <sys/linker_set.h>. Other headers that use
it internally contain nested includes.

Reviewed by:	bde
2011-01-11 13:59:06 +00:00
Konstantin Belousov
50a57dfbec Move repeated MAXSLP definition from machine/vmparam.h to sys/vmmeter.h.
Update the outdated comments describing MAXSLP and the process
selection algorithm for swap out.

Comments wording and reviewed by:	alc
2011-01-09 12:50:44 +00:00
David Schultz
fb7daace8b We don't support any floating point types larger than double on
powerpc, so DECIMAL_DIG should be 17.
2011-01-09 06:05:22 +00:00
Tijl Coosemans
f65742b27b White space changes to align comments. The mips and powerpc _inttypes.h
are now exactly the same.

Approved by:	kib (mentor)
2011-01-08 18:02:46 +00:00
Tijl Coosemans
9821039a64 Rename PRIreg helper macro to PRIptr to better reflect its use. Registers
and pointers don't always have the same size, e.g. the __mips_n32 ABI
(ILP32) has 64 bit registers but 32 bit pointers.

On mips introduce PRIptr to fix the format specifier for (u)intptr_t.

Prefix PRI64 and PRIptr with underscores because macro names starting with
PRI[a-zX] are reserved for future use.

Approved by:	kib (mentor)
2011-01-08 18:00:19 +00:00
Tijl Coosemans
a56e818f29 On mixed 32/64 bit architectures (mips, powerpc) use __LP64__ rather than
architecture macros (__mips_n64, __powerpc64__) when 64 bit types (and
corresponding macros) are different from 32 bit. [1]

Correct the type of INT64_MIN, INT64_MAX and UINT64_MAX.

Define (U)INTMAX_C as an alias for (U)INT64_C matching the type definition
for (u)intmax_t. Do this on all architectures for consistency.

Suggested by:	bde [1]
Approved by:	kib (mentor)
2011-01-08 12:43:05 +00:00
Tijl Coosemans
d942996baf On 32 bit architectures define (u)int64_t as (unsigned) long long instead
of (unsigned) int __attribute__((__mode__(__DI__))). This aligns better
with macros such as (U)INT64_C, (U)INT64_MAX, etc. which assume (u)int64_t
has type (unsigned) long long.

The mode attribute was used because long long wasn't standardised until
C99. Nowadays compilers should support long long and use of the mode
attribute is discouraged according to GCC Internals documentation.

The type definition has to be marked with __extension__ to support
compilation with "-std=c89 -pedantic".

Discussed with:	bde
Approved by:	kib (mentor)
2011-01-08 11:47:55 +00:00
Tijl Coosemans
9858863cd4 Fix types of some values in machine/_limits.h.
On some architectures UCHAR_MAX and USHRT_MAX had type unsigned int.
However, lacking integer suffixes for types smaller than int, their type
should correspond to that of an object of type unsigned char (or short)
when used in an expression with objects of type int. In that case unsigned
char (short) are promoted to int (i.e. signed) so the type of UCHAR_MAX and
USHRT_MAX should also be int.

Where MIN/MAX constants implicitly have the correct type the suffix has
been removed.

While here, correct some comments.

Reviewed by:	bde
Approved by:	kib (mentor)
2011-01-08 11:13:34 +00:00
Tijl Coosemans
911127a0d6 Remove unused support for 64 bit long on 32 bit architectures.
It was used mainly to discover and fix some 64-bit portability problems
before 64-bit arches were widely available.

Discussed with:	bde
Approved by:	kib (mentor)
2011-01-07 22:57:31 +00:00
Konstantin Belousov
39198f15ee Add AT_STACKPROT elf aux vector. Will be used to inform rtld about the
initial stack protection set by the kernel image activator.
2011-01-07 14:22:34 +00:00
John Baldwin
c305730dc0 Remove bogus usage of INTR_FAST. "Fast" interrupts are now indicated by
registering a filter handler rather than a threaded handler.  Also remove
a bogus use of INTR_MPSAFE for a filter.
2011-01-06 21:08:06 +00:00
Andreas Tobler
7dbe66c157 Remove unused variables. Spotted by a cppcheck
(devel/cppcheck, http://sourceforge.net/projects/cppcheck) run.

Approved by: nwhitehorn (mentor)
2011-01-06 20:19:01 +00:00
Nathan Whitehorn
6ae9601546 Unbreak the LINT build. PS3 kernels can only be built 64-bit, and LINT is
built for both architectures. We need a better solution here.
2011-01-06 14:12:24 +00:00
Nathan Whitehorn
03479763b2 Import support for the Sony Playstation 3 using the OtherOS feature
available on firmwares 3.15 and earlier.

Caveats: Support for the internal SATA controller is currently missing,
as is support for framebuffer resolutions other than 720x480. These
deficiencies will be remedied soon.

Special thanks to Peter Grehan for providing the hardware that made this
port possible, and thanks to Geoff Levand of Sony Computer Entertainment
for advice on the LV1 hypervisor.
2011-01-06 04:12:29 +00:00
Andreas Tobler
ec664c11dc Fix null string handling in ofw_real_nextprop function. Pass the right
length to ofw_real_map in case of a null string.
This makes ofwdump(8) work correctly when trying to print all properties
with ofwdump -p.

Approved by:	nwhitehorn (mentor)
2011-01-05 21:38:02 +00:00
Nathan Whitehorn
52a190480f Only keep track of PTE validity statistics for pages not locked in the
table. The 'locked' attribute is used to circumvent the regular page table
locking for some special pages, with the result that including locked pages
here causes races when updating the stats.
2010-12-28 17:02:15 +00:00
Nathan Whitehorn
2bb4662eff Memory can be laid out with large gaps on 64-bit PowerPC, so switch to
VM_PHYSSEG_SPARSE.
2010-12-20 14:25:01 +00:00
Nathan Whitehorn
ed1e1e2a9e Garbage-collect unused variable. 2010-12-19 16:07:53 +00:00
Nathan Whitehorn
41f15bbbd9 Add some isync()s related to the 64-bit MMU scratch page to avoid race
conditions on its invalidation.
2010-12-11 20:29:52 +00:00
Nathan Whitehorn
3b237732a5 Switch which software-reserved bit is used to designate a locked PTE
to correspond to the definition used by the PAPR spec so that its PTE
insertion algorithm will properly respect it.
2010-12-05 01:17:53 +00:00
Nathan Whitehorn
bef5da7f98 Add an abstraction layer to the 64-bit AIM MMU's page table manipulation
logic to support modifying the page table through a hypervisor. This
uses KOBJ inheritance to provide subclasses of the base 64-bit AIM MMU
class with additional methods for page table manipulation.

Many thanks to Peter Grehan for suggesting this design and implementing
the MMU KOBJ inheritance mechanism.
2010-12-04 02:42:52 +00:00
Nathan Whitehorn
e2326639c2 Provide a simple IOMMU framework on PowerPC, which is required to support
PPC hypervisors.
2010-12-03 16:37:37 +00:00
Rebecca Cran
c90f7d9b44 Revert r216134. This checkin broke platforms where bus_space are macros:
they need to be a single statement, and do { } while (0) doesn't work in this
situation so revert until a solution can be devised.
2010-12-03 07:09:23 +00:00
Rebecca Cran
15b4888a24 Disallow passing in a count of zero bytes to the bus_space(9) functions.
Passing a count of zero on i386 and amd64 for [I386|AMD64]_BUS_SPACE_MEM
causes a crash/hang since the 'loop' instruction decrements the counter
before checking if it's zero.

PR:	kern/80980
Discussed with:	jhb
2010-12-02 22:19:30 +00:00
Nathan Whitehorn
e2c3e32a6c Define bswap macros for constants to allow the compiler to pre-compute
byte-swapped versions of compile-time constants. This allows use of
bswap() and htole*() in initializers, which is required to cross-build
btxld.

Obtained from:	sparc64
2010-12-02 15:10:27 +00:00
Marius Strobl
b56b04b800 Several chipset drivers alter parameters relevant for the DMA tag creation,
i.e. alignment, max_address, max_iosize and segsize (only max_address is
thought to have an negative impact regarding this issue though), after
calling ata_dmainit() either directly or indirectly so these values have
no effect or at least no effect on the DMA tags and the defaults are used
for the latter instead. So change the drivers to set these parameters
up-front and ata_dmainit() to honor them.

This file was missed in r216013.

Submitted by:	nwhitehorn
2010-11-30 20:54:14 +00:00
Dimitry Andric
3e288e6238 After some off-list discussion, revert a number of changes to the
DPCPU_DEFINE and VNET_DEFINE macros, as these cause problems for various
people working on the affected files.  A better long-term solution is
still being considered.  This reversal may give some modules empty
set_pcpu or set_vnet sections, but these are harmless.

Changes reverted:

------------------------------------------------------------------------
r215318 | dim | 2010-11-14 21:40:55 +0100 (Sun, 14 Nov 2010) | 4 lines

Instead of unconditionally emitting .globl's for the __start_set_xxx and
__stop_set_xxx symbols, only emit them when the set_vnet or set_pcpu
sections are actually defined.

------------------------------------------------------------------------
r215317 | dim | 2010-11-14 21:38:11 +0100 (Sun, 14 Nov 2010) | 3 lines

Apply the STATIC_VNET_DEFINE and STATIC_DPCPU_DEFINE macros throughout
the tree.

------------------------------------------------------------------------
r215316 | dim | 2010-11-14 21:23:02 +0100 (Sun, 14 Nov 2010) | 2 lines

Add macros to define static instances of VNET_DEFINE and DPCPU_DEFINE.
2010-11-22 19:32:54 +00:00
Dimitry Andric
31c6a0037e Apply the STATIC_VNET_DEFINE and STATIC_DPCPU_DEFINE macros throughout
the tree.
2010-11-14 20:38:11 +00:00
Nathan Whitehorn
cebdaa5881 Partially revert r215182. There appears to be a silicon bug on the 970
that causes AP bringup to fail if some of the Cell HID-register code
is anywhere in the instruction stream. Pending a better solution, cache
performance on SMP Cell systems running without a hypervisor will be
suboptimal.
2010-11-12 20:26:34 +00:00
Nathan Whitehorn
2971d3bb6e Add CPU support code for the IBM Cell Broadband Engine. 2010-11-12 15:20:10 +00:00
Nathan Whitehorn
fe3b4685c7 Remove use of a separate ofw_pmap on 32-bit CPUs. Many Open Firmware
mappings need to end up in the kernel anyway since the kernel begins
executing in OF context. Separating them adds needless complexity,
especially since the powerpc64 and mmu_oea64 code gave up on it a long
time ago.

As a side effect, the PPC ofw_machdep code is no longer AIM-specific,
so move it to powerpc/ofw.
2010-11-12 05:12:38 +00:00
Nathan Whitehorn
16bfd6f347 Remove or conditionalize some hypervisor-unfriendly instruction sequences. 2010-11-12 04:22:00 +00:00
Nathan Whitehorn
6413b05739 Add some platform KOBJ extensions and continue integrating PowerPC
hypervisor infrastructure support:
- Fix coexistence of multiple platform modules in the same kernel
- Allow platform modules to provide an SMP topology
- PowerPC hypervisors limit the amount of memory accessible in real mode.
  Allow the platform modules to specify the maximum real-mode address,
  and modify the bits of the kernel that need to allocate
  real-mode-accessible buffers to respect this limits.
2010-11-12 04:18:19 +00:00
Nathan Whitehorn
b13c7dec5f Fix an error in r215067. An existing /chosen/mmu but missing translations
property just means we shouldn't add any translations, not that we should
panic.
2010-11-12 04:13:48 +00:00
Nathan Whitehorn
5b7ed13bc8 Centralize CPU idle routines into powerpc/cpu.c and use the same
cpu_idle_hook mechanism that x86 uses for overriding the idle routine.
This is required for supporting ilding the CPU under PowerPC hypervisors.
2010-11-12 03:43:22 +00:00
Rafal Jaworowski
1f87b29431 Fix typo in the comment. 2010-11-11 13:46:28 +00:00
Rafal Jaworowski
1d56a2801d Use local TLB_UNLOCKED marker instead of MTX_UNOWNED for Book-E PowerPC trap
routines.

This unbreaks Book-E build after the recent machine/mutex.h removal.

While there move tlb_*lock() prototypes to machine/tlb.h.

Submitted by:	jhb
2010-11-11 13:35:23 +00:00
Nathan Whitehorn
5ebee02036 Add support for the IMISS, DLMISS, and DSMISS traps required to run
FreeBSD on a G2 core.

PR:		powerpc/111296
Submitted by:	Andrew Turner
2010-11-11 02:40:00 +00:00
Nathan Whitehorn
f25d9ae364 Entering deep nap mode on the 970MP requires that both MSR[NAP] and
MSR[DEEPNAP] be set, not just MSR[DEEPNAP]. Fixing this reduces the idle
temperature of my CPUs from 57 to 38 degrees and makes one-shot timer
mode work properly.

Hint from:	mav
MFC after:	4 days
2010-11-10 20:28:10 +00:00
Nathan Whitehorn
a62a5fd29a Disabling CPU NAP modes during SMU commands is a hack needed only on U3
systems. Don't use it on non-U3 systems to allow cpu_idle() to work
correctly.
2010-11-10 20:09:05 +00:00
Nathan Whitehorn
2824d5d2f4 Make AIM early-boot code function correctly without Open Firmware. 2010-11-09 23:53:47 +00:00
John Baldwin
961135ead8 - Remove <machine/mutex.h>. Most of the headers were empty, and the
contents of the ones that were not empty were stale and unused.
- Now that <machine/mutex.h> no longer exists, there is no need to allow it
  to override various helper macros in <sys/mutex.h>.
- Rename various helper macros for low-level operations on mutexes to live
  in the _mtx_* or __mtx_* namespaces.  While here, change the names to more
  closely match the real API functions they are backing.
- Drop support for including <sys/mutex.h> in assembly source files.

Suggested by:	bde (1, 2)
2010-11-09 20:46:41 +00:00
John Baldwin
b3e3402d3a Remove unused includes of <sys/mutex.h> and <machine/mutex.h>. 2010-11-09 20:41:10 +00:00
John Baldwin
0108cce0a4 Adjust the order of operations in spinlock_enter() and spinlock_exit() to
work properly with single-stepping in a kernel debugger.  Specifically,
these routines have always disabled interrupts before increasing the nesting
count and restored the prior state of interrupts after decreasing the nesting
count to avoid problems with a nested interrupt not disabling interrupts
when acquiring a spin lock.  However, trap interrupts for single-stepping
can still occur even when interrupts are disabled.  Now the saved state of
interrupts is not saved in the thread until after interrupts have been
disabled and the nesting count has been increased.  Similarly, the saved
state from the thread cannot be read once the nesting count has been
decreased to zero.  To fix this, use temporary variables to store interrupt
state and shuffle it between the thread's MD area and the appropriate
registers.

In cooperation with:	bde
MFC after:     1 month
2010-11-05 13:42:58 +00:00
Nathan Whitehorn
87acfc2a51 Fix two mistakes on 32-bit systems. The slbmte code in syscall() is 64-bit
only, and should be protected with an ifdef, and the no-execute bit in
32-bit set_user_sr() should be set before the comparison, not after, or
it will never match.
2010-11-03 16:21:47 +00:00
Nathan Whitehorn
e0f88469c7 Clean up the user segment handling code a little more. Now that
set_user_sr() itself caches the user segment VSID, there is no need for
cpu_switch() to do it again. This change also unifies the 32 and 64-bit
code paths for kernel faults on user pages and remaps the user SLB slot
on 64-bit systems when taking a syscall to avoid some unnecessary segment
exception traps.
2010-11-03 15:15:48 +00:00
Alan Cox
e396eb604f Implement pmap_is_prefaultable().
Reviewed by:	nwhitehorn
2010-11-01 02:22:48 +00:00
Nathan Whitehorn
e36e3d8221 Add a security nit to recent copyin/out changes: map the user segment
no-execute in case of exploitable kernel bugs.

MFC after:	1 week
2010-10-31 23:04:15 +00:00
Nathan Whitehorn
ad6b3047a4 Next-to-leading-order perturbation of synchronization operations for
switching the user segment register. All races should now be closed and
a minimum of pipelines flushes be required to close them.
2010-10-31 22:55:51 +00:00
Nathan Whitehorn
50fd2a5b9c Add a driver for the Apple Uninorth AGP host bridge found in all PowerPC
Macintoshes with an AGP bus.
2010-10-31 18:27:05 +00:00
Nathan Whitehorn
c4bcebed17 Add some missing parentheses so that moea_bat_mapped() actually works.
Submitted by:	alc
MFC after:	3 days
2010-10-31 15:07:09 +00:00
Nathan Whitehorn
c04246f45a Allow access to the HT I/O port space on the IBM CPC9X5 northbridge chips.
MFC after:	2 weeks
2010-10-30 23:09:56 +00:00
Nathan Whitehorn
54c562081f Restructure the way the copyin/copyout segment is stored to prevent a
concurrency bug. Since all SLB/SR entries were invalidated during an
exception, a decrementer exception could cause the user segment to be
invalidated during a copyin()/copyout() without a thread switch that
would cause it to be restored from the PCB, potentially causing the
operation to continue on invalid memory. This is now handled by explicit
restoration of segment 12 from the PCB on 32-bit systems and a check in
the Data Segment Exception handler on 64-bit.

While here, cause copyin()/copyout() to check whether the requested
user segment is already installed, saving some pipeline flushes, and
fix the synchronization primitives around the mtsr and slbmte
instructions to prevent accessing stale segments.

MFC after:	2 weeks
2010-10-30 23:07:30 +00:00
Nathan Whitehorn
111044e6c2 Don't create spurious /dev entries.
Submitted by:	andreast
2010-10-25 15:41:12 +00:00
Andreas Tobler
da89fa28c6 Add three new drivers for fan control and temperature reading on the
PowerMac7,2.

- The fcu driver lets us read and write the fan RPMs for all fans in the
  PowerMac7,2. This driver is PowerMac specific.
- The ds1775 is a driver to read the temperature for the drive bay sensor.
- The max6690 is another driver to read temperatures. Here it is used to
  read the inlet, the backside and the U3 heatsink temperature.

An additional driver, the ad7417, will follow later.

Thanks to nwhitehorn for guiding me through this driver development.

Approved by:	nwhitehorn (mentor)
2010-10-15 20:08:16 +00:00
Nathan Whitehorn
2639d62ec2 Handle vector assist traps without a kernel panic, by setting denormalized
values to zero. A correct solution would involve emulating vector
operations on denormalized values, but this has little effect on accuracy
and is much less complicated for now.

MFC after:	2 weeks
2010-10-05 18:08:07 +00:00
Nathan Whitehorn
94363f5311 Follow exactly the steps in architecture manual for correctly invalidating
TLB entries instead of trying to cut corners.
2010-10-04 16:07:48 +00:00
Nathan Whitehorn
eecadc7023 Add a memory-range interface to /dev/mem on PowerPC using PAT attributes.
Unlike actual MTRR, this only controls the mapping attributes for
subsequent mmap() of /dev/mem. Nonetheless, the support is sufficiently
MTRR-like that Xorg can use it, which translates into an enormous increase
in graphics performance on PowerPC.

MFC after:	2 weeks
2010-10-03 16:02:53 +00:00
Nathan Whitehorn
4875174d69 Fix some KTR arguments that were breaking the LINT build.
Pointy hat to:	me
2010-10-02 17:19:38 +00:00
Nathan Whitehorn
680a18f951 Map the Open Firmware framebuffer console with write combining turned on,
and set memory attributes appropriately for mmap() calls on /dev/console.
Xorg no longer uses /dev/console to mmap the framebuffer, so framebuffer
write combining support in X will arrive in the next patch.
2010-10-01 19:02:31 +00:00
Nathan Whitehorn
cd6a97f065 Fix pmap_page_set_memattr() behavior in the presence of fictitious pages
by just caching the mode for later use by pmap_enter(), following amd64.
While here, correct some mismerges from mmu_oea64 -> mmu_oea and clean
up some dead code found while fixing the fictitious page behavior.
2010-10-01 18:59:30 +00:00
Nathan Whitehorn
c1f4123b05 Add support for memory attributes (pmap_mapdev_attr() and friends) on
PowerPC/AIM. This is currently stubbed out on Book-E, since I have no
idea how to implement it there.
2010-09-30 18:14:12 +00:00
Neel Natu
5c1a8dc028 Fix bogus error message from bus_dmamem_alloc() about incorrect alignment.
The check for alignment should be made against the physical address and not
the virtual address that maps it.

Sponsored by:	NetApp
Submitted by:	Will McGovern (will at netapp dot com)
Reviewed by:	mjacob, jhb
2010-09-29 21:53:11 +00:00
David Xu
315490e031 Follow r213098, kernel POSIX semaphore module is no longer
needed.
2010-09-26 01:41:53 +00:00
David Xu
295fbd498e Now userland POSIX semaphore is based on umtx. The kernel module
is only used to support binary compatible, if want to run old
binary, you need to kldload the module.
2010-09-24 09:04:16 +00:00
Nathan Whitehorn
6416b9a85d Split the SLB mirror cache into two kinds of object, one for kernel maps
which are similar to the previous ones, and one for user maps, which
are arrays of pointers into the SLB tree. This changes makes user SLB
updates atomic, closing a window for memory corruption. While here,
rearrange the allocation functions to make context switches faster.
2010-09-16 03:46:17 +00:00
Nathan Whitehorn
95fa3335e1 Replace the SLB backing store splay tree used on 64-bit PowerPC AIM
hardware with a lockless sparse tree design. This marginally improves
the performance of PMAP and allows copyin()/copyout() to run without
acquiring locks when used on wired mappings.

Submitted by:	mdf
2010-09-16 00:22:25 +00:00
Andreas Tobler
23aa1a1da8 Increase register access delay to deal with the high-latency I2C
chipset found in some models of Powermac G5.

Approved by:	nwhitehorn (mentor)
2010-09-15 19:08:41 +00:00
Peter Grehan
33529b98d5 Introduce inheritance into the PowerPC MMU kobj interface.
include/mmuvar.h - Change the MMU_DEF macro to also create the class
definition as well as define the DATA_SET. Add a macro, MMU_DEF_INHERIT,
which has an extra parameter specifying the MMU class to inherit methods
from. Update the comments at the start of the header file to describe the
new macros.

booke/pmap.c
aim/mmu_oea.c
aim/mmu_oea64.c - Collapse mmu_def_t declaration into updated MMU_DEF macro

The MMU_DEF_INHERIT macro will be used in the PS3 MMU implementation to
allow it to inherit the stock powerpc64 MMU methods.

Reviewed by:	nwhitehorn
2010-09-15 00:17:52 +00:00
Peter Grehan
44633af3c7 Resurrect PSIM support by moving the cacheline size-detection warning
printf outside of the MMU-disabled region. A call into OpenFirmware
with the MMU off resulted in an internal PSIM assert.
2010-09-14 03:18:11 +00:00
Nathan Whitehorn
07ae21bae9 Fix a missing set of parantheses that could cause recent versions of libthr
to crash deferencing a NULL pointer to the user context on powerpc64
systems with COMPAT_FREEBSD32 defined.
2010-09-13 22:50:05 +00:00
Nathan Whitehorn
7a7811e7bf Fix a subtle bug uncovered by the recent one-shot timer import in which
any spin locks acquired between the enabling of interrupts in
machdep_ap_bootstrap() and the invocation of the scheduler would fail to
have interrupts disabled due to the fake spinlock already held by the
idle thread. sched_throw(NULL) will enable interrupts by itself when
exiting this spinlock, so just let it do that and don't enable interrupts
here.
2010-09-13 15:36:42 +00:00
Alexander Motin
6bbbd18b83 Change call order to enable interrupts only after timer being programmed.
Submitted by:	nwhitehorn
2010-09-13 14:25:07 +00:00
Alexander Motin
a157e42516 Refactor timer management code with priority to one-shot operation mode.
The main goal of this is to generate timer interrupts only when there is
some work to do. When CPU is busy interrupts are generating at full rate
of hz + stathz to fullfill scheduler and timekeeping requirements. But
when CPU is idle, only minimum set of interrupts (down to 8 interrupts per
second per CPU now), needed to handle scheduled callouts is executed.
This allows significantly increase idle CPU sleep time, increasing effect
of static power-saving technologies. Also it should reduce host CPU load
on virtualized systems, when guest system is idle.

There is set of tunables, also available as writable sysctls, allowing to
control wanted event timer subsystem behavior:
  kern.eventtimer.timer - allows to choose event timer hardware to use.
On x86 there is up to 4 different kinds of timers. Depending on whether
chosen timer is per-CPU, behavior of other options slightly differs.
  kern.eventtimer.periodic - allows to choose periodic and one-shot
operation mode. In periodic mode, current timer hardware taken as the only
source of time for time events. This mode is quite alike to previous kernel
behavior. One-shot mode instead uses currently selected time counter
hardware to schedule all needed events one by one and program timer to
generate interrupt exactly in specified time. Default value depends of
chosen timer capabilities, but one-shot mode is preferred, until other is
forced by user or hardware.
  kern.eventtimer.singlemul - in periodic mode specifies how much times
higher timer frequency should be, to not strictly alias hardclock() and
statclock() events. Default values are 2 and 4, but could be reduced to 1
if extra interrupts are unwanted.
  kern.eventtimer.idletick - makes each CPU to receive every timer interrupt
independently of whether they busy or not. By default this options is
disabled. If chosen timer is per-CPU and runs in periodic mode, this option
has no effect - all interrupts are generating.

As soon as this patch modifies cpu_idle() on some platforms, I have also
refactored one on x86. Now it makes use of MONITOR/MWAIT instrunctions
(if supported) under high sleep/wakeup rate, as fast alternative to other
methods. It allows SMP scheduler to wake up sleeping CPUs much faster
without using IPI, significantly increasing performance on some highly
task-switching loads.

Tested by:	many (on i386, amd64, sparc64 and powerc)
H/W donated by:	Gheorghe Ardelean
Sponsored by:	iXsystems, Inc.
2010-09-13 07:25:35 +00:00
Nathan Whitehorn
1a18ae7010 ATAPI DMA does not seem to work completely reliably on Shasta controllers,
especially in conjunction with ATA_CAM, so disable it for now.
2010-09-11 22:09:16 +00:00
Marius Strobl
cdb25d827e Change OF_interpret() to also take an array of cell_t (missed in r209801).
Reviewed by:	nwhitehorn
2010-09-11 18:55:00 +00:00
Alexander Motin
6774542431 Fix the build after r212453. IPI_STATCLOCK declaration is still needed
for build, though not really used.

Submitted by:	andreast
2010-09-11 09:53:33 +00:00
Alexander Motin
707c2fb950 Update PowerPC event timer code to use new event timers infrastructure.
Reviewed by:	nwitehorn
Tested by:	andreast
H/W donated by:	Gheorghe Ardelean
2010-09-11 04:45:51 +00:00
Andriy Gapon
3d844eddb7 bus_add_child: change type of order parameter to u_int
This reflects actual type used to store and compare child device orders.
Change is mostly done via a Coccinelle (soon to be devel/coccinelle)
semantic patch.
Verified by LINT+modules kernel builds.

Followup to:	r212213
MFC after:	10 days
2010-09-10 11:19:03 +00:00
Nathan Whitehorn
61473c5fd1 Reorder statistics tracking and table lock acquisitions already in place
to avoid race conditions updating the PVO statistics.
2010-09-09 16:06:55 +00:00
Nathan Whitehorn
bcb478eb35 Fix a printf specifier on 64-bit systems. 2010-09-08 19:28:43 +00:00
Nathan Whitehorn
0dfddf6e65 Fix a typo in the original import of this code from NetBSD that caused the
wrong element of the VSID bitmap array to be examined after a collision,
leading to reallocation of in-use VSIDs under some circumstances, with
attendant memory corruption. Also add an assert to check for this kind of
problem in the future.

MFC after:	4 days
2010-09-08 16:58:06 +00:00
Nathan Whitehorn
4982c539ae Fix an error made in r209975 related to context ID allocation for 64-bit
PowerPC CPUs running a 32-bit kernel. This bug could cause in-use VSIDs
to be allocated again to another process, causing memory space overlaps
and corruption.

Reported by:	linimon
2010-09-07 23:31:48 +00:00
Nathan Whitehorn
e9b5f21819 Fix the same race condition on 32-bit AIM CPUs that was fixed for 64-bit
ones in r211967 involving VSID allocation.
2010-09-06 23:07:58 +00:00
Alexander Motin
a3b31d37df Make nexus report name and compat fields as pnpinfo for devices on the
first level of hierarchy, same as done on deeper levels.
2010-09-05 19:57:24 +00:00
Peter Grehan
d8acfb88ad - Bump MAXCPU to 4. Tested on a quad G5 with both 32 and 64-bit kernels.
A make buildkernel -j4 uses ~360% CPU.
- Bracket the AP spinup printf with a mutex to avoid garbled output.
- Enable SMP by default on powerpc64.

Reviewed by:	nwhitehorn
2010-09-03 03:56:09 +00:00
Nathan Whitehorn
b2a237be5c Restructure how reset and poweroff are handled on PowerPC systems, since
the existing code was very platform specific, and broken for SMP systems
trying to reboot from KDB.

- Add a new PLATFORM_RESET() method to the platform KOBJ interface, and
  migrate existing reset functions into platform modules.
- Modify the OF_reboot() routine to submit the request by hand to avoid
  the IPIs involved in the regular openfirmware() routine. This fixes
  reboot from KDB on SMP machines.
- Move non-KDB reset and poweroff functions on the Powermac platform
  into the relevant power control drivers (cuda, pmu, smu), instead of
  using them through the Open Firmware backdoor.
- Rename platform_chrp to platform_powermac since it has become
  increasingly Powermac specific. When we gain support for IBM systems,
  we will grow a new platform_chrp.
2010-08-31 15:27:46 +00:00
Nathan Whitehorn
68181d0091 Remove some code made obsolete by the powerpc64 import. 2010-08-31 15:22:09 +00:00
Nathan Whitehorn
1264a5f4c5 Missed one place the SLB lock should be held in r211967. 2010-08-31 02:07:13 +00:00
Nathan Whitehorn
7eeda62ca9 Avoid a race in the allocation of new segment IDs that could result in
memory corruption on heavily loaded SMP systems.

MFC after:	2 weeks
2010-08-29 18:17:38 +00:00
Nathan Whitehorn
50e64c14a2 pmap_mapdev() does not appear to actually need GIANT to be held here,
and asserting that is held breaks drm.

MFC after:	2 weeks
2010-08-27 05:29:59 +00:00
John Baldwin
8c7a92bd4a Remove unused KTRACE includes. 2010-08-19 16:41:27 +00:00
Nathan Whitehorn
509a0eba89 Unbreak the LINT kernel on powerpc64. Note that the LINT kernel
configuration is TARGET_ARCH specific and must be generated with
TARGET_ARCH set.

Reviewed by:	imp
2010-08-19 03:19:26 +00:00
Konstantin Belousov
ee235befcb Supply some useful information to the started image using ELF aux vectors.
In particular, provide pagesize and pagesizes array, the canary value
for SSP use, number of host CPUs and osreldate.

Tested by:	marius (sparc64)
MFC after:	1 month
2010-08-17 08:55:45 +00:00
John Baldwin
60c7b36b7a Update various places that store or manipulate CPU masks to use cpumask_t
instead of int or u_int.  Since cpumask_t is currently u_int on all
platforms this should just be a cosmetic change.
2010-08-11 23:22:53 +00:00
John Baldwin
d9d8d1449d Add a new ipi_cpu() function to the MI IPI API that can be used to send an
IPI to a specific CPU by its cpuid.  Replace calls to ipi_selected() that
constructed a mask for a single CPU with calls to ipi_cpu() instead.  This
will matter more in the future when we transition from cpumask_t to
cpuset_t for CPU masks in which case building a CPU mask is more expensive.

Submitted by:	peter, sbruno
Reviewed by:	rookie
Obtained from:	Yahoo! (x86)
MFC after:	1 month
2010-08-06 15:36:59 +00:00
Nathan Whitehorn
3b4b38304e Improve hash coverage for kernel page table entries by modifying the kernel
ESID -> VSID map function. This makes ZFS run stably on PowerPC under
heavy loads (repeated simultaneous SVN checkouts and updates).
2010-07-31 21:35:15 +00:00
Nathan Whitehorn
2c16c8d7e5 Add support for the IBM Full-System Simulator (Mambo). This code has been
developed against the 970 and Cell simulators.
2010-07-31 13:22:34 +00:00
Matthew D Fleming
f6daba8329 Add MALLOC_DEBUG_MAXZONES=8 to powerpc64 GENERIC configuration file.
Requested by:    nwhitehorn
Approved by:     zml (mentor)
2010-07-30 20:25:04 +00:00
Matthew D Fleming
d7854da193 Add MALLOC_DEBUG_MAXZONES debug malloc(9) option to use multiple uma
zones for each malloc bucket size.  The purpose is to isolate
different malloc types into hash classes, so that any buffer overruns
or use-after-free will usually only affect memory from malloc types in
that hash class.  This is purely a debugging tool; by varying the hash
function and tracking which hash class was corrupted, the intersection
of the hash classes from each instance will point to a single malloc
type that is being misused.  At this point inspection or memguard(9)
can be used to catch the offending code.

Add MALLOC_DEBUG_MAXZONES=8 to -current GENERIC configuration files.
The suggestion to have this on by default came from Kostik Belousov on
-arch.

This code is based on work by Ron Steinke at Isilon Systems.

Reviewed by:    -arch (mostly silence)
Reviewed by:    zml
Approved by:    zml (mentor)
2010-07-28 15:36:12 +00:00
John Baldwin
a3870a1826 Very rough first cut at NUMA support for the physical page allocator. For
now it uses a very dumb first-touch allocation policy.  This will change in
the future.
- Each architecture indicates the maximum number of supported memory domains
  via a new VM_NDOMAIN parameter in <machine/vmparam.h>.
- Each cpu now has a PCPU_GET(domain) member to indicate the memory domain
  a CPU belongs to.  Domain values are dense and numbered from 0.
- When a platform supports multiple domains, the default freelist
  (VM_FREELIST_DEFAULT) is split up into N freelists, one for each domain.
  The MD code is required to populate an array of mem_affinity structures.
  Each entry in the array defines a range of memory (start and end) and a
  domain for the range.  Multiple entries may be present for a single
  domain.  The list is terminated by an entry where all fields are zero.
  This array of structures is used to split up phys_avail[] regions that
  fall in VM_FREELIST_DEFAULT into per-domain freelists.
- Each memory domain has a separate lookup-array of freelists that is
  used when fulfulling a physical memory allocation.  Right now the
  per-domain freelists are listed in a round-robin order for each domain.
  In the future a table such as the ACPI SLIT table may be used to order
  the per-domain lookup lists based on the penalty for each memory domain
  relative to a specific domain.  The lookup lists may be examined via a
  new vm.phys.lookup_lists sysctl.
- The first-touch policy is implemented by using PCPU_GET(domain) to
  pick a lookup list when allocating memory.

Reviewed by:	alc
2010-07-27 20:33:50 +00:00
Konstantin Belousov
87d45a0392 When compat32 binary asks for the value of hw.machine_arch, report the
name of 32bit sibling architecture instead of the host one. Do the
same for hw.machine on amd64.

Add a safety belt debug.adaptive_machine_arch sysctl, to turn the
substitution off.

Reviewed by:	jhb, nwhitehorn
MFC after:	2 weeks
2010-07-22 09:13:49 +00:00
Rafal Jaworowski
4f124b977c Eliminate FDT_IMMR_VA define.
This removes platform dependencies from <machine>/fdt.h for the benfit of
portability.
2010-07-19 18:47:18 +00:00
Nathan Whitehorn
2a8d51200d Remove obsolete code that sets SHMMAXPGS to a tiny value by default
on PowerPC.
2010-07-13 23:10:55 +00:00