Commit Graph

13 Commits

Author SHA1 Message Date
Ruslan Bukin
6414b02d0c Add SOC_ALTERA_* kernel options per each SoC and use it to
conditionally compile the code.

Reviewed by:	andrew
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D9836
2017-02-28 16:20:33 +00:00
Ruslan Bukin
428157830b Add support for Intel Arria 10 SoC Development Kit.
Use standard DTS files for SOCKIT and SOCDK.

Sponsored by:	DARPA, AFRL
2017-02-28 14:02:16 +00:00
Andrew Turner
5267f6243d Add support for PLATFORM and PLATFORM_SMP to the Altera SOCFPGA SoC. This
will help with moving it to GENERIC.

Reviewed by:	br
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D9461
2017-02-07 12:04:04 +00:00
Michal Meloun
7cc70732a3 ARM: SEV/WFE instructions are implemented starting from ARMv6K,
use it directly.

MFC after: 1 week
2016-10-06 13:18:18 +00:00
Andrew Turner
7133fe0f33 Almost all copies of platform_mp_init_secondary just called
intr_pic_init_secondary. Replace them with a direct call. On BCM2836
and ARMADA XP we need to add this function, but it can be empty.

Reviewed by:	ian, imp
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D5460
2016-02-26 16:04:47 +00:00
Andrew Turner
3210b87554 Remove platform_mp_probe as it's almost identical on most ARM SoCs, and
slightly wrong on the others. We should just check if mp_ncpus is set to
more than one CPU as we may wish to run on a single core even when SMP is
available.

Reviewed by:	ian
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D5458
2016-02-26 15:54:34 +00:00
Andrew Turner
243b36c321 Remove platform_ipi_send, it's an unneeded as all implementations are
identical.

Sponsored by:	 ABT Systems Ltd
2016-02-25 20:48:23 +00:00
Michal Meloun
a89156f53f ARM: Use new ARMv6 naming conventions for cache and TLB functions
in all but ARMv4 specific files.
Expand ARMv6 compatibility stubs in cpu-v4.h. Use physical address
in L2 cache functions if ARM_L2_PIPT is defined.
2016-02-05 14:57:41 +00:00
Adrian Chadd
2b3ad18853 [intrng] Migrate the intrng code from sys/arm/arm to sys/kern/subr_intr.c.
The ci20 port (by kan@) is going to reuse almost all of the intrng code
since the SoC in question looks suspiciously like someone took an ARM
SoC design and replaced the ARM core with a MIPS core.

* migrate out the code;
* rename ARM_ -> INTR_;
* rename arm_ -> intr_;
* move the interrupt flush routine from intr.c / intrng.c into
  arm/machdep_intr.c - removing the code duplication and removing
  the ARM specific bits from here.

Thanks to the Star Wars: The Force Awakens premiere line for allowing
me a couple hours of quiet time to finish the universe builds.

Tested:

* make universe

TODO:

* The structure definitions in subr_intr.c still includes machine/intr.h
  which requires one duplicates all of the intrng definitions in
  the platform code (which kan has done, and I think we don't have to.)

  Instead I should break out the generic things (function declarations,
  common intr structures, etc) into a separate header.

* Kan has requested I make the PIC based IPI stuff optional.
2015-12-18 05:43:59 +00:00
Ian Lepore
7ce00ee7b4 Rename arm_init_secondary_ic() -> arm_pic_init_secondary(). The latter is
the name the function will have when the new ARM_INTRNG code is integrated,
and doing this rename first will make it easier to toggle the new interrupt
handling code on/off with a config option for debugging.
2015-10-18 16:54:34 +00:00
Andrew Turner
087af50ab8 Include vm/pmap.h for pmap_kextract. 2015-04-04 23:03:11 +00:00
Andrew Turner
3f53a2d612 Rename gic_init_secondary to arm_init_secondary_ic to help with the merge
of the arm_intrng project branch.
2015-01-11 16:46:43 +00:00
Ruslan Bukin
d4d630aebe o Add machine-dependent SMP part
o Enable SMP

Sponsored by:	DARPA, AFRL
2014-10-10 14:35:51 +00:00