Commit Graph

731 Commits

Author SHA1 Message Date
Emmanuel Vadot
cfe196fbed nvmem: Add nvmem interface and helpers
The nvmem interface helps provider of nvmem data to expose themselves to consumer.
NVMEM is generally present on some embedded board in a form of eeprom or fuses.
The nvmem api are helpers for consumer to read/write the cell data from a provider.

Differential Revision:	https://reviews.freebsd.org/D16419
2018-07-31 19:08:24 +00:00
Andrew Turner
100a6d1905 Use int for the pcpu_ssbd argument. This is included from userland and may
not include the needed headers to get the bool definition.

Reported by:	manu
Pointy hat to:	andrew
Sponsored by:	DARPA, AFRL
2018-07-31 15:08:02 +00:00
Andrew Turner
0594061ee6 Implement the SSBD (CVE-2018-3639) workaround on arm64
This calls into the Arm Trusted Firmware to enable and disable the
workaround for the Speculative Store Bypass Disable (SSBD) issue, also
known as Spectre Variant 4.

As this may have a large performance overhead, and how exploitable SSBD is
is unknown we follow the Linux lead of allowing the administrator to select
between always on, always off, or only enabled in the kernel, with the
latter being the default.

PR:		228955
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D15819
2018-07-31 12:53:27 +00:00
Andrew Turner
9fc89b6017 Enable VIMAGE on arm64 again. A workaround for modules with static VNET
variables has been committed so these should work now.

PR:		223670
Sponsored by:	DARPA, AFRL
2018-07-30 15:57:58 +00:00
Mark Johnston
1d75e87b28 Simplify the arm64 implementation of pmap_mincore().
No functional change intended.

Reviewed by:	alc
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D16427
2018-07-25 15:58:14 +00:00
Alan Cox
1cff4e0108 Eliminate a comment that doesn't apply to this pmap implementation.
Coalesce the variable definitions for PV entry management.

MFC after:	3 weeks
2018-07-21 21:26:38 +00:00
Mark Johnston
398a929f42 Add support for pmap_enter(psind = 1) to the arm64 pmap.
See the commit log messages for r321378 and r336288 for descriptions of
this functionality.

Reviewed by:	alc
Differential Revision:	https://reviews.freebsd.org/D16303
2018-07-20 16:37:04 +00:00
Mark Johnston
7892da07b9 Initialize the L3 page's wire count correctly after a L2 entry demotion.
Reviewed by:	alc
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D16303
2018-07-20 16:31:08 +00:00
Emmanuel Vadot
b32c7d0cf5 arm64: Add vt_efifb to GENERIC
We can now have efifb being setup correctly.
Enjoy video output on some boards when you couldn't before.

Tested-On:  Pine64
Tested-On:  Pine64-LTS
Tested-On:  Pinebook
2018-07-19 21:59:52 +00:00
Emmanuel Vadot
c54fe25dcb Raise the size of L3 table for early devmap on arm64
Some driver (like efifb) needs to map more than the current L2_SIZE
Raise the size so we can map the framebuffer setup by the bootloader.

Reviewed by:	cognet
2018-07-19 21:58:06 +00:00
Mark Johnston
1f15b0e6c0 Port r324665 and r325285 to arm64.
These changes ensure that reclaim_pv_chunk() can be safely be
executed concurrently by multiple threads.

Reviewed by:	alc
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D16304
2018-07-18 17:58:17 +00:00
Warner Losh
9ecd7fdebe Remove VM_FREELIST_ISADMA. It's not needed on these architectures.
Differential Review: https://reviews.freebsd.org/D16290
2018-07-17 21:07:53 +00:00
Marcin Wojtas
ab53b2929f Enable UART support for Xilinx Ultrascale+ SoCs
Xilinx Ultrascale+ are based on Cortex-A53 and use existing
UART driver (uart_dev_cdnc). Enable it in arm64 GENERIC config.

Submitted by: Michal Stanek <mst@semihalf.com>
Obtained from: Semihalf
2018-07-13 19:54:22 +00:00
Wojciech Macek
45e8acf71c ARM64: Add ThunderX2 CPU revision macro. Add ThunderX2 name in identcpu.c
Submitted by:          Patryk Duda <pdk@semihalf.com>
Obtained from:         Semihalf
Sponsored by:          Cavium
2018-07-09 08:41:54 +00:00
Mark Johnston
ae00e67228 Reuse the PV entry when updating a mapping in pmap_enter().
This addresses a problem described in r335784, where memory
pressure forces reclamation of a PV chunk and in rare cases leads to a
use-after-free of a page table page.

Reviewed by:	alc, kib
MFC after:	3 weeks
Differential Revision:	https://reviews.freebsd.org/D16181
2018-07-08 20:38:46 +00:00
John Baldwin
a9c91abd3b Export a breakpoint() function to userland for arm and arm64.
Enable ptrace() tests using breakpoint() on these architectures.

Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D15191
2018-07-06 23:49:17 +00:00
Ed Maste
c38eeb8eb0 Regen arm64 linux sysent after r336043 2018-07-06 19:47:09 +00:00
Ed Maste
8b159f50a0 Fix arm64 linuxulator clone() argument order
Linux/arm64 is CLONE_BACKWARDS - i.e., "Architecture has tls passed as
the 4th argument of clone(2), not the 5th one."

The linux clone() syscall has four different permutations of argument
order, depending on architecture - see the #ifdef CONFIG_CLONE_BACKWARDS
maze in Linux's kernel/fork.c.

Sponsored by:	Turing Robotic Industries
2018-07-06 19:44:49 +00:00
Matt Macy
ab3059a8e7 Back pcpu zone with domain correct pages
- Change pcpu zone consumers to use a stride size of PAGE_SIZE.
  (defined as UMA_PCPU_ALLOC_SIZE to make future identification easier)

- Allocate page from the correct domain for a given cpu.

- Don't initialize pc_domain to non-zero value if NUMA is not defined
  There are some misconceptions surrounding this field. It is the
  _VM_ NUMA domain and should only ever correspond to valid domain
  values as understood by the VM.

The former slab size of sizeof(struct pcpu) was somewhat arbitrary.
The new value is PAGE_SIZE because that's the smallest granularity
which the VM can allocate a slab for a given domain. If you have
fewer than PAGE_SIZE/8 counters on your system there will be some
memory wasted, but this is obviously something where you want the
cache line to be coming from the correct domain.

Reviewed by: jeff
Sponsored by: Limelight Networks
Differential Revision:  https://reviews.freebsd.org/D15933
2018-07-06 02:06:03 +00:00
Ed Maste
d01c382e91 Add stub arm64 linuxulator VDSO ldscript
This needs to be revisited with the VDSO implementation, but is
sufficient to allow the linux64 module to build on arm64 for testing
and development.

Sponsored by:	Turing Robotic Industries
2018-06-28 20:36:21 +00:00
Andrew Turner
8e5d76e654 Make cpu_set_syscall_retval common between the existing FreeBSD ABI and
the Linuxulator. We need to translate error values onto Linux errno values
and return them to userspace when a syscall fails. We also need to preserve
x1 as all registers are preserved other than the return value.

Reviewed by:	emaste
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D16008
2018-06-25 22:36:25 +00:00
Ed Maste
3911ee2c92 Initial arm64 linuxulator linux_sysvec
This is sufficient to run Linux arm64 'hello world' and other simple
binaries.

Reviewed by:	andrew
Sponsored by:	Turing Robotic Industries
Differential Revision:	https://reviews.freebsd.org/D15834
2018-06-25 14:12:33 +00:00
Mark Johnston
a8be239d69 Re-count available PV entries after reclaiming a PV chunk.
The call to reclaim_pv_chunk() in reserve_pv_entries() may free a
PV chunk with free entries belonging to the current pmap.  In this
case we must account for the free entries that were reclaimed, or
reserve_pv_entries() may return without having reserved the requested
number of entries.

Reviewed by:	alc, kib
Tested by:	pho (previous version)
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D15911
2018-06-23 10:41:52 +00:00
Emmanuel Vadot
78442297f5 Add pmap_mapdev_attr for arm64
This is needed for efifb.
arm and ricv pmap (the two arch with arm64 that uses subr_devmap) have very
different implementation so for now only add this for arm64.

Tested with efifb on Pine64 with a few other patches.

Reviewed by:	cognet
Differential Revision:	https://reviews.freebsd.org/D15294
2018-06-20 16:07:35 +00:00
Emmanuel Vadot
a2d7053188 if_rk_dwc: Disable setting delays for now
The values for tx/rx delays differs accross the different DTS.
Mainline Linux set it to 0x24/0x18
Mostly-Vendor u-boot (the one maintained and developped) to 0x18/0x18
Mostly-Vendor linux (the one maintained and developped) to 0x26/0x11

By experience only 0x18/0x18 works so until the issue is resolved rely on
the bootloader settings.
2018-06-20 15:27:09 +00:00
Emmanuel Vadot
5f35d609c7 rk_gpio: Read the correct register for gpio read
Reported by:	jmcneill
2018-06-20 14:46:07 +00:00
Emmanuel Vadot
e167047518 if_rk_dwc: Fix delays handling
The property are named {t,r}x_delay and not {t,r}-delay.
The upper bits of the register are a mask of which bits is allowed
to be written, set it otherwise we write nothing.
OF_getencprop returns <0 = for an error.

Pointy Hat: myself
Reported by:	jmcneill (delay and mask bits)
2018-06-20 14:45:26 +00:00
Andrew Turner
8214ff0f9e Move common GIC interrupt numbers to the common header. These are the same
across the GICv2 and GICv3 drivers so we only need a single copy of them.

Sponsored by:	Turing Robotic Industries
2018-06-19 16:14:23 +00:00
Ed Maste
1fbaf06eba Introduce arm64 linuxulator stubs
This provides stub implementations of arm64 Linux vdso and machdep,
ptrace, and futex sufficient for executing an arm64 Linux 'hello world'
binary.

Reviewed by:	andrew
Sponsored by:	Turing Robotic Industries
Differential Revision:	https://reviews.freebsd.org/D15832
2018-06-18 19:34:34 +00:00
Ed Maste
c4db0baa34 Regen arm64 linuxulator sysent files after r335323 2018-06-18 18:10:11 +00:00
Ed Maste
2842db3325 arm64 linuxulator: add dup syscall entry
Missed in r333027

Sponsored by:	Turing Robotic Industries Inc.
2018-06-18 18:08:19 +00:00
Ed Maste
42ac144c32 arm64 linuxulator: add linux_dummy.c based on amd64
A later change should deduplicate the multiple copies of this file.

Sponsored by:	Turing Robotic Industries
2018-06-15 19:42:52 +00:00
Ed Maste
e248c23702 arm64: add arm64 linux.h based on i386 linuxulator and Linux headers
Sponsored by:	Turing Robotic Industries
2018-06-15 19:09:17 +00:00
Emmanuel Vadot
3de61a6883 rk_i2c: Add driver for the I2C controller present in RockChip SoC
This controller have a special mode for RX to help with smbus-like transfer
when the controller will automatically send the slave address, register address
and read the data. Use it when possible.
The same mode for TX is describe is the datasheet but is broken and have been
since ~10 years of presence of this controller in RockChip SoCs.

Attach this driver early at we need it to communicate with the PMIC early in the
boot.
Do not hook it to the kernel build for now.
2018-06-14 06:39:33 +00:00
Emmanuel Vadot
e3fc845c91 rk3328: Add support for the i2c clocks 2018-06-14 06:34:27 +00:00
Emmanuel Vadot
3476304a69 if_dwc_rk: Add DesignWare driver for RockChip SoCs.
Add driver for the designware ethernet controller found in some RockChip SoCs.
The driver still rely on a lot of things setup by the bootloader like clocks
and phy mode.
But since netbooting is the only/easiest way to boot rockchip board at the
moment add the driver so other people can test/dev on thoses boards.
2018-06-14 06:28:09 +00:00
Emmanuel Vadot
282d1ef778 rk_armclk: Add the write mask to the register mux value
This was omitted in r334112 and r334996 which cause the PLL to not correctly
reparent, leaving the armclk to be derived from the APLL instead of the NPLL.
The arm core clock is now correctly set to 600Mhz via the assigned-clock present
in the DTB.
2018-06-14 05:46:57 +00:00
Emmanuel Vadot
1e7af4cc7a rk_pll: Add support for mode
RockChip PLL have two modes controlled by a register, a "slow mode" (the
default one) where the frequency is derived from the 24Mhz oscillator on the
board, and a "normal" one when the pll take it's input from the real PLL output.

Default the mode to normal for all the PLLs.
2018-06-14 05:43:45 +00:00
Emmanuel Vadot
b1b521b1d5 rk_pinctrl: Only add gpio subnode
This is the only node we are interested in so do not waste time to test
creating device that will be either unused or fail as most of the nodes
don't have a compatible string.
2018-06-14 05:41:16 +00:00
Andrew Turner
4e050d14e0 Add ThunderX2 to the list of CPUs we need to apply the branch predictor
hardening to.

Sponsored by:	DARPA, AFRL
2018-06-13 15:58:33 +00:00
Andrew Turner
3c4dad8812 Switch to the SMCCC function for branch predictor hardening. The previous
method may not have worked as the firmware checks for the ARCH_WORKAROUND_1
function ID.

Sponsored by:	DARPA, AFRL
2018-06-13 15:56:24 +00:00
Andrew Turner
8b47c1ae54 Rename the ThunderX CPU identification macros to include the X. This is the
name people know the product by, and is consistent with the later SoC ID
macros.

Sponsored by:	DARPA, AFRL
2018-06-13 12:17:11 +00:00
Andrew Turner
0014ef8a04 Add more Cavium CPU part numbers.
While here split the lists by vendor.

Sponsored by:	DARPA, AFRL
2018-06-13 11:58:41 +00:00
Diane Bruce
5bede50958 Add a driver for the BCM2835 Mini-UART as seen on the RPi3
Reviewed by:	andrew
Approved by:	andrew
Differential Revision:	https://reviews.freebsd.org/D15684
2018-06-12 13:26:31 +00:00
Emmanuel Vadot
e34425be26 arm64: rockchip: Correctly set armclk
Parent needs to be the same frequency as the armclk, not twice the freq.
The real divider is incremented by one so write it with - 1
The rate can be at index 0

Pointy Hat To: myself
2018-06-12 11:47:21 +00:00
Andrew Turner
619e50a657 Remove the psci option from arm64. It is now a standard option as it is
required to boot correctly.

Sponsored by:	DARPA, AFRL
2018-06-10 19:42:44 +00:00
Andrew Turner
dc9b99a884 Clean up handling of unexpected exceptions. Previously we would issue a
breakpoint instruction, however this would lose information that may be
useful for debugging.

These are now handled in a similar way to other exceptions, however it
won't exit out of the exception handler until it is known if we can
handle these exceptions in a useful way.

Sponsored by:	DARPA, AFRL
2018-06-10 16:21:21 +00:00
Konstantin Belousov
8d59ab652b Restore release semantic for the old thread unlock on arm64.
With the introduction of pmap_switch(), the DSB instruction on the
address map switch is not necessary executed, which is fixed by
changing the unlock store to release.  Also remove comment which
documented pre-pmap_switch() code.

Reviewed by:	andrew
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2018-06-08 18:32:26 +00:00
Kevin Lo
3fff2af912 Since we don't enable BUF_TRACKING and FULL_BUF_TRACKING buffer debugging
options in GENERIC kernels on arm and arm64, there's no need to disable
them.

Sponsored by:	MSI/FUNTORO
2018-06-05 05:24:42 +00:00
Andrew Turner
c891735cf7 Move the code to print the EFI memory table to a new function and call it
in teh bootverbose path after cninit().

This allows users to see these tables when booting with boot -v.

Sponsored by:	DARPA, AFRL
2018-05-31 12:37:34 +00:00